diff options
author | Finley Xiao <finley.xiao@rock-chips.com> | 2018-06-12 19:55:45 +0800 |
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committer | Tao Huang <huangtao@rock-chips.com> | 2018-06-13 14:16:35 +0800 |
commit | 46e31d30f53c6b9449d74f5539779de6a686adce (patch) | |
tree | 06386c80a92be55503441bc0127dfc5fc18b0e3f /arch/arm64/boot/dts/rockchip/rk3308.dtsi | |
parent | f5577b7361a7d16acd21ca3f70e71147407963b7 (diff) |
arm64: dts: rockchip: rk3308: Add otp device node
Change-Id: Ieceb70736c174410869180e6cf6307715619e8c9
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3308.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3308.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index f6289169728a..2e4b9fd7c2bd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -676,6 +676,29 @@ status = "disabled"; }; + otp: otp@ff210000 { + compatible = "rockchip,rk3308-otp"; + reg = <0x0 0xff210000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>, + <&cru PCLK_OTP_PHY>; + clock-names = "clk_otp", "pclk_otp", "pclk_otp_phy"; + resets = <&cru SRST_OTP_PHY>; + reset-names = "otp_phy"; + + /* Data cells */ + otp_id: id@7 { + reg = <0x07 0x10>; + }; + cpu_leakage: cpu-leakage@17 { + reg = <0x17 0x1>; + }; + logic_leakage: logic-leakage@18 { + reg = <0x18 0x1>; + }; + }; + amba { compatible = "arm,amba-bus"; #address-cells = <2>; |