diff options
| author | Cai YiWei <cyw@rock-chips.com> | 2018-11-02 17:12:37 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-11-15 14:47:05 +0800 |
| commit | ba37982efbab3b2bb05a4b9b3c6adb9a4e2e6b4d (patch) | |
| tree | f52887bf23924fd76a09f7c7ecd44bac893e95bd /arch/arm64/boot/dts/rockchip/rk1808.dtsi | |
| parent | 094228aab45b461d02ba280bc1502eeab9e93568 (diff) | |
arm64: dts: rockchip: rk1808: add cif iomux and grf to isp
Change-Id: I95f68b5151c76579a88d0ea743e97e55efad29af
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk1808.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk1808.dtsi | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk1808.dtsi b/arch/arm64/boot/dts/rockchip/rk1808.dtsi index 09420471873a..471559270769 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk1808.dtsi @@ -1309,6 +1309,7 @@ "clk_isp", "pclk_isp"; power-domains = <&power RK1808_PD_VIO>; iommus = <&isp_mmu>; + rockchip,grf = <&grf>; status = "disabled"; }; @@ -1656,6 +1657,41 @@ rockchip,pins = <2 RK_PB7 1 &pcfg_pull_none>; }; + + cif_d12d15_m0: cif-d12d15-m0 { + rockchip,pins = + <2 RK_PA0 1 &pcfg_pull_none>,/* cif_d12 */ + <2 RK_PA1 1 &pcfg_pull_none>,/* cif_d13 */ + <2 RK_PA2 1 &pcfg_pull_none>,/* cif_d14 */ + <2 RK_PA3 1 &pcfg_pull_none>;/* cif_d15 */ + }; + + cif_d10d11_m0: cif-d10d11-m0 { + rockchip,pins = + <2 RK_PC2 1 &pcfg_pull_none>,/* cif_d10 */ + <2 RK_PC3 1 &pcfg_pull_none>;/* cif_d11 */ + }; + + cif_d2d9_m0: cif-d2d9-m0 { + rockchip,pins = + <2 RK_PA4 1 &pcfg_pull_none>,/* cif_d2 */ + <2 RK_PA5 1 &pcfg_pull_none>,/* cif_d3 */ + <2 RK_PA6 1 &pcfg_pull_none>,/* cif_d4 */ + <2 RK_PA7 1 &pcfg_pull_none>,/* cif_d5 */ + <2 RK_PB0 1 &pcfg_pull_none>,/* cif_d6 */ + <2 RK_PB1 1 &pcfg_pull_none>,/* cif_d7 */ + <2 RK_PB2 1 &pcfg_pull_none>,/* cif_d8 */ + <2 RK_PB3 1 &pcfg_pull_none>,/* cif_d9 */ + <2 RK_PB4 1 &pcfg_pull_none>,/* cif_vsync */ + <2 RK_PB5 1 &pcfg_pull_none>,/* cif_href */ + <2 RK_PB6 1 &pcfg_pull_none>;/* cif_clkin */ + }; + + cif_d0d1_m0: cif-d0d1-m0 { + rockchip,pins = + <2 RK_PC0 1 &pcfg_pull_none>,/* cif_d0 */ + <2 RK_PC1 1 &pcfg_pull_none>;/* cif_d1 */ + }; }; emmc { |