diff options
| author | Jianqun Xu <jay.xu@rock-chips.com> | 2018-10-06 16:22:16 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-10-06 16:56:25 +0800 |
| commit | 827031a1cabb32278405455db10777dfcdebbbae (patch) | |
| tree | 188fa36f5862e5cd7b0f98bdebc7fa35012854cd /arch/arm64/boot/dts/rockchip/rk1808.dtsi | |
| parent | 3e9d3367b9300edfdd022026627510de5700e50b (diff) | |
arm64: dts: rockchip: fix reg length for cru on RK1808 SoCs
PMU_CRU offset is 0xc000.
Change-Id: I59530a55a4561df6922c2a3040c59e6b590842a4
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk1808.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk1808.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk1808.dtsi b/arch/arm64/boot/dts/rockchip/rk1808.dtsi index d4c73dffa4ba..0a81fa67fd15 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk1808.dtsi @@ -281,7 +281,7 @@ cru: clock-controller@ff350000 { compatible = "rockchip,rk1808-cru"; - reg = <0x0 0xff350000 0x0 0x5000>; + reg = <0x0 0xff350000 0x0 0xd000>; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; |