diff options
| author | Elaine Zhang <zhangqing@rock-chips.com> | 2018-10-11 09:37:15 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-10-11 09:49:17 +0800 |
| commit | 5b3e79f430ca73c65357b0a8e47bb1eb36d32bdf (patch) | |
| tree | 8ce60bfff537887c7eee4d3712f550341cc0fdb0 /arch/arm64/boot/dts/rockchip/rk1808.dtsi | |
| parent | c7e655d568aea2463355d62d2afdeb447517f0a8 (diff) | |
arm64: dts: rockchip: modify gpll freq to 1188M for rk1808
set gpll 1188M is better for cif 27M\37.125M\74.25M
Change-Id: I05003333980da535b9f20f021c38a2dbcedf74f6
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk1808.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk1808.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk1808.dtsi b/arch/arm64/boot/dts/rockchip/rk1808.dtsi index 886e97c28fc1..ad06102ae370 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk1808.dtsi @@ -349,7 +349,7 @@ <&cru HSCLK_BUS_PRE>, <&cru MSCLK_BUS_PRE>, <&cru LSCLK_BUS_PRE>; assigned-clock-rates = - <1200000000>, <1000000000>, + <1188000000>, <1000000000>, <200000000>, <816000000>, <200000000>, <100000000>, <300000000>, <200000000>, |