diff options
| author | Jianqun Xu <jay.xu@rock-chips.com> | 2018-09-10 10:00:14 +0800 |
|---|---|---|
| committer | Jianqun Xu <jay.xu@rock-chips.com> | 2018-09-18 08:54:10 +0800 |
| commit | 47cb97b08a4878d4d182ce66cb8d29040d2773cf (patch) | |
| tree | aa65636105607a930b2afe57b8df89d87c46e946 /arch/arm64/boot/dts/rockchip/rk1808.dtsi | |
| parent | ea63667dfbadd5bdc37fd0b973920271945ae877 (diff) | |
arm64: dts: rockchip: rk1808 add support npu
Add npu node for RK1808 SoCs.
Change-Id: Ic6c3c6a1cdff75030871710808a5d248afe8ceb4
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk1808.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk1808.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk1808.dtsi b/arch/arm64/boot/dts/rockchip/rk1808.dtsi index 07a7c927dc8e..f4855a92e62f 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk1808.dtsi @@ -907,6 +907,15 @@ status = "disabled"; }; + npu: npu@ffbc0000 { + compatible = "rockchip,npu"; + reg = <0x0 0xffbc0000 0x0 0x1000>; + clocks = <&cru SCLK_NPU>, <&cru HCLK_NPU>; + clock-names = "sclk_npu", "hclk_npu"; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + sdmmc: dwmmc@ffcf0000 { compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xffcf0000 0x0 0x4000>; |