diff options
| author | William Wu <william.wu@rock-chips.com> | 2018-10-18 10:02:16 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-10-22 11:05:43 +0800 |
| commit | 400884d434c13685f51be1608675a4affa51e264 (patch) | |
| tree | e3955cbe302bf62e58752a3ee5554151647410cf /arch/arm64/boot/dts/rockchip/rk1808.dtsi | |
| parent | eb0eaabd7cf7b8901d3839150854a28d8334c799 (diff) | |
arm64: dts: rockchip: add combphy node for rk1808
Add combphy node for rk1808, this phy can be used
as pcie-phy or usb3-phy.
Change-Id: Idddeabf32a21560ad134ff9cc0a9a3f406f8d1a7
Signed-off-by: William Wu <william.wu@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk1808.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk1808.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk1808.dtsi b/arch/arm64/boot/dts/rockchip/rk1808.dtsi index 048122790939..370c39d3bb25 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk1808.dtsi @@ -6,6 +6,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/power/rk1808-power.h> +#include <dt-bindings/phy/phy.h> #include <dt-bindings/soc/rockchip,boot-mode.h> / { @@ -231,6 +232,11 @@ }; }; + combphy_grf: syscon@fe018000 { + compatible = "rockchip,usb3phy-grf", "syscon"; + reg = <0x0 0xfe018000 0x0 0x8000>; + }; + pmugrf: syscon@fe020000 { compatible = "rockchip,rk1808-pmugrf", "syscon", "simple-mfd"; reg = <0x0 0xfe020000 0x0 0x1000>; @@ -394,6 +400,22 @@ status = "disabled"; }; + combphy: phy@ff380000 { + compatible = "rockchip,rk1808-combphy"; + reg = <0x0 0xff380000 0x0 0x10000>; + #phy-cells = <1>; + clocks = <&cru SCLK_PCIEPHY_REF>; + clock-names = "refclk"; + assigned-clocks = <&cru SCLK_PCIEPHY_REF>; + assigned-clock-rates = <25000000>; + resets = <&cru SRST_USB3_OTG_A>, <&cru SRST_PCIEPHY_POR>, + <&cru SRST_PCIEPHY_P>, <&cru SRST_PCIEPHY_PIPE>; + reset-names = "otg-rst", "combphy-por", + "combphy-apb", "combphy-pipe"; + rockchip,combphygrf = <&combphy_grf>; + status = "disabled"; + }; + tsadc: tsadc@ff3a0000 { compatible = "rockchip,rk1808-tsadc"; reg = <0x0 0xff3a0000 0x0 0x100>; |