diff options
| author | Liang Chen <cl@rock-chips.com> | 2018-10-11 16:26:33 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-10-12 09:46:22 +0800 |
| commit | 1b18665d28671516a85483257f7e3748f1f45aba (patch) | |
| tree | 54f8841125a87afa8e1e85addbfeff9740167c3a /arch/arm64/boot/dts/rockchip/rk1808.dtsi | |
| parent | 212bbd910ca2a6a9a7951caa6566843656e3290a (diff) | |
arm64: dts: rockchip: rk1808: Add pvtm node
Change-Id: Ifba22d49d08cea1897a963b4ab1bc43791e78032
Signed-off-by: Liang Chen <cl@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk1808.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk1808.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk1808.dtsi b/arch/arm64/boot/dts/rockchip/rk1808.dtsi index 4c01665b4350..d3e825232467 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk1808.dtsi @@ -173,6 +173,13 @@ status = "disabled"; }; + npu_pvtm: npu-pvtm { + compatible = "rockchip,rk1808-npu-pvtm"; + clocks = <&cru SCLK_PVTM_NPU>; + clock-names = "npu"; + status = "okay"; + }; + rgb: rgb { compatible = "rockchip,rk1808-rgb"; status = "disabled"; @@ -240,6 +247,13 @@ status = "disabled"; }; + pmu_pvtm: pmu-pvtm { + compatible = "rockchip,rk1808-pmu-pvtm"; + clocks = <&cru SCLK_PVTM_PMU>; + clock-names = "pmu"; + status = "okay"; + }; + reboot-mode { compatible = "syscon-reboot-mode"; offset = <0x200>; @@ -253,6 +267,20 @@ }; }; + coregrf: syscon@fe050000 { + compatible = "rockchip,rk1808-coregrf", "syscon", "simple-mfd"; + reg = <0x0 0xfe050000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + pvtm: pvtm { + compatible = "rockchip,rk1808-pvtm"; + clocks = <&cru SCLK_PVTM_CORE>; + clock-names = "core"; + status = "okay"; + }; + }; + qos_npu: qos@fe850000 { compatible = "syscon"; reg = <0x0 0xfe850000 0x0 0x20>; |