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authorDavid Wu <david.wu@rock-chips.com>2018-10-19 09:32:33 +0800
committerTao Huang <huangtao@rock-chips.com>2018-10-19 10:55:50 +0800
commit4ebc216df25ec673fb5eefd1d4f42487c4c2c06c (patch)
treedde58e1b22fb96bf9218c53f96207eb2a7819d1e /arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi
parentb6331d5cd1639b6d93dceda8ae0b10f579a2299c (diff)
arm64: dts: rockchip: I2C0 can use 400K frequency for rk1808-evb
The scl rise time of I2C0 is 200ns, so it can use 400K frequency. Change-Id: I80933698ff7576b9406213aa50becc7736951a8d Signed-off-by: David Wu <david.wu@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi
index f2c7fb0e7b70..dce281ef4e02 100644
--- a/arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi
@@ -252,6 +252,7 @@
&i2c0 {
status = "okay";
+ clock-frequency = <400000>;
vdd_npu: syr837@40 {
compatible = "silergy,syr827";