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authorWeixin Zhou <zwx@rock-chips.com>2019-01-12 15:37:58 +0800
committerTao Huang <huangtao@rock-chips.com>2019-01-18 15:37:11 +0800
commitdf807bb866df51be0cd6ea0496980a0723855f27 (patch)
tree3bcd6b45932c7010dceafeb80a8992a1c9af75ce /arch/arm64/boot/dts/rockchip/px30.dtsi
parent8e891e47515822f8e5ab0c13450947077ec43021 (diff)
arm64: dts: rockchip: px30: add wide temperature config
Change-Id: I99af054eb795ac396f024595c83783669bef101d Signed-off-by: Weixin Zhou <zwx@rock-chips.com> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/px30.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/px30.dtsi17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 2c7644009cb6..1e58f444dcf0 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -108,6 +108,14 @@
compatible = "operating-points-v2";
opp-shared;
+ rockchip,temp-hysteresis = <5000>;
+ rockchip,low-temp = <0>;
+ rockchip,low-temp-min-volt = <1000000>;
+ rockchip,low-temp-adjust-volt = <
+ /* MHz MHz uV */
+ 0 1512 50000
+ >;
+
clocks = <&cru PLL_APLL>;
rockchip,avs-scale = <4>;
rockchip,max-volt = <1350000>;
@@ -1301,6 +1309,15 @@
gpu_opp_table: gpu-opp-table {
compatible = "operating-points-v2";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,temp-hysteresis = <5000>;
+ rockchip,low-temp = <0>;
+ rockchip,low-temp-min-volt = <1000000>;
+ rockchip,low-temp-adjust-volt = <
+ /* MHz MHz uV */
+ 0 480 50000
+ >;
+
rockchip,max-volt = <1175000>;
rockchip,evb-irdrop = <25000>;