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authorFinley Xiao <finley.xiao@rock-chips.com>2018-05-28 14:47:14 +0800
committerTao Huang <huangtao@rock-chips.com>2018-06-01 16:58:27 +0800
commit71e634507f8819a8d625608215ed4c4b11dda192 (patch)
treedc1f4e54ab6e198fbd54e6313c61b37310e9049a /arch/arm64/boot/dts/rockchip/px30.dtsi
parenta487158ec0692bebec14fd495a8a7dce0c8bfdd9 (diff)
soc: rockchip: opp_select: Add support to adjust power scale
Change-Id: I2358d75c2fdada7cfe385e85d2106370f9aa5ea3 Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/px30.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/px30.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 96808ba408f6..d4254f0b4359 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -109,6 +109,7 @@
opp-shared;
clocks = <&cru PLL_APLL>;
+ rockchip,avs-scale = <4>;
rockchip,max-volt = <1350000>;
rockchip,evb-irdrop = <25000>;
nvmem-cells = <&cpu_leakage>;