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authorRandy Li <randy.li@rock-chips.com>2018-06-21 10:23:49 +0800
committerTao Huang <huangtao@rock-chips.com>2018-06-21 10:36:00 +0800
commit3a5dfc8d9ac3df8cca8e5b26ad844a82e3027908 (patch)
treeed17eda36484566569cb4740e917b2f86ba192eb /arch/arm64/boot/dts/rockchip/px30.dtsi
parentec986ff5fbb90e38b7766d45c80ad0e9bd83959f (diff)
ARM64: dts: rockchip: re-order the px30 aliases
Making those items in alphabetical order. Change-Id: I2abb29eaed4b5fc970f46dc382e0e82fbf6062d6 Signed-off-by: Randy Li <randy.li@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/px30.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/px30.dtsi10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 55cbbe857b32..3b64b9e8a202 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -25,17 +25,17 @@
#size-cells = <2>;
aliases {
+ ethernet0 = &gmac;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
- i2c0 = &i2c0;
- i2c1 = &i2c1;
- i2c2 = &i2c2;
- i2c3 = &i2c3;
- ethernet0 = &gmac;
spi0 = &spi0;
spi1 = &spi1;
};