diff options
| author | XiaoDong Huang <derrick.huang@rock-chips.com> | 2018-05-03 11:51:37 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-05-03 19:54:45 +0800 |
| commit | 3a13a2ae5203244fd688a0e6fdf8c31a0a0ca513 (patch) | |
| tree | f5a4e972181fbbc59052aa5c83d95878a7974a19 /arch/arm64/boot/dts/rockchip/px30.dtsi | |
| parent | c71109b38b46f6be47b51985eb8f8dd2b0ceed36 (diff) | |
arm64: dts: rockchip: px30: disable cpu CLUSTER_SLEEP
Change-Id: I240d47f2c8f665af9d2b4c0cc87bf70ecd420bc4
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/px30.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 3cb1f95e2715..efbbd9223c05 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -53,7 +53,7 @@ #cooling-cells = <2>; dynamic-power-coefficient = <90>; operating-points-v2 = <&cpu0_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + cpu-idle-states = <&CPU_SLEEP>; }; cpu1: cpu@1 { @@ -62,7 +62,7 @@ reg = <0x0 0x1>; enable-method = "psci"; operating-points-v2 = <&cpu0_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + cpu-idle-states = <&CPU_SLEEP>; }; cpu2: cpu@2 { device_type = "cpu"; @@ -70,7 +70,7 @@ reg = <0x0 0x2>; enable-method = "psci"; operating-points-v2 = <&cpu0_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + cpu-idle-states = <&CPU_SLEEP>; }; cpu3: cpu@3 { device_type = "cpu"; @@ -78,7 +78,7 @@ reg = <0x0 0x3>; enable-method = "psci"; operating-points-v2 = <&cpu0_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + cpu-idle-states = <&CPU_SLEEP>; }; idle-states { |