arm64: dts: rockchip: px30: Correct sdio irq number and add iomux

Change-Id: Id61aece26f7c9e612a332ed8d0342693a4cc3b6a
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>

1 files changed, 24 insertions, 2 deletions

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 1920f16ef56a..0739bc773ae2 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -879,7 +879,7 @@
 		clock-names = "biu", "ciu";
 		power-domains = <&power PX30_PD_SDCARD>;
 		fifo-depth = <0x100>;
-		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";
 	};
 
@@ -892,7 +892,9 @@
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		power-domains = <&power PX30_PD_MMC_NAND>;
 		fifo-depth = <0x100>;
-		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>;
 		status = "disabled";
 	};
 
@@ -2363,5 +2365,25 @@
 				rockchip,pins = <3 RK_PD1 RK_FUNC_4 &pcfg_pull_none>;/* ISP_PRELIGHTTRIG */
 			};
 		};
+
+		sdio {
+			sdio_bus4: sdio-bus4 {
+				rockchip,pins =
+					<1 RK_PC6 RK_FUNC_1 &pcfg_pull_up>,
+					<1 RK_PC7 RK_FUNC_1 &pcfg_pull_up>,
+					<1 RK_PD0 RK_FUNC_1 &pcfg_pull_up>,
+					<1 RK_PD1 RK_FUNC_1 &pcfg_pull_up>;
+			};
+
+			sdio_cmd: sdio-cmd {
+				rockchip,pins =
+					<1 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
+			};
+
+			sdio_clk: sdio-clk {
+				rockchip,pins =
+					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
 	};
 };