diff options
| author | Shawn Lin <shawn.lin@rock-chips.com> | 2018-02-26 14:49:21 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-02-26 17:13:46 +0800 |
| commit | 7d65765bf341a218369497618d790c64b0072ec6 (patch) | |
| tree | 067255ca4467869c2da5e67c53fe326e21953cd3 /arch/arm64/boot/dts/rockchip/px30.dtsi | |
| parent | c57523a0d670b955317dc032982f0d3646ba59b9 (diff) | |
arm64: dts: rockchip: Enable SD/SDIO 3.0 for PX30/RK3326 boards
This patch enables SD(IO) 3.0 for all boards by adding correct
vccq and vcc power supplies, as well as properities required by
UHS-I mode.
Change-Id: Iec11e1d1abe7ef9fc17ba08eece3440d7dcaea0b
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/px30.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30.dtsi | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 9fd58103ad89..da432b6902f0 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -977,8 +977,9 @@ compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff370000 0x0 0x4000>; max-frequency = <150000000>; - clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; - clock-names = "biu", "ciu"; + clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, + <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drv", "ciu-sample"; power-domains = <&power PX30_PD_SDCARD>; fifo-depth = <0x100>; interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; @@ -2078,30 +2079,30 @@ sdmmc { sdmmc_clk: sdmmc-clk { rockchip,pins = - <1 RK_PD6 RK_FUNC_1 &pcfg_pull_none_4ma>; + <1 RK_PD6 RK_FUNC_1 &pcfg_pull_none_8ma>; }; sdmmc_cmd: sdmmc-cmd { rockchip,pins = - <1 RK_PD7 RK_FUNC_1 &pcfg_pull_up_4ma>; + <1 RK_PD7 RK_FUNC_1 &pcfg_pull_up_8ma>; }; sdmmc_det: sdmmc-det { rockchip,pins = - <0 RK_PA3 RK_FUNC_1 &pcfg_pull_up_4ma>; + <0 RK_PA3 RK_FUNC_1 &pcfg_pull_up_8ma>; }; sdmmc_bus1: sdmmc-bus1 { rockchip,pins = - <1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_4ma>; + <1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_8ma>; }; sdmmc_bus4: sdmmc-bus4 { rockchip,pins = - <1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_4ma>, - <1 RK_PD3 RK_FUNC_1 &pcfg_pull_up_4ma>, - <1 RK_PD4 RK_FUNC_1 &pcfg_pull_up_4ma>, - <1 RK_PD5 RK_FUNC_1 &pcfg_pull_up_4ma>; + <1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_8ma>, + <1 RK_PD3 RK_FUNC_1 &pcfg_pull_up_8ma>, + <1 RK_PD4 RK_FUNC_1 &pcfg_pull_up_8ma>, + <1 RK_PD5 RK_FUNC_1 &pcfg_pull_up_8ma>; }; sdmmc_gpio: sdmmc-gpio { |