diff options
| author | YouMin Chen <cym@rock-chips.com> | 2018-02-05 10:56:55 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-02-08 14:56:22 +0800 |
| commit | 56dfe1fdbedaad814ab59445442e1938a2b7e98f (patch) | |
| tree | f4e590d4a2eab2fe8f6ff6ad11617984a05825c0 /arch/arm64/boot/dts/rockchip/px30.dtsi | |
| parent | 3f9d4749de2ae42a2f1de08d9ae2475988a02040 (diff) | |
arm64: dts: rockchip: add px30 ddr relate node
Change-Id: I33119ba0250c6c9fe78d124bf92a94a52f9442bf
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/px30.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30.dtsi | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 319f118ed6bb..a5412e236501 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -12,7 +12,9 @@ #include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/power/px30-power.h> #include <dt-bindings/soc/rockchip,boot-mode.h> +#include <dt-bindings/soc/rockchip-system-status.h> #include <dt-bindings/thermal/thermal.h> +#include "px30-dram-default-timing.dtsi" / { compatible = "rockchip,px30"; @@ -1345,6 +1347,74 @@ reg = <0x0 0xff558080 0x0 0x20>; }; + dfi: dfi@ff610000 { + reg = <0x00 0xff610000 0x00 0x400>; + compatible = "rockchip,px30-dfi"; + rockchip,pmugrf = <&pmugrf>; + status = "disabled"; + }; + + dmc: dmc { + compatible = "rockchip,px30-dmc"; + devfreq-events = <&dfi>; + clocks = <&cru SCLK_DDRCLK>; + clock-names = "dmc_clk"; + operating-points-v2 = <&dmc_opp_table>; + ddr_timing = <&ddr_timing>; + upthreshold = <40>; + downdifferential = <20>; + system-status-freq = < + /*system status freq(KHz)*/ + SYS_STATUS_NORMAL 786000 + SYS_STATUS_REBOOT 786000 + SYS_STATUS_SUSPEND 786000 + SYS_STATUS_VIDEO_1080P 786000 + SYS_STATUS_PERFORMANCE 786000 + SYS_STATUS_BOOST 786000 + >; + auto-min-freq = <400000>; + auto-freq-en = <0>; + #cooling-cells = <2>; + status = "disabled"; + + ddr_power_model: ddr_power_model { + compatible = "ddr_power_model"; + dynamic-power-coefficient = <120>; + static-power-coefficient = <200>; + ts = <32000 4700 (-80) 2>; + thermal-zone = "soc-thermal"; + }; + }; + + dmc_opp_table: dmc-opp-table { + compatible = "operating-points-v2"; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <925000>; + opp-microvolt-L0 = <925000>; + opp-microvolt-L1 = <900000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1025000>; + opp-microvolt-L0 = <1025000>; + opp-microvolt-L1 = <1000000>; + }; + opp-786000000 { + opp-hz = /bits/ 64 <786000000>; + opp-microvolt = <1075000>; + opp-microvolt-L0 = <1075000>; + opp-microvolt-L1 = <1050000>; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1075000>; + opp-microvolt-L0 = <1075000>; + opp-microvolt-L1 = <1050000>; + }; + }; + pinctrl: pinctrl { compatible = "rockchip,px30-pinctrl"; rockchip,grf = <&grf>; |