diff options
author | Wu Jingchen <oven.wu@rock-chips.com> | 2019-02-27 10:22:58 +0800 |
---|---|---|
committer | Tao Huang <huangtao@rock-chips.com> | 2019-03-04 11:46:04 +0800 |
commit | 782355187fef77c04a2db325590a457c01ac13ff (patch) | |
tree | 14897907986a54d866825077d31d0b2f6df94d4e /arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618-avb.dts | |
parent | ad8de303354614bc8cbcf24ed24c4da51ec0a349 (diff) |
arm64: dts: rockchip: px30-evb-ext-rk618-avb: Add dts for 9.0 double-screen display
Change-Id: I1d6470d5fe163f8ef59a5ee2593fe2c73e3dbdfa
Signed-off-by: Wu Jingchen <oven.wu@rock-chips.com>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618-avb.dts')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618-avb.dts | 133 |
1 files changed, 133 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618-avb.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618-avb.dts new file mode 100644 index 000000000000..09d84fc9d931 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618-avb.dts @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd + */ + +/dts-v1/; +#include <dt-bindings/clock/rk618-cru.h> +#include <dt-bindings/display/media-bus-format.h> +#include "px30-evb-ddr3-v10.dtsi" + +/ { + model = "Rockchip PX30 EVB EXT RK618 board"; + compatible = "rockchip,px30-evb-ext-rk618-avb", "rockchip,px30"; +}; + +&dmc { + auto-freq-en = <0>; +}; + +&vcc3v0_pmu { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-suspend-microvolt = <3300000>; + }; +}; + +&i2c1 { + + rk618@50 { + compatible = "rockchip,rk618"; + reg = <0x50>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1_2ch_mclk>; + clocks = <&cru SCLK_I2S1_OUT>; + clock-names = "clkin"; + assigned-clocks = <&cru SCLK_I2S1_OUT>; + assigned-clock-rates = <12000000>; + reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; + status = "okay"; + + clock: cru { + compatible = "rockchip,rk618-cru"; + clocks = <&cru SCLK_I2S1_OUT>, <&cru DCLK_VOPL>; + clock-names = "clkin", "lcdc0_dclkp"; + assigned-clocks = <&clock SCALER_PLLIN_CLK>, + <&clock VIF_PLLIN_CLK>, + <&clock SCALER_CLK>, + <&clock VIF0_PRE_CLK>, + <&clock CODEC_CLK>, + <&clock DITHER_CLK>; + assigned-clock-parents = <&cru SCLK_I2S1_OUT>, + <&clock LCDC0_CLK>, + <&clock SCALER_PLL_CLK>, + <&clock VIF_PLL_CLK>, + <&cru SCLK_I2S1_OUT>, + <&clock VIF0_CLK>; + #clock-cells = <1>; + status = "okay"; + }; + + hdmi { + compatible = "rockchip,rk618-hdmi"; + clocks = <&clock HDMI_CLK>; + clock-names = "hdmi"; + assigned-clocks = <&clock HDMI_CLK>; + assigned-clock-parents = <&clock VIF0_CLK>; + interrupt-parent = <&gpio2>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + hdmi_in_rgb: endpoint { + remote-endpoint = <&rgb_out_hdmi>; + }; + }; + }; + }; + }; +}; + +&rgb { + status = "okay"; + + ports { + port@1 { + reg = <1>; + + rgb_out_hdmi: endpoint { + remote-endpoint = <&hdmi_in_rgb>; + }; + }; + }; +}; + +&rgb_in_vopb { + status = "disabled"; +}; + +&rgb_in_vopl { + status = "okay"; +}; + +&route_rgb { + connect = <&vopl_out_rgb>; + status = "disabled"; +}; + +&firmware_android { + compatible = "android,firmware"; + boot_devices = "ff390000.dwmmc,ff3b0000.nandc"; + vbmeta { + compatible = "android,vbmeta"; + parts = "vbmeta,boot,system,vendor,dtbo"; + }; + fstab { + compatible = "android,fstab"; + vendor { + compatible = "android,vendor"; + dev = "/dev/block/by-name/vendor"; + type = "ext4"; + mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; + fsmgr_flags = "wait,avb"; + }; + }; +}; |