clk: rockchip: mark some special clk as critical on rk3368v4.13-rockchip-clk1

The jtag clk no driver to handle them.
But this clk need enable,so make it as critical.

The ddrphy/ddrupctl clks no driver to handle them,
Chip design requirements for these clock to always on,

The pmu_hclk_otg0 is Chip design defect, must be always on,

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

0 files changed, 0 insertions, 0 deletions