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authorWilliam Wu <william.wu@rock-chips.com>2016-08-03 19:01:52 +0800
committerHuang, Tao <huangtao@rock-chips.com>2016-08-17 18:32:33 +0800
commit5d3af4826be2dde5bec88ff17b5007b2a1b52300 (patch)
tree333c00a0f37515baa395d5f3237b62c9a9ad97cc /Documentation
parent27f83eeb6b42631a4c9f18bf001e8ea914de7506 (diff)
FROMLIST: usb: dwc3: make usb2 phy utmi interface configurable
Support to configure the UTMI+ PHY with an 8- or 16-bit interface via DT. The UTMI+ PHY interface is a hardware capability, and it's platform dependent. Normally, the PHYIF can be configured during coreconsultant. But for some specific USB cores(e.g. rk3399 SoC DWC3), the default PHYIF configuration value is false, so we need to reconfigure it by software. Change-Id: I5c5a44dcd9ef4c3b8f2b722cd066819a2983fcfc Signed-off-by: William Wu <william.wu@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/usb/generic.txt6
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/generic.txt b/Documentation/devicetree/bindings/usb/generic.txt
index bba825711873..bfadeb1c3bab 100644
--- a/Documentation/devicetree/bindings/usb/generic.txt
+++ b/Documentation/devicetree/bindings/usb/generic.txt
@@ -11,6 +11,11 @@ Optional properties:
"peripheral" and "otg". In case this attribute isn't
passed via DT, USB DRD controllers should default to
OTG.
+ - phy_type: tells USB controllers that we want to configure the core to support
+ a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is
+ selected. Valid arguments are "utmi" and "utmi_wide".
+ In case this isn't passed via DT, USB controllers should
+ default to HW capability.
- otg-rev: tells usb driver the release number of the OTG and EH supplement
with which the device and its descriptors are compliant,
in binary-coded decimal (i.e. 2.0 is 0200H). This
@@ -34,6 +39,7 @@ dwc3@4a030000 {
usb-phy = <&usb2_phy>, <&usb3,phy>;
maximum-speed = "super-speed";
dr_mode = "otg";
+ phy_type = "utmi_wide";
otg-rev = <0x0200>;
adp-disable;
};