dt-bindings: phy: Document INNOSILICON LVDS/TTL video PHY bindings

Change-Id: I022306b4fe4c283b5196582b1af95c70954656ad
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

1 files changed, 28 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-video-phy.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-video-phy.txt
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index 000000000000..2215a41da859
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+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-video-phy.txt
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+ROCKCHIP RK3288 LVDS/TTL VIDEO PHY WITH INNO IP BLOCK
+
+Required properties:
+ - compatible : "rockchip,rk3288-video-phy";
+ - reg : the address offset of register for phy configuration.
+ - #phy-cells : must be 0. See ./phy-bindings.txt for details.
+ - clocks: must include clock specifiers corresponding to entries in the
+	   clock-names property. See ../clocks/clock-bindings.txt for details.
+ - clock-names: list of clock names sorted in the same order as the clocks
+		property. Must contain "pclk".
+ - resets : Must contain an entry for each entry in reset-names.
+	    See ../reset/reset.txt for details.
+ - reset-names : should be "rst".
+ - power-domains: Must contain a reference to the PM domain, if available.
+
+Example:
+
+	video_phy: video-phy@ff96c000 {
+		compatible = "rockchip,rk3288-video-phy";
+		reg = <0x0 0xff96c000 0x0 0x4000>;
+		clocks = <&cru PCLK_LVDS_PHY>;
+		clock-names = "pclk";
+		resets = <&cru SRST_LVDS_PHY>;
+		reset-names = "rst";
+		power-domains = <&power RK3288_PD_VIO>;
+		#phy-cells = <0>;
+		status = "disabled";
+	};