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authorWyon Bi <bivvy.bi@rock-chips.com>2019-01-02 16:45:24 +0800
committerTao Huang <huangtao@rock-chips.com>2019-01-04 20:42:53 +0800
commita21125375e550714b5b181d997ebddcfcc8291e7 (patch)
tree88e8fdeaff020dd080566c642f8e55316c774708 /Documentation
parentec3e26f716f6fc248823fffdd466813031b1db7d (diff)
dt-bindings: phy: phy-rockchip-inno-mipi-dphy: Remove support for rk3128
Change-Id: I3b09d88daa5864a9343a730f5f5ef850d0f168f6 Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/phy/phy-rockchip-inno-mipi-dphy.txt5
1 files changed, 0 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-mipi-dphy.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-mipi-dphy.txt
index 65a7da51deab..895b15082059 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-mipi-dphy.txt
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-mipi-dphy.txt
@@ -3,7 +3,6 @@ ROCKCHIP MIPI DPHY WITH INNO IP BLOCK
Required properties:
- compatible : must be one of:
"rockchip,rk1808-mipi-dphy";
- "rockchip,rk3128-mipi-dphy";
- reg : the address offset of register for mipi-dphy configuration.
- #phy-cells : must be 0. See ./phy-bindings.txt for details.
- clocks and clock-names:
@@ -17,10 +16,6 @@ Required properties:
- resets : phandle to the reset of MIPI DSI PHY APB clock.
- reset-names : should be "apb".
-Optional properties
- - clocks: phandle to the h2p clock.
- - clock-names: should be "h2p".
-
Example:
mipi_dphy: mipi-dphy@ff370000 {
compatible = "rockchip,rk1808-mipi-dphy";