diff options
| author | Randy Li <ayaka@soulik.info> | 2016-10-23 03:18:53 +0800 |
|---|---|---|
| committer | Huang, Tao <huangtao@rock-chips.com> | 2017-04-27 19:28:37 +0800 |
| commit | e34d729185599f2f37f61d7fae8d6d1d102b93a6 (patch) | |
| tree | 317ebf6d6231fda54f45e3bc1356d50991b7dee0 /Documentation | |
| parent | ef2cd29548975f82b5f06d50c2a4843d8535ac8b (diff) | |
drm/rockchip: analogix_dp: add supports for regulators in edp IP
I found if eDP_AVDD_1V0 and eDP_AVDD_1V8 are not been power at
RK3288, once trying to enable the pclk clock, the kernel would dead.
This patch would try to enable them first.
The eDP_AVDD_1V8 is used for eDP phy, and the eDP_AVDD_1V0 are used
both for eDP phy and controller.
Change-Id: I4e8a34609d5b292d7da77385ff15bebbf258090c
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Randy Li <randy.li@rock-chips.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt index f996e0d7be0b..ecb63962b4ff 100644 --- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt +++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt @@ -29,6 +29,10 @@ Required properties: Port 0: contained 2 endpoints, connecting to the output of vop. Port 1: contained 1 endpoint, connecting to the input of panel. +Optional properties +- vcc-supply: Regulator for eDP_AVDD_1V0. +- vccio-supply: Regulator for eDP_AVDD_1V8. + For the below properties, please refer to Analogix DP binding document: * Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt - phys (required) |