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| author | WeiYong Bi <bivvy.bi@rock-chips.com> | 2017-03-29 16:14:56 +0800 |
|---|---|---|
| committer | Huang, Tao <huangtao@rock-chips.com> | 2017-04-07 14:21:23 +0800 |
| commit | 7f1daee88f2a435a744e7b6a9649adc9ef8c2705 (patch) | |
| tree | 545adac1073bb905cbbfc183801a3c03779e4c16 /Documentation | |
| parent | 5c7c3607a69cf81753864cce81abc7bdfb64b17a (diff) | |
phy: rockchip-inno-mipi-dphy: Add reset control for PHY APB
Change-Id: I02915f0c5a291a1aa13c7e3ed45421667a19940d
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/phy/phy-rockchip-inno-mipi-dphy.txt | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-mipi-dphy.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-mipi-dphy.txt index 238e3405f8eb..94f4423442e5 100644 --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-mipi-dphy.txt +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-mipi-dphy.txt @@ -12,6 +12,10 @@ Required properties: - rockchip,dsi-panel : phandle to MIPI DSI panel node, used to get the display timing of the panel provided to the PHY module. +Optional properties + - resets : phandle to the reset of MIPI DSI PHY APB clock. + - reset-names : should be "apb". + Example: For Rockchip RK3368 @@ -22,6 +26,8 @@ mipi_dphy: mipi-dphy@ff968000 { #phy-cells = <0>; clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_DPHYTX0>; clock-names = "ref", "pclk"; + resets = <&cru SRST_MIPIDPHYTX>; + reset-names = "apb"; rockchip,dsi-panel = <&dsi_panel>; }; |