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authorAmit Pundir <amit.pundir@linaro.org>2018-10-03 13:37:01 +0530
committerAmit Pundir <amit.pundir@linaro.org>2018-10-03 15:00:28 +0530
commitc8f435d8fdd4388de3d7d5c21c19b69ba2dc8fc9 (patch)
treee66a01ac37972e66e21083e91adee1dfcf5003ba /Documentation/kernel-parameters.txt
parentd36d92bca7f25cd3376fd5710cfe80571d0b7b94 (diff)
parentc6ee9e74b237b01d0a4988de41acbf569fdb8974 (diff)
Merge branch 'linux-linaro-lsk-v4.4' into linux-linaro-lsk-v4.4-android
* linux-linaro-lsk-v4.4: (783 commits) Linux 4.4.159 iw_cxgb4: only allow 1 flush on user qps HID: sony: Support DS4 dongle HID: sony: Update device ids arm64: Add trace_hardirqs_off annotation in ret_to_user ext4: don't mark mmp buffer head dirty ext4: fix online resizing for bigalloc file systems with a 1k block size ext4: fix online resize's handling of a too-small final block group ext4: recalucate superblock checksum after updating free blocks/inodes ext4: avoid divide by zero fault when deleting corrupted inline directories tty: vt_ioctl: fix potential Spectre v1 drm/nouveau/drm/nouveau: Use pm_runtime_get_noresume() in connector_detect() ocfs2: fix ocfs2 read block panic scsi: target: iscsi: Use hex2bin instead of a re-implementation neighbour: confirm neigh entries when ARP packet is received net: hp100: fix always-true check for link up state net/appletalk: fix minor pointer leak to userspace in SIOCFINDIPDDPRT ipv6: fix possible use-after-free in ip6_xmit() gso_segment: Reset skb->mac_len after modifying network header mm: shmem.c: Correctly annotate new inodes for lockdep ... Conflicts: Makefile fs/squashfs/block.c include/uapi/linux/prctl.h kernel/fork.c kernel/sys.c Trivial merge conflicts in above files. Resolved by rebasing corresponding AOSP changes. arch/arm64/mm/init.c Pick the changes from upstream version of AOSP patch "arm64: check for upper PAGE_SHIFT bits in pfn_valid" instead. Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Diffstat (limited to 'Documentation/kernel-parameters.txt')
-rw-r--r--Documentation/kernel-parameters.txt45
1 files changed, 45 insertions, 0 deletions
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 7c4f1da0111d..b44281ccc9fe 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -2520,6 +2520,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
allow data leaks with this option, which is equivalent
to spectre_v2=off.
+ nospec_store_bypass_disable
+ [HW] Disable all mitigations for the Speculative Store Bypass vulnerability
+
noxsave [BUGS=X86] Disables x86 extended register state save
and restore using xsave. The kernel will fallback to
enabling legacy floating-point and sse state.
@@ -3687,6 +3690,48 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
Not specifying this option is equivalent to
spectre_v2=auto.
+ spec_store_bypass_disable=
+ [HW] Control Speculative Store Bypass (SSB) Disable mitigation
+ (Speculative Store Bypass vulnerability)
+
+ Certain CPUs are vulnerable to an exploit against a
+ a common industry wide performance optimization known
+ as "Speculative Store Bypass" in which recent stores
+ to the same memory location may not be observed by
+ later loads during speculative execution. The idea
+ is that such stores are unlikely and that they can
+ be detected prior to instruction retirement at the
+ end of a particular speculation execution window.
+
+ In vulnerable processors, the speculatively forwarded
+ store can be used in a cache side channel attack, for
+ example to read memory to which the attacker does not
+ directly have access (e.g. inside sandboxed code).
+
+ This parameter controls whether the Speculative Store
+ Bypass optimization is used.
+
+ on - Unconditionally disable Speculative Store Bypass
+ off - Unconditionally enable Speculative Store Bypass
+ auto - Kernel detects whether the CPU model contains an
+ implementation of Speculative Store Bypass and
+ picks the most appropriate mitigation. If the
+ CPU is not vulnerable, "off" is selected. If the
+ CPU is vulnerable the default mitigation is
+ architecture and Kconfig dependent. See below.
+ prctl - Control Speculative Store Bypass per thread
+ via prctl. Speculative Store Bypass is enabled
+ for a process by default. The state of the control
+ is inherited on fork.
+ seccomp - Same as "prctl" above, but all seccomp threads
+ will disable SSB unless they explicitly opt out.
+
+ Not specifying this option is equivalent to
+ spec_store_bypass_disable=auto.
+
+ Default mitigations:
+ X86: If CONFIG_SECCOMP=y "seccomp", otherwise "prctl"
+
spia_io_base= [HW,MTD]
spia_fio_base=
spia_pedr=