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authorXinhuang Li <buluess.li@rock-chips.com>2018-04-24 19:47:00 +0800
committerTao Huang <huangtao@rock-chips.com>2018-04-27 18:40:20 +0800
commitfcac9a5dc4d056e766dae8c63208b065c4ad8abd (patch)
tree73d271bae0530aa9a27c9056b0833306d42cc48f
parent03194abddb7b3395d2df117fd83c1610c9938a08 (diff)
arm64: dts: rockchip: rk3368: add spdif node
Change-Id: Ife612c36f3249cc44a97525eff9f4d3c3d751812 Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3368.dtsi19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 061b51b31192..89074a8d0941 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -1274,6 +1274,19 @@
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
};
+ spdif: spdif@ff880000 {
+ compatible = "rockchip,rk3368-spdif";
+ reg = <0x0 0xff880000 0x0 0x1000>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dmac_bus 3>;
+ dma-names = "tx";
+ clock-names = "mclk", "hclk";
+ clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spdif_bus>;
+ status = "disabled";
+ };
+
i2s_2ch: i2s-2ch@ff890000 {
compatible = "rockchip,rk3368-i2s", "rockchip,rk3066-i2s";
reg = <0x0 0xff890000 0x0 0x1000>;
@@ -2099,6 +2112,12 @@
};
};
+ spdif {
+ spdif_bus: spdif-bus {
+ rockchip,pins = <2 23 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
spi0 {
spi0_clk: spi0-clk {
rockchip,pins = <1 29 RK_FUNC_2 &pcfg_pull_up>;