diff options
| author | James Hogan <jhogan@kernel.org> | 2018-02-02 14:36:40 +0000 |
|---|---|---|
| committer | Ben Hutchings <ben@decadent.org.uk> | 2018-03-03 15:52:35 +0000 |
| commit | 964551125099d3dcf9934b2b36f52d692eba1865 (patch) | |
| tree | f1db38fa61a660a71c162551b16f4b1c1248d4f8 | |
| parent | b11db6eff5183b9e67006995a95699a43d84101b (diff) | |
MIPS: CPS: Fix MIPS_ISA_LEVEL_RAW fallout
commit 8dbc1864b74f5dea5a3f7c30ca8fd358a675132f upstream.
Commit 17278a91e04f ("MIPS: CPS: Fix r1 .set mt assembler warning")
added .set MIPS_ISA_LEVEL_RAW to silence warnings about .set mt on r1,
however this can result in a MOVE being encoded as a 64-bit DADDU
instruction on certain version of binutils (e.g. 2.22), and reserved
instruction exceptions at runtime on 32-bit hardware.
Reduce the sizes of the push/pop sections to include only instructions
that are part of the MT ASE or which won't convert to 64-bit
instructions after .set mips64r2/mips64r6.
Reported-by: Greg Ungerer <gerg@linux-m68k.org>
Fixes: 17278a91e04f ("MIPS: CPS: Fix r1 .set mt assembler warning")
Signed-off-by: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@linux-mips.org
Tested-by: Greg Ungerer <gerg@linux-m68k.org>
Patchwork: https://patchwork.linux-mips.org/patch/18578/
[bwh: Backported to 3.16: adjust context]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
| -rw-r--r-- | arch/mips/kernel/cps-vec.S | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S index 01eb8a671920..2017cbb2ade5 100644 --- a/arch/mips/kernel/cps-vec.S +++ b/arch/mips/kernel/cps-vec.S @@ -347,12 +347,13 @@ LEAF(mips_cps_boot_vpes) jr ra nop +1: /* Enter VPE configuration state */ .set push .set MIPS_ISA_LEVEL_RAW .set mt - -1: /* Enter VPE configuration state */ dvpe + .set pop + la t1, 1f jr.hb t1 nop @@ -379,6 +380,10 @@ LEAF(mips_cps_boot_vpes) mtc0 t0, CP0_VPECONTROL ehb + .set push + .set MIPS_ISA_LEVEL_RAW + .set mt + /* Skip the VPE if its TC is not halted */ mftc0 t0, CP0_TCHALT beqz t0, 2f @@ -437,6 +442,8 @@ LEAF(mips_cps_boot_vpes) ehb evpe + .set pop + /* Check whether this VPE is meant to be running */ li t0, 1 sll t0, t0, t9 @@ -451,7 +458,7 @@ LEAF(mips_cps_boot_vpes) 1: jr.hb t0 nop -2: .set pop +2: #endif /* CONFIG_MIPS_MT_SMP */ |