diff options
author | Finley Xiao <finley.xiao@rock-chips.com> | 2017-08-04 11:33:38 +0800 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2017-12-20 13:12:13 +0100 |
commit | 13bc2c0a6a14f430abaa6a859792418644b7febd (patch) | |
tree | 4c9f346c1692207dc05ea9cbb67251769cbacced | |
parent | 752fbc0c8da7403e75cf49bfb6432d474aeeaefa (diff) |
arm64: dts: rockchip: Add efuse device node for RK3328 SoCv4.16-rockchip-dts64-1
This patch adds an efuse node in the device tree for rk3228 SoC.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3328.dtsi | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 48f8d4fc34a3..8f84e5a1c43c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -531,6 +531,31 @@ status = "disabled"; }; + efuse: efuse@ff260000 { + compatible = "rockchip,rk3328-efuse"; + reg = <0x0 0xff260000 0x0 0x50>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&cru SCLK_EFUSE>; + clock-names = "pclk_efuse"; + rockchip,efuse-size = <0x20>; + + /* Data cells */ + efuse_id: id@7 { + reg = <0x07 0x10>; + }; + cpu_leakage: cpu-leakage@17 { + reg = <0x17 0x1>; + }; + logic_leakage: logic-leakage@19 { + reg = <0x19 0x1>; + }; + efuse_cpu_version: cpu-version@1a { + reg = <0x1a 0x1>; + bits = <3 3>; + }; + }; + saradc: adc@ff280000 { compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc"; reg = <0x0 0xff280000 0x0 0x100>; |