diff options
author | David Wu <david.wu@rock-chips.com> | 2019-05-29 10:57:50 +0800 |
---|---|---|
committer | Jianqun Xu <jay.xu@rock-chips.com> | 2019-06-26 09:07:07 +0800 |
commit | d69af8ab6534bb28c1556076f08d2a5ab4935d95 (patch) | |
tree | 0f658952143161131a31b07e3b2789d31179e791 | |
parent | e0169571c2effbbe7428e3e1f207671295dd7bfc (diff) |
pinctrl: rockchip: Add iomux recalculated for rk3328 GPIO2B0~GPIO2B6
The pins from GPIO2B0 to GPIO2B6 are located at GRF_GPIO2BL_IOMUX,
they are recalculated to get correct iomux.
Change-Id: I1e46697c4508c396b5e8140c32c4185925a040ea
Signed-off-by: David Wu <david.wu@rock-chips.com>
-rw-r--r-- | drivers/pinctrl/pinctrl-rockchip.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 6a7a11e488bd..016c54bc1050 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -888,12 +888,48 @@ static struct rockchip_mux_recalced_data rk3308b_mux_recalced_data[] = { static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = { { .num = 2, + .pin = 8, + .reg = 0x24, + .bit = 0, + .mask = 0x3 + }, { + .num = 2, + .pin = 9, + .reg = 0x24, + .bit = 2, + .mask = 0x3 + }, { + .num = 2, + .pin = 10, + .reg = 0x24, + .bit = 4, + .mask = 0x3 + }, { + .num = 2, + .pin = 11, + .reg = 0x24, + .bit = 6, + .mask = 0x3 + }, { + .num = 2, .pin = 12, .reg = 0x24, .bit = 8, .mask = 0x3 }, { .num = 2, + .pin = 13, + .reg = 0x24, + .bit = 10, + .mask = 0x3 + }, { + .num = 2, + .pin = 14, + .reg = 0x24, + .bit = 12, + .mask = 0x3 + }, { + .num = 2, .pin = 15, .reg = 0x28, .bit = 0, |