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authorHu Kejun <william.hu@rock-chips.com>2019-01-25 17:46:24 +0800
committerTao Huang <huangtao@rock-chips.com>2019-02-25 10:13:14 +0800
commitda97a12cb11524decb3d2e086e2377203cf7259b (patch)
treee1e385d796f6efee8b7079e94f0e49e10f118e5d
parent82b24cee159bbad1651085f9df2cc8bb27acef93 (diff)
media: rockchip: isp1: support iesharp/demosaiclp/wdr
Change-Id: Id27d87c15d455d00ff8bfe09b470929c5746d511 Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
-rw-r--r--drivers/media/platform/rockchip/isp1/isp_params.c531
-rw-r--r--drivers/media/platform/rockchip/isp1/isp_params.h12
-rw-r--r--drivers/media/platform/rockchip/isp1/regs.h105
-rw-r--r--include/uapi/linux/rkisp1-config.h188
4 files changed, 776 insertions, 60 deletions
diff --git a/drivers/media/platform/rockchip/isp1/isp_params.c b/drivers/media/platform/rockchip/isp1/isp_params.c
index 02e48b6fd912..90acfd8c120d 100644
--- a/drivers/media/platform/rockchip/isp1/isp_params.c
+++ b/drivers/media/platform/rockchip/isp1/isp_params.c
@@ -1081,8 +1081,8 @@ static void isp_ie_enable(struct rkisp1_isp_params_vdev *params_vdev, bool en)
{
if (en) {
isp_param_set_bits(params_vdev, CIF_ICCL, CIF_ICCL_IE_CLK);
- rkisp1_iowrite32(params_vdev, CIF_IMG_EFF_CTRL_ENABLE,
- CIF_IMG_EFF_CTRL);
+ isp_param_set_bits(params_vdev, CIF_IMG_EFF_CTRL,
+ CIF_IMG_EFF_CTRL_ENABLE);
isp_param_set_bits(params_vdev, CIF_IMG_EFF_CTRL,
CIF_IMG_EFF_CTRL_CFG_UPD);
} else {
@@ -1221,6 +1221,467 @@ static void isp_dpf_strength_config(struct rkisp1_isp_params_vdev *params_vdev,
rkisp1_iowrite32(params_vdev, arg->r, CIF_ISP_DPF_STRENGTH_R);
}
+static void isp_dummy_enable(struct rkisp1_isp_params_vdev *params_vdev,
+ bool en)
+{
+}
+
+static void isp_wdr_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
+ const struct cifisp_wdr_config *arg)
+{
+}
+
+static void isp_wdr_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
+ const struct cifisp_wdr_config *arg)
+{
+ int i;
+
+ for (i = 0; i < CIFISP_WDR_SIZE; i++) {
+ if (i <= 39)
+ rkisp1_iowrite32(params_vdev, arg->c_wdr[i],
+ CIF_ISP_WDR_CTRL + i * 4);
+ else
+ rkisp1_iowrite32(params_vdev, arg->c_wdr[i],
+ CIF_ISP_RKWDR_CTRL0 + (i - 40) * 4);
+ }
+}
+
+static void isp_wdr_enable_v12(struct rkisp1_isp_params_vdev *params_vdev,
+ bool en)
+{
+ if (en)
+ rkisp1_iowrite32(params_vdev, 0x030cf1,
+ CIF_ISP_RKWDR_CTRL0);
+ else
+ rkisp1_iowrite32(params_vdev, 0x030cf0,
+ CIF_ISP_RKWDR_CTRL0);
+}
+
+static void
+isp_demosaiclp_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
+ const struct cifisp_demosaiclp_config *arg)
+{
+}
+
+static void
+isp_demosaiclp_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
+ const struct cifisp_demosaiclp_config *arg)
+{
+ u32 val;
+ u32 level_sel;
+
+ val = CIF_ISP_PACK_4BYTE(arg->lu_divided[0],
+ arg->lu_divided[1],
+ arg->lu_divided[2],
+ arg->lu_divided[3]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_ISP_FILT_LU_DIVID);
+
+ val = CIF_ISP_PACK_4BYTE(arg->thgrad_divided[0],
+ arg->thgrad_divided[1],
+ arg->thgrad_divided[2],
+ arg->thgrad_divided[3]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_ISP_FILT_THGRAD_DIVID0123);
+ rkisp1_iowrite32(params_vdev,
+ arg->thgrad_divided[4],
+ CIF_ISP_FILT_THGRAD_DIVID4);
+
+ val = CIF_ISP_PACK_4BYTE(arg->thdiff_divided[0],
+ arg->thdiff_divided[1],
+ arg->thdiff_divided[2],
+ arg->thdiff_divided[3]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_ISP_FILT_THDIFF_DIVID0123);
+ rkisp1_iowrite32(params_vdev,
+ arg->thdiff_divided[4],
+ CIF_ISP_FILT_THDIFF_DIVID4);
+
+ val = CIF_ISP_PACK_4BYTE(arg->thcsc_divided[0],
+ arg->thcsc_divided[1],
+ arg->thcsc_divided[2],
+ arg->thcsc_divided[3]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_ISP_FILT_THCSC_DIVID0123);
+ rkisp1_iowrite32(params_vdev, arg->thcsc_divided[4],
+ CIF_ISP_FILT_THCSC_DIVID4);
+
+ val = CIF_ISP_PACK_2SHORT(arg->thvar_divided[0],
+ arg->thvar_divided[1]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_ISP_FILT_THVAR_DIVID01);
+
+ val = CIF_ISP_PACK_2SHORT(arg->thvar_divided[2],
+ arg->thvar_divided[3]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_ISP_FILT_THVAR_DIVID23);
+ rkisp1_iowrite32(params_vdev, arg->thvar_divided[4],
+ CIF_ISP_FILT_THVAR_DIVID4);
+
+ rkisp1_iowrite32(params_vdev, arg->th_grad,
+ CIF_ISP_FILT_TH_GRAD);
+ rkisp1_iowrite32(params_vdev, arg->th_diff,
+ CIF_ISP_FILT_TH_DIFF);
+ rkisp1_iowrite32(params_vdev, arg->th_csc,
+ CIF_ISP_FILT_TH_CSC);
+ rkisp1_iowrite32(params_vdev, arg->th_var,
+ CIF_ISP_FILT_TH_VAR);
+
+ val = CIF_ISP_PACK_4BYTE(arg->thvar_r_fct,
+ arg->thdiff_r_fct,
+ arg->thgrad_r_fct,
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_ISP_FILT_R_FCT);
+
+ val = CIF_ISP_PACK_4BYTE(arg->thgrad_b_fct,
+ arg->thdiff_b_fct,
+ arg->thvar_b_fct,
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_ISP_FILT_B_FCT);
+
+ isp_param_set_bits(params_vdev,
+ CIF_ISP_FILT_MODE,
+ arg->rb_filter_en << 3 |
+ arg->hp_filter_en << 2);
+
+ level_sel = rkisp1_ioread32(params_vdev, CIF_ISP_FILT_LELEL_SEL);
+ level_sel &= CIF_ISP_FLT_LEVEL_OLD_LP;
+ level_sel |= arg->th_var_en << 20 |
+ arg->th_csc_en << 19 |
+ arg->th_diff_en << 18 |
+ arg->th_grad_en << 17 |
+ arg->similarity_th << 12 |
+ arg->flat_level_sel << 8 |
+ arg->pattern_level_sel << 4 |
+ arg->edge_level_sel;
+
+ rkisp1_iowrite32(params_vdev, level_sel,
+ CIF_ISP_FILT_LELEL_SEL);
+}
+
+static void
+isp_demosaiclp_enable_v12(struct rkisp1_isp_params_vdev *params_vdev,
+ bool en)
+{
+ if (en)
+ isp_param_clear_bits(params_vdev,
+ CIF_ISP_FILT_LELEL_SEL,
+ CIF_ISP_FLT_LEVEL_OLD_LP);
+ else
+ isp_param_set_bits(params_vdev,
+ CIF_ISP_FILT_LELEL_SEL,
+ CIF_ISP_FLT_LEVEL_OLD_LP);
+}
+
+static void
+isp_rkiesharp_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
+ const struct cifisp_rkiesharp_config *arg)
+{
+}
+
+static void
+isp_rkiesharp_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
+ const struct cifisp_rkiesharp_config *arg)
+{
+ u32 i;
+ u32 val;
+ u32 eff_ctrl;
+ u32 minmax[5];
+
+ val = CIF_ISP_PACK_4BYTE(arg->yavg_thr[0],
+ arg->yavg_thr[1],
+ arg->yavg_thr[2],
+ arg->yavg_thr[3]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_YAVG_THR);
+
+ val = CIF_ISP_PACK_4BYTE(arg->delta1[0],
+ arg->delta2[0],
+ arg->delta1[1],
+ arg->delta2[1]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_DELTA_P0_P1);
+
+ val = CIF_ISP_PACK_4BYTE(arg->delta1[2],
+ arg->delta2[2],
+ arg->delta1[3],
+ arg->delta2[3]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_DELTA_P2_P3);
+
+ val = CIF_ISP_PACK_4BYTE(arg->delta1[4],
+ arg->delta2[4],
+ 0,
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_DELTA_P4);
+
+ for (i = 0; i < 5; i++)
+ minmax[i] = arg->minnumber[i] << 4 | arg->maxnumber[i];
+ val = CIF_ISP_PACK_4BYTE(minmax[0],
+ minmax[1],
+ minmax[2],
+ minmax[3]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_NPIXEL_P0_P1_P2_P3);
+ rkisp1_iowrite32(params_vdev, minmax[4],
+ CIF_RKSHARP_NPIXEL_P4);
+
+ val = CIF_ISP_PACK_4BYTE(arg->gauss_flat_coe[0],
+ arg->gauss_flat_coe[1],
+ arg->gauss_flat_coe[2],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_GAUSS_FLAT_COE1);
+
+ val = CIF_ISP_PACK_4BYTE(arg->gauss_flat_coe[3],
+ arg->gauss_flat_coe[4],
+ arg->gauss_flat_coe[5],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_GAUSS_FLAT_COE2);
+
+ val = CIF_ISP_PACK_4BYTE(arg->gauss_flat_coe[6],
+ arg->gauss_flat_coe[7],
+ arg->gauss_flat_coe[8],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_GAUSS_FLAT_COE3);
+
+ val = CIF_ISP_PACK_4BYTE(arg->gauss_noise_coe[0],
+ arg->gauss_noise_coe[1],
+ arg->gauss_noise_coe[2],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_GAUSS_NOISE_COE1);
+
+ val = CIF_ISP_PACK_4BYTE(arg->gauss_noise_coe[3],
+ arg->gauss_noise_coe[4],
+ arg->gauss_noise_coe[5],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_GAUSS_NOISE_COE2);
+
+ val = CIF_ISP_PACK_4BYTE(arg->gauss_noise_coe[6],
+ arg->gauss_noise_coe[7],
+ arg->gauss_noise_coe[8],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_GAUSS_NOISE_COE3);
+
+ val = CIF_ISP_PACK_4BYTE(arg->gauss_other_coe[0],
+ arg->gauss_other_coe[1],
+ arg->gauss_other_coe[2],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_GAUSS_OTHER_COE1);
+
+ val = CIF_ISP_PACK_4BYTE(arg->gauss_other_coe[3],
+ arg->gauss_other_coe[4],
+ arg->gauss_other_coe[5],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_GAUSS_OTHER_COE2);
+
+ val = CIF_ISP_PACK_4BYTE(arg->gauss_other_coe[6],
+ arg->gauss_other_coe[7],
+ arg->gauss_other_coe[8],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_GAUSS_OTHER_COE3);
+
+ val = CIF_ISP_PACK_4BYTE(arg->line1_filter_coe[0],
+ arg->line1_filter_coe[1],
+ arg->line1_filter_coe[2],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_LINE1_FILTER_COE1);
+
+ val = CIF_ISP_PACK_4BYTE(arg->line1_filter_coe[3],
+ arg->line1_filter_coe[4],
+ arg->line1_filter_coe[5],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_LINE1_FILTER_COE2);
+
+ val = CIF_ISP_PACK_4BYTE(arg->line2_filter_coe[0],
+ arg->line2_filter_coe[1],
+ arg->line2_filter_coe[2],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_LINE2_FILTER_COE1);
+
+ val = CIF_ISP_PACK_4BYTE(arg->line2_filter_coe[3],
+ arg->line2_filter_coe[4],
+ arg->line2_filter_coe[5],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_LINE2_FILTER_COE2);
+
+ val = CIF_ISP_PACK_4BYTE(arg->line2_filter_coe[6],
+ arg->line2_filter_coe[7],
+ arg->line2_filter_coe[8],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_LINE2_FILTER_COE3);
+
+ val = CIF_ISP_PACK_4BYTE(arg->line3_filter_coe[0],
+ arg->line3_filter_coe[1],
+ arg->line3_filter_coe[2],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_LINE3_FILTER_COE1);
+
+ val = CIF_ISP_PACK_4BYTE(arg->line3_filter_coe[3],
+ arg->line3_filter_coe[4],
+ arg->line3_filter_coe[5],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_LINE3_FILTER_COE2);
+
+ val = CIF_ISP_PACK_2SHORT(arg->grad_seq[0],
+ arg->grad_seq[1]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_GRAD_SEQ_P0_P1);
+
+ val = CIF_ISP_PACK_2SHORT(arg->grad_seq[2],
+ arg->grad_seq[3]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_GRAD_SEQ_P2_P3);
+
+ val = CIF_ISP_PACK_4BYTE(arg->sharp_factor[0],
+ arg->sharp_factor[1],
+ arg->sharp_factor[2],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_SHARP_FACTOR_P0_P1_P2);
+
+ val = CIF_ISP_PACK_4BYTE(arg->sharp_factor[3],
+ arg->sharp_factor[4],
+ 0,
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_SHARP_FACTOR_P3_P4);
+
+ val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[0],
+ arg->uv_gauss_flat_coe[1],
+ arg->uv_gauss_flat_coe[2],
+ arg->uv_gauss_flat_coe[3]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_UV_GAUSS_FLAT_COE11_COE14);
+
+ val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[4],
+ arg->uv_gauss_flat_coe[5],
+ arg->uv_gauss_flat_coe[6],
+ arg->uv_gauss_flat_coe[7]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_UV_GAUSS_FLAT_COE15_COE23);
+
+ val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[8],
+ arg->uv_gauss_flat_coe[9],
+ arg->uv_gauss_flat_coe[10],
+ arg->uv_gauss_flat_coe[11]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_UV_GAUSS_FLAT_COE24_COE32);
+
+ val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[12],
+ arg->uv_gauss_flat_coe[13],
+ arg->uv_gauss_flat_coe[14],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_UV_GAUSS_FLAT_COE33_COE35);
+
+ val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[0],
+ arg->uv_gauss_noise_coe[1],
+ arg->uv_gauss_noise_coe[2],
+ arg->uv_gauss_noise_coe[3]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_UV_GAUSS_NOISE_COE11_COE14);
+
+ val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[4],
+ arg->uv_gauss_noise_coe[5],
+ arg->uv_gauss_noise_coe[6],
+ arg->uv_gauss_noise_coe[7]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_UV_GAUSS_NOISE_COE15_COE23);
+
+ val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[8],
+ arg->uv_gauss_noise_coe[9],
+ arg->uv_gauss_noise_coe[10],
+ arg->uv_gauss_noise_coe[11]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_UV_GAUSS_NOISE_COE24_COE32);
+
+ val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[12],
+ arg->uv_gauss_noise_coe[13],
+ arg->uv_gauss_noise_coe[14],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_UV_GAUSS_NOISE_COE33_COE35);
+
+ val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[0],
+ arg->uv_gauss_other_coe[1],
+ arg->uv_gauss_other_coe[2],
+ arg->uv_gauss_other_coe[3]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_UV_GAUSS_OTHER_COE11_COE14);
+
+ val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[4],
+ arg->uv_gauss_other_coe[5],
+ arg->uv_gauss_other_coe[6],
+ arg->uv_gauss_other_coe[7]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_UV_GAUSS_OTHER_COE15_COE23);
+
+ val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[8],
+ arg->uv_gauss_other_coe[9],
+ arg->uv_gauss_other_coe[10],
+ arg->uv_gauss_other_coe[11]);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_UV_GAUSS_OTHER_COE24_COE32);
+
+ val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[12],
+ arg->uv_gauss_other_coe[13],
+ arg->uv_gauss_other_coe[14],
+ 0);
+ rkisp1_iowrite32(params_vdev, val,
+ CIF_RKSHARP_UV_GAUSS_OTHER_COE33_COE35);
+
+ rkisp1_iowrite32(params_vdev, arg->switch_avg,
+ CIF_RKSHARP_CTRL);
+
+ rkisp1_iowrite32(params_vdev,
+ arg->coring_thr,
+ CIF_IMG_EFF_SHARPEN);
+
+ val = rkisp1_ioread32(params_vdev, CIF_IMG_EFF_MAT_3) & 0x0F;
+ val |= (arg->lap_mat_coe[0] & 0x0F) << 4 |
+ (arg->lap_mat_coe[1] & 0x0F) << 8 |
+ (arg->lap_mat_coe[2] & 0x0F) << 12;
+ rkisp1_iowrite32(params_vdev, val, CIF_IMG_EFF_MAT_3);
+
+ val = (arg->lap_mat_coe[3] & 0x0F) << 0 |
+ (arg->lap_mat_coe[4] & 0x0F) << 4 |
+ (arg->lap_mat_coe[5] & 0x0F) << 8 |
+ (arg->lap_mat_coe[6] & 0x0F) << 12;
+ rkisp1_iowrite32(params_vdev, val, CIF_IMG_EFF_MAT_4);
+
+ val = (arg->lap_mat_coe[7] & 0x0F) << 0 |
+ (arg->lap_mat_coe[8] & 0x0F) << 4;
+ rkisp1_iowrite32(params_vdev, val, CIF_IMG_EFF_MAT_5);
+
+ eff_ctrl = rkisp1_ioread32(params_vdev, CIF_IMG_EFF_CTRL);
+ eff_ctrl &= ~CIF_IMG_EFF_CTRL_MODE_MASK;
+ eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_RKSHARPEN;
+
+ if (arg->full_range)
+ eff_ctrl |= CIF_IMG_EFF_CTRL_YCBCR_FULL;
+
+ rkisp1_iowrite32(params_vdev, eff_ctrl, CIF_IMG_EFF_CTRL);
+}
+
static struct rkisp1_isp_params_ops rkisp1_v10_isp_params_ops = {
.dpcc_config = isp_dpcc_config,
.bls_config = isp_bls_config,
@@ -1245,6 +1706,12 @@ static struct rkisp1_isp_params_ops rkisp1_v10_isp_params_ops = {
.csm_config = isp_csm_config,
.dpf_config = isp_dpf_config,
.dpf_strength_config = isp_dpf_strength_config,
+ .wdr_config = isp_wdr_config_v10,
+ .wdr_enable = isp_dummy_enable,
+ .demosaiclp_config = isp_demosaiclp_config_v10,
+ .demosaiclp_enable = isp_dummy_enable,
+ .rkiesharp_config = isp_rkiesharp_config_v10,
+ .rkiesharp_enable = isp_dummy_enable,
};
static struct rkisp1_isp_params_ops rkisp1_v12_isp_params_ops = {
@@ -1271,6 +1738,12 @@ static struct rkisp1_isp_params_ops rkisp1_v12_isp_params_ops = {
.csm_config = isp_csm_config,
.dpf_config = isp_dpf_config,
.dpf_strength_config = isp_dpf_strength_config,
+ .wdr_config = isp_wdr_config_v12,
+ .wdr_enable = isp_wdr_enable_v12,
+ .demosaiclp_config = isp_demosaiclp_config_v12,
+ .demosaiclp_enable = isp_demosaiclp_enable_v12,
+ .rkiesharp_config = isp_rkiesharp_config_v12,
+ .rkiesharp_enable = isp_ie_enable,
};
static struct rkisp1_isp_params_config rkisp1_v10_isp_params_config = {
@@ -1290,6 +1763,8 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
unsigned int module_en_update, module_cfg_update, module_ens;
struct rkisp1_isp_params_ops *ops = params_vdev->ops;
struct ispsd_in_fmt *in_fmt = &params_vdev->dev->isp_sdev.in_fmt;
+ bool ie_enable;
+ bool iesharp_enable;
bool is_grey_sensor;
is_grey_sensor = in_fmt->mbus_code == MEDIA_BUS_FMT_Y8_1X8 ||
@@ -1300,6 +1775,14 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
module_cfg_update = new_params->module_cfg_update;
module_ens = new_params->module_ens;
+ ie_enable = !!(module_ens & CIFISP_MODULE_IE);
+ iesharp_enable = !!(module_ens & CIFISP_MODULE_RK_IESHARP);
+ if (ie_enable && iesharp_enable) {
+ iesharp_enable = false;
+ dev_err(params_vdev->dev->dev,
+ "You can only use one mode in IE and RK_IESHARP!\n");
+ }
+
if ((module_en_update & CIFISP_MODULE_DPCC) ||
(module_cfg_update & CIFISP_MODULE_DPCC)) {
/*update dpc config */
@@ -1411,6 +1894,18 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
}
}
+ if ((module_en_update & CIFISP_MODULE_DEMOSAICLP) ||
+ (module_cfg_update & CIFISP_MODULE_DEMOSAICLP)) {
+ /* update demosaiclp config */
+ if ((module_cfg_update & CIFISP_MODULE_DEMOSAICLP))
+ ops->demosaiclp_config(params_vdev,
+ &new_params->others.demosaiclp_config);
+
+ if (module_en_update & CIFISP_MODULE_DEMOSAICLP)
+ ops->demosaiclp_enable(params_vdev,
+ !!(module_ens & CIFISP_MODULE_DEMOSAICLP));
+ }
+
if ((module_en_update & CIFISP_MODULE_FLT) ||
(module_cfg_update & CIFISP_MODULE_FLT)) {
/* update filter config */
@@ -1479,18 +1974,26 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
}
}
-
- if ((module_en_update & CIFISP_MODULE_IE) ||
- (module_cfg_update & CIFISP_MODULE_IE)) {
+ if (((module_en_update & CIFISP_MODULE_IE) ||
+ (module_cfg_update & CIFISP_MODULE_IE)) && ie_enable) {
/* update ie config */
if ((module_cfg_update & CIFISP_MODULE_IE))
ops->ie_config(params_vdev, &new_params->others.ie_config);
+ }
- if (module_en_update & CIFISP_MODULE_IE)
- ops->ie_enable(params_vdev,
- !!(module_ens & CIFISP_MODULE_IE));
+ if (((module_en_update & CIFISP_MODULE_RK_IESHARP) ||
+ (module_cfg_update & CIFISP_MODULE_RK_IESHARP)) && iesharp_enable) {
+ /* update rkiesharp config */
+ if ((module_cfg_update & CIFISP_MODULE_RK_IESHARP))
+ ops->rkiesharp_config(params_vdev,
+ &new_params->others.rkiesharp_config);
}
+ if (ie_enable || iesharp_enable)
+ ops->ie_enable(params_vdev, true);
+ else
+ ops->ie_enable(params_vdev, false);
+
if ((module_en_update & CIFISP_MODULE_DPF) ||
(module_cfg_update & CIFISP_MODULE_DPF)) {
/* update dpf config */
@@ -1515,6 +2018,18 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
ops->dpf_strength_config(params_vdev,
&new_params->others.dpf_strength_config);
}
+
+ if ((module_en_update & CIFISP_MODULE_WDR) ||
+ (module_cfg_update & CIFISP_MODULE_WDR)) {
+ /* update wdr config */
+ if ((module_cfg_update & CIFISP_MODULE_WDR))
+ ops->wdr_config(params_vdev,
+ &new_params->others.wdr_config);
+
+ if (module_en_update & CIFISP_MODULE_WDR)
+ ops->wdr_enable(params_vdev,
+ !!(module_ens & CIFISP_MODULE_WDR));
+ }
}
static __maybe_unused
diff --git a/drivers/media/platform/rockchip/isp1/isp_params.h b/drivers/media/platform/rockchip/isp1/isp_params.h
index 0da78682e4f5..ea707b7cf0e4 100644
--- a/drivers/media/platform/rockchip/isp1/isp_params.h
+++ b/drivers/media/platform/rockchip/isp1/isp_params.h
@@ -88,6 +88,18 @@ struct rkisp1_isp_params_ops {
const struct cifisp_dpf_config *arg);
void (*dpf_strength_config)(struct rkisp1_isp_params_vdev *params_vdev,
const struct cifisp_dpf_strength_config *arg);
+ void (*wdr_config)(struct rkisp1_isp_params_vdev *params_vdev,
+ const struct cifisp_wdr_config *arg);
+ void (*wdr_enable)(struct rkisp1_isp_params_vdev *params_vdev,
+ bool en);
+ void (*demosaiclp_config)(struct rkisp1_isp_params_vdev *params_vdev,
+ const struct cifisp_demosaiclp_config *arg);
+ void (*demosaiclp_enable)(struct rkisp1_isp_params_vdev *params_vdev,
+ bool en);
+ void (*rkiesharp_config)(struct rkisp1_isp_params_vdev *params_vdev,
+ const struct cifisp_rkiesharp_config *arg);
+ void (*rkiesharp_enable)(struct rkisp1_isp_params_vdev *params_vdev,
+ bool en);
};
struct rkisp1_isp_params_config {
diff --git a/drivers/media/platform/rockchip/isp1/regs.h b/drivers/media/platform/rockchip/isp1/regs.h
index 1aebd88f5004..a004bf05b17a 100644
--- a/drivers/media/platform/rockchip/isp1/regs.h
+++ b/drivers/media/platform/rockchip/isp1/regs.h
@@ -36,6 +36,13 @@
#define _RKISP1_REGS_H
#include "dev.h"
+#define CIF_ISP_PACK_4BYTE(a, b, c, d) \
+ (((a) & 0xFF) << 0 | ((b) & 0xFF) << 8 | \
+ ((c) & 0xFF) << 16 | ((d) & 0xFF) << 24)
+
+#define CIF_ISP_PACK_2SHORT(a, b) \
+ (((a) & 0xFFFF) << 0 | ((b) & 0xFFFF) << 16)
+
/* GRF */
#define GRF_VI_CON0 0x430
#define ISP_CIF_DATA_WIDTH_MASK 0x60006000
@@ -340,6 +347,7 @@
#define CIF_IMG_EFF_CTRL_MODE_EMBOSS (4 << 1)
#define CIF_IMG_EFF_CTRL_MODE_SKETCH (5 << 1)
#define CIF_IMG_EFF_CTRL_MODE_SHARPEN (6 << 1)
+#define CIF_IMG_EFF_CTRL_MODE_RKSHARPEN (7 << 1)
#define CIF_IMG_EFF_CTRL_CFG_UPD BIT(4)
#define CIF_IMG_EFF_CTRL_YCBCR_FULL BIT(5)
@@ -658,6 +666,8 @@
#define CIF_ISP_CTK_COEFF_RESERVED 0xFFFFF800
#define CIF_ISP_XTALK_OFFSET_RESERVED 0xFFFFF000
+#define CIF_ISP_FLT_LEVEL_OLD_LP BIT(16)
+
/* GOC */
#define CIF_ISP_GAMMA_OUT_MODE_EQU BIT(0)
#define CIF_ISP_GOC_MODE_MAX 1
@@ -763,6 +773,46 @@
#define CIF_IMG_EFF_CTRL_SHD (CIF_IMG_EFF_BASE + 0x00000020)
#define CIF_IMG_EFF_SHARPEN (CIF_IMG_EFF_BASE + 0x00000024)
+#define CIF_RKSHARP_CTRL (CIF_IMG_EFF_BASE + 0x00000030)
+#define CIF_RKSHARP_YAVG_THR (CIF_IMG_EFF_BASE + 0x00000034)
+#define CIF_RKSHARP_DELTA_P0_P1 (CIF_IMG_EFF_BASE + 0x00000038)
+#define CIF_RKSHARP_DELTA_P2_P3 (CIF_IMG_EFF_BASE + 0x0000003c)
+#define CIF_RKSHARP_DELTA_P4 (CIF_IMG_EFF_BASE + 0x00000040)
+#define CIF_RKSHARP_NPIXEL_P0_P1_P2_P3 (CIF_IMG_EFF_BASE + 0x00000044)
+#define CIF_RKSHARP_NPIXEL_P4 (CIF_IMG_EFF_BASE + 0x00000048)
+#define CIF_RKSHARP_GAUSS_FLAT_COE1 (CIF_IMG_EFF_BASE + 0x0000004c)
+#define CIF_RKSHARP_GAUSS_FLAT_COE2 (CIF_IMG_EFF_BASE + 0x00000050)
+#define CIF_RKSHARP_GAUSS_FLAT_COE3 (CIF_IMG_EFF_BASE + 0x00000054)
+#define CIF_RKSHARP_GAUSS_NOISE_COE1 (CIF_IMG_EFF_BASE + 0x00000058)
+#define CIF_RKSHARP_GAUSS_NOISE_COE2 (CIF_IMG_EFF_BASE + 0x0000005c)
+#define CIF_RKSHARP_GAUSS_NOISE_COE3 (CIF_IMG_EFF_BASE + 0x00000060)
+#define CIF_RKSHARP_GAUSS_OTHER_COE1 (CIF_IMG_EFF_BASE + 0x00000064)
+#define CIF_RKSHARP_GAUSS_OTHER_COE2 (CIF_IMG_EFF_BASE + 0x00000068)
+#define CIF_RKSHARP_GAUSS_OTHER_COE3 (CIF_IMG_EFF_BASE + 0x0000006c)
+#define CIF_RKSHARP_LINE1_FILTER_COE1 (CIF_IMG_EFF_BASE + 0x00000070)
+#define CIF_RKSHARP_LINE1_FILTER_COE2 (CIF_IMG_EFF_BASE + 0x00000074)
+#define CIF_RKSHARP_LINE2_FILTER_COE1 (CIF_IMG_EFF_BASE + 0x00000078)
+#define CIF_RKSHARP_LINE2_FILTER_COE2 (CIF_IMG_EFF_BASE + 0x0000007c)
+#define CIF_RKSHARP_LINE2_FILTER_COE3 (CIF_IMG_EFF_BASE + 0x00000080)
+#define CIF_RKSHARP_LINE3_FILTER_COE1 (CIF_IMG_EFF_BASE + 0x00000084)
+#define CIF_RKSHARP_LINE3_FILTER_COE2 (CIF_IMG_EFF_BASE + 0x00000088)
+#define CIF_RKSHARP_GRAD_SEQ_P0_P1 (CIF_IMG_EFF_BASE + 0x0000008c)
+#define CIF_RKSHARP_GRAD_SEQ_P2_P3 (CIF_IMG_EFF_BASE + 0x00000090)
+#define CIF_RKSHARP_SHARP_FACTOR_P0_P1_P2 (CIF_IMG_EFF_BASE + 0x00000094)
+#define CIF_RKSHARP_SHARP_FACTOR_P3_P4 (CIF_IMG_EFF_BASE + 0x00000098)
+#define CIF_RKSHARP_UV_GAUSS_FLAT_COE11_COE14 (CIF_IMG_EFF_BASE + 0x0000009c)
+#define CIF_RKSHARP_UV_GAUSS_FLAT_COE15_COE23 (CIF_IMG_EFF_BASE + 0x000000a0)
+#define CIF_RKSHARP_UV_GAUSS_FLAT_COE24_COE32 (CIF_IMG_EFF_BASE + 0x000000a4)
+#define CIF_RKSHARP_UV_GAUSS_FLAT_COE33_COE35 (CIF_IMG_EFF_BASE + 0x000000a8)
+#define CIF_RKSHARP_UV_GAUSS_NOISE_COE11_COE14 (CIF_IMG_EFF_BASE + 0x000000ac)
+#define CIF_RKSHARP_UV_GAUSS_NOISE_COE15_COE23 (CIF_IMG_EFF_BASE + 0x000000b0)
+#define CIF_RKSHARP_UV_GAUSS_NOISE_COE24_COE32 (CIF_IMG_EFF_BASE + 0x000000b4)
+#define CIF_RKSHARP_UV_GAUSS_NOISE_COE33_COE35 (CIF_IMG_EFF_BASE + 0x000000b8)
+#define CIF_RKSHARP_UV_GAUSS_OTHER_COE11_COE14 (CIF_IMG_EFF_BASE + 0x000000bc)
+#define CIF_RKSHARP_UV_GAUSS_OTHER_COE15_COE23 (CIF_IMG_EFF_BASE + 0x000000c0)
+#define CIF_RKSHARP_UV_GAUSS_OTHER_COE24_COE32 (CIF_IMG_EFF_BASE + 0x000000c4)
+#define CIF_RKSHARP_UV_GAUSS_OTHER_COE33_COE35 (CIF_IMG_EFF_BASE + 0x000000c8)
+
#define CIF_SUPER_IMP_BASE 0x00000300
#define CIF_SUPER_IMP_CTRL (CIF_SUPER_IMP_BASE + 0x00000000)
#define CIF_SUPER_IMP_OFFSET_X (CIF_SUPER_IMP_BASE + 0x00000004)
@@ -1246,6 +1296,30 @@
#define CIF_ISP_FILT_FAC_MID (CIF_ISP_FILT_BASE + 0x00000044)
#define CIF_ISP_FILT_FAC_BL0 (CIF_ISP_FILT_BASE + 0x00000048)
#define CIF_ISP_FILT_FAC_BL1 (CIF_ISP_FILT_BASE + 0x0000004C)
+#define CIF_ISP_FILT_ISP_CAC_CTRL (CIF_ISP_FILT_BASE + 0x00000080)
+#define CIF_ISP_FILT_CAC_COUNT_START (CIF_ISP_FILT_BASE + 0x00000084)
+#define CIF_ISP_FILT_CAC_A (CIF_ISP_FILT_BASE + 0x00000088)
+#define CIF_ISP_FILT_CAC_B (CIF_ISP_FILT_BASE + 0x0000008c)
+#define CIF_ISP_FILT_CAC_C (CIF_ISP_FILT_BASE + 0x00000090)
+#define CIF_ISP_FILT_CAC_X_NORM (CIF_ISP_FILT_BASE + 0x00000094)
+#define CIF_ISP_FILT_CAC_Y_NORM (CIF_ISP_FILT_BASE + 0x00000098)
+#define CIF_ISP_FILT_LU_DIVID (CIF_ISP_FILT_BASE + 0x000000a0)
+#define CIF_ISP_FILT_THGRAD_DIVID0123 (CIF_ISP_FILT_BASE + 0x000000a4)
+#define CIF_ISP_FILT_THGRAD_DIVID4 (CIF_ISP_FILT_BASE + 0x000000a8)
+#define CIF_ISP_FILT_THDIFF_DIVID0123 (CIF_ISP_FILT_BASE + 0x000000ac)
+#define CIF_ISP_FILT_THDIFF_DIVID4 (CIF_ISP_FILT_BASE + 0x000000b0)
+#define CIF_ISP_FILT_THCSC_DIVID0123 (CIF_ISP_FILT_BASE + 0x000000b4)
+#define CIF_ISP_FILT_THCSC_DIVID4 (CIF_ISP_FILT_BASE + 0x000000b8)
+#define CIF_ISP_FILT_THVAR_DIVID01 (CIF_ISP_FILT_BASE + 0x000000bc)
+#define CIF_ISP_FILT_THVAR_DIVID23 (CIF_ISP_FILT_BASE + 0x000000c0)
+#define CIF_ISP_FILT_THVAR_DIVID4 (CIF_ISP_FILT_BASE + 0x000000c4)
+#define CIF_ISP_FILT_TH_GRAD (CIF_ISP_FILT_BASE + 0x000000c8)
+#define CIF_ISP_FILT_TH_DIFF (CIF_ISP_FILT_BASE + 0x000000cc)
+#define CIF_ISP_FILT_TH_CSC (CIF_ISP_FILT_BASE + 0x000000d0)
+#define CIF_ISP_FILT_TH_VAR (CIF_ISP_FILT_BASE + 0x000000d4)
+#define CIF_ISP_FILT_LELEL_SEL (CIF_ISP_FILT_BASE + 0x000000d8)
+#define CIF_ISP_FILT_R_FCT (CIF_ISP_FILT_BASE + 0x000000dc)
+#define CIF_ISP_FILT_B_FCT (CIF_ISP_FILT_BASE + 0x000000e0)
#define CIF_ISP_CAC_BASE 0x00002580
#define CIF_ISP_CAC_CTRL (CIF_ISP_CAC_BASE + 0x00000000)
@@ -1450,6 +1524,37 @@
#define CIF_ISP_WDR_TONECURVE_YM_31_SHD (CIF_ISP_WDR_BASE + 0x0000012C)
#define CIF_ISP_WDR_TONECURVE_YM_32_SHD (CIF_ISP_WDR_BASE + 0x00000130)
+#define CIF_ISP_RKWDR_CTRL0 (CIF_ISP_WDR_BASE + 0x00000150)
+#define CIF_ISP_RKWDR_CTRL1 (CIF_ISP_WDR_BASE + 0x00000154)
+#define CIF_ISP_RKWDR_BLKOFF0 (CIF_ISP_WDR_BASE + 0x00000158)
+#define CIF_ISP_RKWDR_AVGCLIP (CIF_ISP_WDR_BASE + 0x0000015c)
+#define CIF_ISP_RKWDR_COE_0 (CIF_ISP_WDR_BASE + 0x00000160)
+#define CIF_ISP_RKWDR_COE_1 (CIF_ISP_WDR_BASE + 0x00000164)
+#define CIF_ISP_RKWDR_COE_2 (CIF_ISP_WDR_BASE + 0x00000168)
+#define CIF_ISP_RKWDR_COE_OFF (CIF_ISP_WDR_BASE + 0x0000016c)
+#define CIF_ISP_RKWDR_OVERL (CIF_ISP_WDR_BASE + 0x00000170)
+#define CIF_ISP_RKWDR_BLKOFF1 (CIF_ISP_WDR_BASE + 0x00000174)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW0_0TO3 (CIF_ISP_WDR_BASE + 0x00000180)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW0_4TO7 (CIF_ISP_WDR_BASE + 0x00000184)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW1_0TO3 (CIF_ISP_WDR_BASE + 0x00000188)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW1_4TO7 (CIF_ISP_WDR_BASE + 0x0000018c)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW2_0TO3 (CIF_ISP_WDR_BASE + 0x00000190)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW2_4TO7 (CIF_ISP_WDR_BASE + 0x00000194)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW3_0TO3 (CIF_ISP_WDR_BASE + 0x00000198)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW3_4TO7 (CIF_ISP_WDR_BASE + 0x0000019c)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW4_0TO3 (CIF_ISP_WDR_BASE + 0x000001a0)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW4_4TO7 (CIF_ISP_WDR_BASE + 0x000001a4)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW5_0TO3 (CIF_ISP_WDR_BASE + 0x000001a8)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW5_4TO7 (CIF_ISP_WDR_BASE + 0x000001ac)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW6_0TO3 (CIF_ISP_WDR_BASE + 0x000001b0)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW6_4TO7 (CIF_ISP_WDR_BASE + 0x000001b4)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW7_0TO3 (CIF_ISP_WDR_BASE + 0x000001b8)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW7_4TO7 (CIF_ISP_WDR_BASE + 0x000001bc)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW8_0TO3 (CIF_ISP_WDR_BASE + 0x000001c0)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW8_4TO7 (CIF_ISP_WDR_BASE + 0x000001c4)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW9_0TO3 (CIF_ISP_WDR_BASE + 0x000001c8)
+#define CIF_ISP_RKWDR_BLKMEAN8_ROW9_4TO7 (CIF_ISP_WDR_BASE + 0x000001cc)
+
#define CIF_ISP_HIST_BASE_V12 0x00002C00
#define CIF_ISP_HIST_CTRL_V12 (CIF_ISP_HIST_BASE_V12 + 0x00000000)
#define CIF_ISP_HIST_SIZE_V12 (CIF_ISP_HIST_BASE_V12 + 0x00000004)
diff --git a/include/uapi/linux/rkisp1-config.h b/include/uapi/linux/rkisp1-config.h
index 393f4449e1d4..ff977e9687ec 100644
--- a/include/uapi/linux/rkisp1-config.h
+++ b/include/uapi/linux/rkisp1-config.h
@@ -10,106 +10,111 @@
#include <linux/types.h>
#include <linux/v4l2-controls.h>
-#define CIFISP_MODULE_DPCC (1 << 0)
-#define CIFISP_MODULE_BLS (1 << 1)
-#define CIFISP_MODULE_SDG (1 << 2)
-#define CIFISP_MODULE_HST (1 << 3)
-#define CIFISP_MODULE_LSC (1 << 4)
-#define CIFISP_MODULE_AWB_GAIN (1 << 5)
-#define CIFISP_MODULE_FLT (1 << 6)
-#define CIFISP_MODULE_BDM (1 << 7)
-#define CIFISP_MODULE_CTK (1 << 8)
-#define CIFISP_MODULE_GOC (1 << 9)
-#define CIFISP_MODULE_CPROC (1 << 10)
-#define CIFISP_MODULE_AFC (1 << 11)
-#define CIFISP_MODULE_AWB (1 << 12)
-#define CIFISP_MODULE_IE (1 << 13)
-#define CIFISP_MODULE_AEC (1 << 14)
-#define CIFISP_MODULE_WDR (1 << 15)
-#define CIFISP_MODULE_DPF (1 << 16)
-#define CIFISP_MODULE_DPF_STRENGTH (1 << 17)
-
-#define CIFISP_CTK_COEFF_MAX 0x100
-#define CIFISP_CTK_OFFSET_MAX 0x800
-
-#define CIFISP_AE_MEAN_MAX 81
-#define CIFISP_HIST_BIN_N_MAX 32
-#define CIFISP_AFM_MAX_WINDOWS 3
-#define CIFISP_DEGAMMA_CURVE_SIZE 17
-
-#define CIFISP_BDM_MAX_TH 0xFF
+#define CIFISP_MODULE_DPCC (1 << 0)
+#define CIFISP_MODULE_BLS (1 << 1)
+#define CIFISP_MODULE_SDG (1 << 2)
+#define CIFISP_MODULE_HST (1 << 3)
+#define CIFISP_MODULE_LSC (1 << 4)
+#define CIFISP_MODULE_AWB_GAIN (1 << 5)
+#define CIFISP_MODULE_FLT (1 << 6)
+#define CIFISP_MODULE_BDM (1 << 7)
+#define CIFISP_MODULE_CTK (1 << 8)
+#define CIFISP_MODULE_GOC (1 << 9)
+#define CIFISP_MODULE_CPROC (1 << 10)
+#define CIFISP_MODULE_AFC (1 << 11)
+#define CIFISP_MODULE_AWB (1 << 12)
+#define CIFISP_MODULE_IE (1 << 13)
+#define CIFISP_MODULE_AEC (1 << 14)
+#define CIFISP_MODULE_WDR (1 << 15)
+#define CIFISP_MODULE_DPF (1 << 16)
+#define CIFISP_MODULE_DPF_STRENGTH (1 << 17)
+#define CIFISP_MODULE_DEMOSAICLP (1 << 18)
+#define CIFISP_MODULE_RK_IESHARP (1 << 19)
+
+#define CIFISP_CTK_COEFF_MAX 0x100
+#define CIFISP_CTK_OFFSET_MAX 0x800
+
+#define CIFISP_AE_MEAN_MAX 81
+#define CIFISP_HIST_BIN_N_MAX 32
+#define CIFISP_AFM_MAX_WINDOWS 3
+#define CIFISP_DEGAMMA_CURVE_SIZE 17
+
+#define CIFISP_BDM_MAX_TH 0xFF
/*
* Black level compensation
*/
/* maximum value for horizontal start address */
-#define CIFISP_BLS_START_H_MAX 0x00000FFF
+#define CIFISP_BLS_START_H_MAX 0x00000FFF
/* maximum value for horizontal stop address */
-#define CIFISP_BLS_STOP_H_MAX 0x00000FFF
+#define CIFISP_BLS_STOP_H_MAX 0x00000FFF
/* maximum value for vertical start address */
-#define CIFISP_BLS_START_V_MAX 0x00000FFF
+#define CIFISP_BLS_START_V_MAX 0x00000FFF
/* maximum value for vertical stop address */
-#define CIFISP_BLS_STOP_V_MAX 0x00000FFF
+#define CIFISP_BLS_STOP_V_MAX 0x00000FFF
/* maximum is 2^18 = 262144*/
-#define CIFISP_BLS_SAMPLES_MAX 0x00000012
+#define CIFISP_BLS_SAMPLES_MAX 0x00000012
/* maximum value for fixed black level */
-#define CIFISP_BLS_FIX_SUB_MAX 0x00000FFF
+#define CIFISP_BLS_FIX_SUB_MAX 0x00000FFF
/* minimum value for fixed black level */
-#define CIFISP_BLS_FIX_SUB_MIN 0xFFFFF000
+#define CIFISP_BLS_FIX_SUB_MIN 0xFFFFF000
/* 13 bit range (signed)*/
-#define CIFISP_BLS_FIX_MASK 0x00001FFF
+#define CIFISP_BLS_FIX_MASK 0x00001FFF
/*
* Automatic white balance measurments
*/
-#define CIFISP_AWB_MAX_GRID 1
-#define CIFISP_AWB_MAX_FRAMES 7
+#define CIFISP_AWB_MAX_GRID 1
+#define CIFISP_AWB_MAX_FRAMES 7
/*
* Gamma out
*/
/* Maximum number of color samples supported */
-#define CIFISP_GAMMA_OUT_MAX_SAMPLES 34
+#define CIFISP_GAMMA_OUT_MAX_SAMPLES 34
/*
* Lens shade correction
*/
-#define CIFISP_LSC_GRAD_TBL_SIZE 8
-#define CIFISP_LSC_SIZE_TBL_SIZE 8
+#define CIFISP_LSC_GRAD_TBL_SIZE 8
+#define CIFISP_LSC_SIZE_TBL_SIZE 8
/*
* The following matches the tuning process,
* not the max capabilities of the chip.
* Last value unused.
*/
-#define CIFISP_LSC_DATA_TBL_SIZE 290
+#define CIFISP_LSC_DATA_TBL_SIZE 290
/*
* Histogram calculation
*/
/* Last 3 values unused. */
-#define CIFISP_HISTOGRAM_WEIGHT_GRIDS_SIZE 81
+#define CIFISP_HISTOGRAM_WEIGHT_GRIDS_SIZE 81
/*
* Defect Pixel Cluster Correction
*/
-#define CIFISP_DPCC_METHODS_MAX 3
+#define CIFISP_DPCC_METHODS_MAX 3
/*
* Denoising pre filter
*/
-#define CIFISP_DPF_MAX_NLF_COEFFS 17
-#define CIFISP_DPF_MAX_SPATIAL_COEFFS 6
+#define CIFISP_DPF_MAX_NLF_COEFFS 17
+#define CIFISP_DPF_MAX_SPATIAL_COEFFS 6
+
+/* WDR */
+#define CIFISP_WDR_SIZE 48
/*
* Measurement types
*/
-#define CIFISP_STAT_AWB (1 << 0)
-#define CIFISP_STAT_AUTOEXP (1 << 1)
-#define CIFISP_STAT_AFM_FIN (1 << 2)
-#define CIFISP_STAT_HIST (1 << 3)
-#define CIFISP_STAT_EMB_DATA (1 << 4)
+#define CIFISP_STAT_AWB (1 << 0)
+#define CIFISP_STAT_AUTOEXP (1 << 1)
+#define CIFISP_STAT_AFM_FIN (1 << 2)
+#define CIFISP_STAT_HIST (1 << 3)
+#define CIFISP_STAT_EMB_DATA (1 << 4)
-#define CIFISP_ADD_DATA_FIFO_SIZE (2048 * 4)
+#define CIFISP_ADD_DATA_FIFO_SIZE (2048 * 4)
/*
* private control id
@@ -582,6 +587,82 @@ struct cifisp_dpf_strength_config {
} __attribute__ ((packed));
/**
+ * enum cifisp_wdr_mode - wdr mode
+ * @CIFISP_WDR_MODE_BLOCK: use a linear scaling
+ * @CIFISP_WDR_MODE_GLOBAL: use a logarithmic scaling
+ */
+enum cifisp_wdr_mode {
+ CIFISP_WDR_MODE_BLOCK,
+ CIFISP_WDR_MODE_GLOBAL
+};
+
+/**
+ * struct cifisp_wdr_config - Gamma Out correction
+ */
+struct cifisp_wdr_config {
+ enum cifisp_wdr_mode mode;
+ unsigned int c_wdr[CIFISP_WDR_SIZE];
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_demosaiclp_config - rk demosiac low pass
+ */
+struct cifisp_demosaiclp_config {
+ unsigned char rb_filter_en;
+ unsigned char hp_filter_en;
+ unsigned char lu_divided[4];
+ unsigned char thgrad_divided[5];
+ unsigned char thdiff_divided[5];
+ unsigned char thcsc_divided[5];
+ unsigned short thvar_divided[5];
+ unsigned char th_grad;
+ unsigned char th_diff;
+ unsigned char th_csc;
+ unsigned short th_var;
+ unsigned char th_var_en;
+ unsigned char th_csc_en;
+ unsigned char th_diff_en;
+ unsigned char th_grad_en;
+ unsigned char use_old_lp;
+ unsigned char similarity_th;
+ unsigned char flat_level_sel;
+ unsigned char pattern_level_sel;
+ unsigned char edge_level_sel;
+ unsigned char thgrad_r_fct;
+ unsigned char thdiff_r_fct;
+ unsigned char thvar_r_fct;
+ unsigned char thgrad_b_fct;
+ unsigned char thdiff_b_fct;
+ unsigned char thvar_b_fct;
+} __attribute__ ((packed));
+
+/**
+ * struct cifisp_rkiesharp_config - rk ie sharp
+ */
+struct cifisp_rkiesharp_config {
+ unsigned char coring_thr;
+ unsigned char full_range;
+ unsigned char switch_avg;
+ unsigned char yavg_thr[4];
+ unsigned char delta1[5];
+ unsigned char delta2[5];
+ unsigned char maxnumber[5];
+ unsigned char minnumber[5];
+ unsigned char gauss_flat_coe[9];
+ unsigned char gauss_noise_coe[9];
+ unsigned char gauss_other_coe[9];
+ unsigned char line1_filter_coe[6];
+ unsigned char line2_filter_coe[9];
+ unsigned char line3_filter_coe[6];
+ unsigned short grad_seq[4];
+ unsigned char sharp_factor[5];
+ unsigned char uv_gauss_flat_coe[15];
+ unsigned char uv_gauss_noise_coe[15];
+ unsigned char uv_gauss_other_coe[15];
+ unsigned char lap_mat_coe[9];
+} __attribute__ ((packed));
+
+/**
* struct cifisp_isp_other_cfg - Parameters for some blocks in rockchip isp1
*
* @dpcc_config: Defect Pixel Cluster Correction config
@@ -613,6 +694,9 @@ struct cifisp_isp_other_cfg {
struct cifisp_dpf_strength_config dpf_strength_config;
struct cifisp_cproc_config cproc_config;
struct cifisp_ie_config ie_config;
+ struct cifisp_wdr_config wdr_config;
+ struct cifisp_demosaiclp_config demosaiclp_config;
+ struct cifisp_rkiesharp_config rkiesharp_config;
} __attribute__ ((packed));
/**