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| author | Ziyuan Xu <xzy.xu@rock-chips.com> | 2019-03-12 17:33:15 +0800 |
|---|---|---|
| committer | Ziyuan Xu <xzy.xu@rock-chips.com> | 2019-03-12 17:33:15 +0800 |
| commit | 9e819b52e3444538c2b641656b9dc02750968ce5 (patch) | |
| tree | 9251f7717faec7ccea8a06f84a05592d2284c3fa | |
| parent | 5d1f66da5a3859f740d14df3357dd764191c26bc (diff) | |
arm64: dts: rockchip: px30: add reset properties for watchdog
Change-Id: I83a7762c23a4caaa5d3d3cd5e8e79b288f8662b4
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 129171dac1de..b55cf7183933 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -827,6 +827,8 @@ reg = <0x0 0xff1e0000 0x0 0x100>; clocks = <&cru PCLK_WDT_NS>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + resets = <&cru SRST_WDT_NS_P>; + reset-names = "reset"; status = "disabled"; }; |