diff options
| author | Ziyuan Xu <xzy.xu@rock-chips.com> | 2018-03-22 11:52:25 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-03-22 18:18:10 +0800 |
| commit | b947e52a9d78ed4c3d04c6d23e13d56767776f71 (patch) | |
| tree | 5641db81cd0572816164f2f97853bf12f63a3f78 | |
| parent | e8391a64744ae35825e89dcbe7ff198052fc9f6d (diff) | |
arm64: dts: rockchip: add bt & wifi support for rk3308-evb-v10 board
Change-Id: Id8e1f648cbecfa8d773baa9aa5803a8bffabff57
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi | 22 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 |
2 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi index 02e07771b507..9338e71d6046 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi @@ -168,6 +168,28 @@ pinctrl-0 = <&usb_drv>; regulator-name = "vbus_host"; }; + + wireless-bluetooth { + compatible = "bluetooth-platdata"; + clocks = <&cru SCLK_RTC32K>; + clock-names = "ext_clock"; + uart_rts_gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "rts_gpio"; + pinctrl-0 = <&uart4_rts>; + pinctrl-1 = <&uart4_rts_gpio>; + BT,reset_gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; + BT,wake_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; + BT,wake_host_irq = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + wireless-wlan { + compatible = "wlan-platdata"; + rockchip,grf = <&grf>; + wifi_chip_type = "ap6255"; + WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; }; &emmc { diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 58e29c53486b..69cb5bbf86eb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -1015,6 +1015,11 @@ rockchip,pins = <4 RK_PA7 1 &pcfg_pull_none>; }; + + uart4_rts_gpio: uart4-rts-gpio { + rockchip,pins = + <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; }; spi0 { |