diff options
| author | shengfei Xu <xsf@rock-chips.com> | 2018-03-24 20:19:25 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-03-26 14:16:51 +0800 |
| commit | 521f06b4a28ce1c78a5e23024a9e89b8499c843c (patch) | |
| tree | eaa00583ca2a4c62e4e1130d051dd7df98c5082f | |
| parent | 6149bcc0e31d25efd41da751116e520b3d03b0de (diff) | |
arm64: dts: rockchip: add opp-table for rk3308
Change-Id: I025416244fe9e0340a77e25edab864325d96d821
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3308.dtsi | 37 |
2 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi index f42f1601ae7e..251ed0758fbe 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi @@ -186,6 +186,10 @@ }; }; +&cpu0 { + cpu-supply = <&vdd_core>; +}; + &emmc { bus-width = <8>; cap-mmc-highspeed; diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index b09508c0a7e7..860f81e6d49f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -42,6 +42,8 @@ compatible = "arm,cortex-a35", "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; + clocks = <&cru ARMCLK>; + operating-points-v2 = <&cpu0_opp_table>; }; cpu1: cpu@1 { @@ -49,6 +51,7 @@ compatible = "arm,cortex-a35", "arm,armv8"; reg = <0x0 0x1>; enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; }; cpu2: cpu@2 { @@ -56,6 +59,7 @@ compatible = "arm,cortex-a35", "arm,armv8"; reg = <0x0 0x2>; enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; }; cpu3: cpu@3 { @@ -63,6 +67,39 @@ compatible = "arm,cortex-a35", "arm,armv8"; reg = <0x0 0x3>; enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; + }; + }; + + cpu0_opp_table: cpu0-opp-table { + compatible = "operating-points-v2"; + opp-shared; + + opp-408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <950000>; + clock-latency-ns = <40000>; + opp-suspend; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <950000>; + clock-latency-ns = <40000>; + }; + opp-816000000 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <1050000>; + clock-latency-ns = <40000>; + }; + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <40000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1175000>; + clock-latency-ns = <40000>; }; }; |