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author | Xing Zheng <zhengxing@rock-chips.com> | 2018-03-12 21:11:59 +0800 |
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committer | Xing Zheng <zhengxing@rock-chips.com> | 2018-03-21 09:27:44 +0800 |
commit | 2aec6208816753d83a262a00e0d34e608be627c8 (patch) | |
tree | 36a52cc42ab4a7e698f59a87552862351e80d4d3 | |
parent | b9d097610177b7117a09ea74ed00476a2105f169 (diff) |
ASoC: rk3308_codec: Add bindings documentation for RK3308 audio codec
Change-Id: I5163dcf9f463ef75120d4c29581f5db3eceb5c1c
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
-rw-r--r-- | Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt new file mode 100644 index 000000000000..689a65c670e3 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt @@ -0,0 +1,28 @@ +* Rockchip RK3308 Internal Codec + +Required properties: + +- compatible: "rockchip,rk3308-codec" +- reg: The physical base address of the controller and length of memory + mapped region. +- rockchip,grf: The phandle of the syscon node for GRF register. +- clocks: A list of phandle + clock-specifer pairs, one for each entry in + clock-names. +- clock-names: It should be "acodec". +- resets : Must contain an entry for each entry in reset-names. +- reset-names : Must include the following entries: "acodec-reset". +- spk_ctl-gpios: The gpio of speak controller. + +Example for rk3308 internal codec: + +acodec: acodec@ff560000 { + compatible = "rockchip,rk3308-codec"; + reg = <0x0 0xff560000 0x0 0x10000>; + rockchip,grf = <&grf>; + clocks = <&cru PCLK_ACODEC>; + clock-names = "acodec"; + resets = <&cru SRST_ACODEC_P>; + reset-names = "acodec-reset"; + spk_ctl-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; |