diff options
| author | Shawn Lin <shawn.lin@rock-chips.com> | 2018-03-21 10:46:05 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2018-03-26 11:28:19 +0800 |
| commit | 29b6b16557c956fa1357d91639ecb64f7aa2e01b (patch) | |
| tree | 80d3591c3701a809a56dd2ca4001955fdd4e9859 | |
| parent | a4b0a0f6bf41b305ffba475b195593e19b7020d6 (diff) | |
BACKPORT: FROMLIST: clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228
commit c420c1e4db229a ("clk: rockchip: Prevent calculating mmc phase
if clock rate is zero") catches one gremlin again for clk-rk3228.c
that the parent of SDMMC phase clock should be sclk_sdmmc0, but not
sclk_sdmmc. However, I don't like the name of sclk_sdmmc0, so I now
rename it to be sclk_sdmmc.
Change-Id: I1cf16aa1c639ce4776347b40a36bde241c800c03
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry-picked from https://patchwork.kernel.org/patch/10298427/)
| -rw-r--r-- | drivers/clk/rockchip/clk-rk3228.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c index 6572ddcfe8a3..b78dc2accb61 100644 --- a/drivers/clk/rockchip/clk-rk3228.c +++ b/drivers/clk/rockchip/clk-rk3228.c @@ -367,7 +367,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = { RK2928_CLKSEL_CON(23), 5, 2, MFLAGS, 0, 5, DFLAGS, RK2928_CLKGATE_CON(2), 15, GFLAGS), - COMPOSITE(SCLK_SDMMC, "sclk_sdmmc0", mux_mmc_src_p, 0, + COMPOSITE(SCLK_SDMMC, "sclk_sdmmc", mux_mmc_src_p, 0, RK2928_CLKSEL_CON(11), 8, 2, MFLAGS, 0, 8, DFLAGS, RK2928_CLKGATE_CON(2), 11, GFLAGS), |