arm64: dts: rockchip: add DTS for RK3399-Q7 (Puma) SoM

The RK3399-Q7 (Puma) is a system-on-module featuring the Rockchip
RK3399 in a Qseven-compatible form-factor.

RK3399-Q7 features:
  * CPU: ARMv8 64bit Big-Little architecture,
    * Big: dual-core Cortex-A72
    * Little: quad-core Cortex-A53
    * IRAM: 200KB
  * DRAM: 4GB-128MB dual-channel
  * eMMC: onboard eMMC
  * SD/MMC
  * GbE (onboard Micrel KSZ9031) Gigabit ethernet PHY
  * USB:
    * USB3.0 dual role port
    * 2x USB3.0 host, 1x USB2.0 host via onboard USB3.0 hub
  * Display: HDMI/eDP/MIPI
  * Camera: 2x CSI (one on the edge connector, one on the Q7 specified CSI ZIF)
  * NOR Flash: onboard SPI NOR
  * Companion Controller: onboard additional Cortex-M0 microcontroller
    * RTC
    * fan controller
    * CAN

This dts describes includes all required peripherals for booting and
basic functionality including eMMC, NOR, USB, Ethernet, HDMI output
(with audio), I2C buses (including the RTC and fan controller features
provided by the default companion controller firmware) and LED
definitions.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>

6 files changed, 1300 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index af2d18ed3e21..cf6e3e19c248 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -46,6 +46,11 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin-r0.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin-r1.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-mid-818-android-6.0.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-mid-818-android.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-edp.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-hdmi+edp.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-hdmi+mipidsi.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-mipidsi.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rv1-android.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator-box-android-6.0.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator-box.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-edp.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-edp.dts
new file mode 100644
index 000000000000..9f995fd1c42a
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-edp.dts
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2017 Theobroma Systemd Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+
+/*
+ * Theobroma Systems RK3399-Q7 "Puma" with EDP enabled instead of HDMI
+ */
+#include "rk3399-puma.dts"
+
+/ {
+	edp_panel: edp_panel {
+		// simple-panel does not define any timings - they are read from the monitor EDID.
+		compatible = "simple-panel";
+		// The enable gpio is used to switch the hardware multiplexer (U29) to DisplayPort.
+		enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; // GPIO2_A2 = SEL_EDP_1V8
+		ports {
+			panel_in_edp: endpoint {
+				remote-endpoint = <&edp_out_panel>;
+			};
+		};
+	};
+};
+
+&vopl {
+	status = "okay";
+};
+&vopl_mmu {
+	status = "okay";
+};
+
+&edp {
+	status = "okay";
+	force-hpd;
+	/delete-property/ pinctrl-0;
+	ports {
+		edp_out: port@1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			edp_out_panel: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&panel_in_edp>;
+			};
+		};
+	};
+};
+
+&hdmi {
+	status = "disabled";
+};
+
+&route_hdmi {
+	status = "disabled";
+};
+
+&route_edp {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-hdmi+edp.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-hdmi+edp.dts
new file mode 100644
index 000000000000..cc05ed117c35
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-hdmi+edp.dts
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2017 Theobroma Systemd Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/*
+ * Theobroma Systems RK3399-Q7 "Puma" with EDP and HDMI enabled
+ */
+#include "rk3399-puma-edp.dts"
+
+// Bind HDMI<->VOPB and DP<->VOPL by dropping the other paths
+//
+// Drop the HDMI<->VOPL path
+&vopl_out {
+	/delete-node/ endpoint@2; // vopl_out_hdmi
+};
+&hdmi_in {
+	/delete-node/ endpoint@1; // hdmi_in_vopl
+};
+// Drop the DP<->VOPB path
+&vopb_out {
+	/delete-node/ endpoint@0; // vopb_out_edp
+};
+&edp_in {
+	/delete-node/ endpoint@0; // edp_in_vopb
+};
+// Fix display_subsystem routes that refer to nodes that were deleted above
+&route_edp {
+	connect = <&vopl_out_edp>;
+};
+&route_hdmi {
+	connect = <&vopb_out_hdmi>;
+};
+
+// Enable HDMI
+&hdmi {
+	status = "okay";
+};
+
+&route_hdmi {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-hdmi+mipidsi.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-hdmi+mipidsi.dts
new file mode 100644
index 000000000000..2e10eaf46f24
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-hdmi+mipidsi.dts
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2017 Theobroma Systemd Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/*
+ * Theobroma Systems RK3399-Q7 "Puma" with MIPI-DSI and HDMI enabled
+ */
+#include "rk3399-puma-mipidsi.dts"
+
+// Swap the order so MIPI-DSI gets VOPL, HDMI gets VOPB
+&display_subsystem {
+	ports = <&vopl_out>, <&vopb_out>;
+};
+
+// Enable HDMI on VOPB
+&hdmi {
+	status = "okay";
+	ports { port { /delete-node/ endpoint@1; }; };
+};
+&route_hdmi {
+	// defined in rk3399-puma.dts: connect = <&vopb_out_hdmi>;
+	status = "okay";
+};
+
+// Enable VOPL and move MIPI-DSI there
+&vopl {
+	status = "okay";
+	port { /delete-node/ endpoint@2; };
+};
+&vopl_mmu {
+	status = "okay";
+};
+
+&route_dsi {
+	// default in rk3399-linux.dtsi: connect = <&vopb_out_dsi>;
+	connect = <&vopl_out_dsi>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-mipidsi.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-mipidsi.dts
new file mode 100644
index 000000000000..30621b4a04d4
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-mipidsi.dts
@@ -0,0 +1,141 @@
+/*
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2017 Theobroma Systemd Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/*
+ * Theobroma Systems RK3399-Q7 "Puma" with MIPI-DSI enabled instead of HDMI
+ */
+#include "rk3399-puma.dts"
+
+/ {
+	backlight: backlight {
+		compatible = "gpio-backlight";
+		// GPIO4_C2 = Q7_LVDS_BLT_CTRL. Set high to enable the backlight. Use PWM to regulate brightness.
+		gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;
+		default-on;
+	};
+};
+
+&hdmi {
+        status = "disabled";
+};
+
+&route_hdmi {
+        status = "disabled";
+};
+
+&route_dsi {
+	status = "okay";
+	// default in rk3399-linux.dtsi: connect = <&vopb_out_dsi>;
+};
+
+&dsi {
+	status = "okay";
+	panel {
+		compatible ="simple-panel-dsi";
+		reg = <0>;
+		backlight = <&backlight>;
+		// GPIO2_A2 = SEL_EDP_1V8. Set low to switch the hardware mux from eDP to DSI.
+		enable-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+		// GPIO4_D6 = LVDS_PPEN. Set low to send the panel into reset.
+		reset-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>;
+		// Keep reset low for X milliseconds
+		reset-delay-ms = <10>;
+		// And wait X ms for the panel controller to boot up
+		init-delay-ms = <100>;
+
+		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+				MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_LPM)>;
+		dsi,format = <MIPI_DSI_FMT_RGB888>;
+		dsi,lanes = <4>;
+		status = "okay";
+
+		panel-init-sequence = [
+			15 01 02 cd aa
+			15 01 02 30 00
+			15 01 02 5e 03
+			15 01 02 32 00
+			15 01 02 33 25
+			15 01 02 65 08
+			15 01 02 3a 10
+			15 01 02 36 49
+			15 01 02 67 82
+			15 01 02 69 27
+			15 01 02 6c 27
+			15 01 02 6d 14
+			39 01 09 55 09 09 09 09 09 09 09 09
+			39 01 11 56 09 09 09 09 09 09 09 09 09 09 09 09 09 09 09 09
+			15 01 02 6b 00
+			15 01 02 58 08
+			15 01 02 73 30
+			15 01 02 74 10
+			15 01 02 77 00
+			15 01 02 68 00
+			15 01 02 28 28
+			39 01 05 57 00 00 09 09
+			15 01 02 41 46
+			15 01 02 4e 50
+			15 01 02 4f 55
+			15 01 02 63 04
+			39 01 14 53 1f 1a 17 13 12 12 14 15 15 10 0d 0b 0b 0c 0d 0a 08 03 00
+			39 01 14 54 1f 1a 17 13 12 12 14 15 15 10 0d 0b 0b 0c 0d 0a 08 03 00
+			15 01 02 29 10
+			15 01 02 2e 03
+			15 01 02 78 67
+			15 01 02 76 36
+			15 01 02 47 18
+			15 01 02 2d 31
+			15 01 02 50 d0
+			15 01 02 48 66
+			15 01 02 3f 00
+			15 01 02 31 01
+			15 01 02 4d 00
+		];
+
+
+		display-timings {
+			native-mode = <&timing0>;
+			timing0: timing0 {
+				clock-frequency = <71900000>;
+				hactive = <800>;
+				vactive = <1280>;
+				hback-porch = <24>;
+				hfront-porch = <72>;
+				vback-porch = <10>;
+				vfront-porch = <12>;
+				hsync-len = <24>;
+				vsync-len = <2>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <1>;
+				pixelclk-active = <1>;
+			};
+		};
+	};
+};
+
+&i2c1 {
+	gsl1680 {
+		compatible = "silead,gsl1680";
+		reg = <0x40>;
+		// We don't have an interrupt line available on the dev kit.
+		// So we use 15 = arch_timer interrupt instead, tricking the driver into polling.
+		interrupts = <15 IRQ_TYPE_NONE>;
+		// Must be set but value is arbitrary (?)
+		interrupt-parent = <&gpio2>;
+		// GPIO1_C7 = LVDS_BLEN = gpio1 23
+		power-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+		touchscreen-size-x = <1720>;
+		touchscreen-size-y = <1150>;
+		touchscreen-swapped-x-y;
+		touchscreen-inverted-x;
+		touchscreen-inverted-y;
+
+		silead,max-fingers = <5>;
+		// Place into /lib/firmware/silead
+		firmware-name = "ec080.fw";
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma.dts
new file mode 100644
index 000000000000..2bbcdebd4420
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dts
@@ -0,0 +1,1008 @@
+/*
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2017 Theobroma Systemd Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+
+#include "dt-bindings/pwm/pwm.h"
+#include "rk3399.dtsi"
+#include "rk3399-linux.dtsi"
+#include "rk3399-sched-energy.dtsi"
+
+/ {
+	model = "Theobroma Systems RK3399-Q7 SoM";
+	compatible = "tsd,rk3399-q7", "rockchip,rk3399";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	cpuinfo {
+		compatible = "rockchip,cpuinfo";
+		nvmem-cells = <&efuse_id>;
+		nvmem-cell-names = "id";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&leds_pins_puma>;
+
+		module_led {
+			label = "module_led";
+			gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+		};
+
+		sd_card_led {
+			label = "sd_card_led";
+			gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "mmc0";
+		};
+	};
+
+	cluster0_opp: opp-table0 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp@408000000 {
+			opp-hz = /bits/ 64 <408000000>;
+			opp-microvolt = <800000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <800000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@816000000 {
+			opp-hz = /bits/ 64 <816000000>;
+			opp-microvolt = <850000>;
+			clock-latency-ns = <40000>;
+			opp-suspend;
+		};
+		opp@1008000000 {
+			opp-hz = /bits/ 64 <1008000000>;
+			opp-microvolt = <925000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1416000000 {
+			opp-hz = /bits/ 64 <1416000000>;
+			opp-microvolt = <1125000>;
+			clock-latency-ns = <40000>;
+		};
+	};
+
+	cluster1_opp: opp-table1 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp@408000000 {
+			opp-hz = /bits/ 64 <408000000>;
+			opp-microvolt = <800000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <800000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@816000000 {
+			opp-hz = /bits/ 64 <816000000>;
+			opp-microvolt = <830000>;
+			clock-latency-ns = <40000>;
+			opp-suspend;
+		};
+		opp@1008000000 {
+			opp-hz = /bits/ 64 <1008000000>;
+			opp-microvolt = <880000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <950000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1416000000 {
+			opp-hz = /bits/ 64 <1416000000>;
+			opp-microvolt = <1030000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1608000000 {
+			opp-hz = /bits/ 64 <1608000000>;
+			opp-microvolt = <1100000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1800000000 {
+			opp-hz = /bits/ 64 <1800000000>;
+			opp-microvolt = <1200000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1992000000 {
+			opp-hz = /bits/ 64 <1992000000>;
+			opp-microvolt = <1230000>;
+			clock-latency-ns = <40000>;
+			turbo-mode;
+		};
+	};
+
+	gpu_opp_table: opp-table2 {
+		compatible = "operating-points-v2";
+
+		opp@200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <800000>;
+		};
+		opp@297000000 {
+			opp-hz = /bits/ 64 <297000000>;
+			opp-microvolt = <800000>;
+		};
+		opp@400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <830000>;
+		};
+		opp@500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <880000>;
+		};
+		opp@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <930000>;
+		};
+		opp@800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1100000>;
+		};
+	};
+
+	dmc_opp_table: opp-table3 {
+		compatible = "operating-points-v2";
+
+		opp@200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <825000>;
+		};
+		opp@297000000 {
+			opp-hz = /bits/ 64 <297000000>;
+			opp-microvolt = <850000>;
+		};
+		opp@400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <850000>;
+		};
+		opp@594000000 {
+			opp-hz = /bits/ 64 <594000000>;
+			opp-microvolt = <900000>;
+		};
+		opp@800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <900000>;
+		};
+	};
+
+	clkin_gmac: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "clkin_gmac";
+		#clock-cells = <0>;
+	};
+
+	sgtl5000_clk: sgtl5000-oscillator  {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency  = <12000000>;
+	};
+
+	sgtl5000-sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,name = "Haikou,I2S-codec";
+		// 24.576 MHz oscillator on the baseboard, divided by 512 = 48 kHz
+		simple-audio-card,mclk-fs = <512>;
+		simple-audio-card,cpu {
+			sound-dai = <&i2s0>;
+			frame-master;
+			bitclock-master;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&sgtl5000>;
+			clocks = <&sgtl5000_clk>;
+		};
+	};
+
+	dw_hdmi_audio: dw-hdmi-audio {
+		status = "enabled";
+		compatible = "rockchip,dw-hdmi-audio";
+		#sound-dai-cells = <0>;
+	};
+
+	hdmi_codec: hdmi-codec {
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,name = "HDMI-CODEC";
+
+		simple-audio-card,cpu {
+			sound-dai = <&i2s2>;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&hdmi>;
+		};
+	};
+
+	hdmi_sound: hdmi-sound {
+		status = "disabled";
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,name = "rockchip,hdmi";
+
+		simple-audio-card,cpu {
+			sound-dai = <&i2s2>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&hdmi>;
+		};
+	};
+
+	vccadc_ref: vccadc-ref {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc1v8_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+	};
+
+	vdda_codec: vdda-codec {
+		compatible = "regulator-fixed";
+		regulator-name = "vdda_codec";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	vddd_codec: vddd-codec {
+		compatible = "regulator-fixed";
+		regulator-name = "vddd_codec";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1600000>;
+		regulator-max-microvolt = <1600000>;
+	};
+
+	vcc3v3_sys: vcc3v3-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	vcc5v0_otg: vcc5v0-otg-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-name = "vcc5v0_otg";
+		regulator-always-on;
+	};
+
+	vcc5v0_host: vcc5v0-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-low;
+		gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-name = "vcc5v0_host";
+		regulator-always-on;
+	};
+
+	vcc5v0_sys: vcc5v0-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
+};
+
+&cpu_l0 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_b0 {
+	cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+	cpu-supply = <&vdd_cpu_b>;
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&edp {
+	status = "disabled";
+};
+
+&emmc_phy {
+	status = "okay";
+};
+
+&gmac {
+	phy-supply = <&vcc_phy>;
+	phy-mode = "rgmii";
+	clock_in_out = "input";
+	snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <2 10000 50000>;
+	assigned-clocks = <&cru SCLK_RMII_SRC>;
+	assigned-clock-parents = <&clkin_gmac>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	tx_delay = <0x10>;
+	rx_delay = <0x10>;
+	status = "okay";
+};
+
+&gpu {
+	status = "okay";
+	mali-supply = <&vdd_gpu>;
+};
+
+&hdmi {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	#sound-dai-cells = <0>;
+	status = "okay";
+};
+
+&route_hdmi {
+	status = "okay";
+	// default in rk3399-linux.dtsi: connect = <&vopl_out_hdmi>;
+	connect = <&vopb_out_hdmi>;
+};
+
+&i2c0 {
+	status = "okay";
+	i2c-scl-rising-time-ns = <168>;
+	i2c-scl-falling-time-ns = <4>;
+	clock-frequency = <400000>;
+
+	vdd_gpu: fan535555@60 {
+		compatible = "fcs,fan53555";
+		reg = <0x60>;
+		vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+		vin-supply = <&vcc5v0_sys>;
+		regulator-compatible = "fan53555-reg";
+		regulator-name = "vdd_gpu";
+		regulator-min-microvolt = <600000>;
+		regulator-max-microvolt = <1230000>;
+		regulator-ramp-delay = <1000>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-initial-state = <3>;
+			regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	rk808: pmic@1b {
+		compatible = "rockchip,rk808";
+		reg = <0x1b>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <22 IRQ_TYPE_LEVEL_LOW>;  // TODO check interrupt?
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+
+		vcc1-supply = <&vcc5v0_sys>;
+		vcc2-supply = <&vcc5v0_sys>;
+		vcc3-supply = <&vcc5v0_sys>;
+		vcc4-supply = <&vcc5v0_sys>;
+		vcc6-supply = <&vcc5v0_sys>;
+		vcc7-supply = <&vcc5v0_sys>;
+		vcc8-supply = <&vcc3v3_sys>;
+		vcc9-supply = <&vcc5v0_sys>;
+		vcc10-supply = <&vcc5v0_sys>;
+		vcc11-supply = <&vcc5v0_sys>;
+		vcc12-supply = <&vcc3v3_sys>;
+		vddio-supply = <&vcc1v8_pmu>;
+
+		regulators {
+			vdd_center: DCDC_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-name = "vdd_center";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_cpu_l: DCDC_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-name = "vdd_cpu_l";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "vcc_ddr";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_1v8: DCDC_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc_1v8";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_ldo1: LDO_REG1 {
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc_ldo1";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc1v8_hdmi: LDO_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc1v8_hdmi";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc1v8_pmu: LDO_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc1v8_pmu";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_sd: LDO_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_ldo5: LDO_REG5 {
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-name = "vcc_ldo5";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_ldo6: LDO_REG6 {
+				regulator-boot-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-name = "vcc_ldo6";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc0v9_hdmi: LDO_REG7 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <900000>;
+				regulator-name = "vcc0v9_hdmi";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_efuse: LDO_REG8 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc_efuse";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc3v3_s3: SWITCH_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "vcc3v3_s3";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc3v3_s0: SWITCH_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "vcc3v3_s0";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+		};
+	};
+};
+
+&i2c8 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	vdd_cpu_b: fan53555@60 {
+		compatible = "fcs,fan53555";
+		reg = <0x60>;
+		vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+		vin-supply = <&vcc5v0_sys>;
+		regulator-compatible = "fan53555-reg";
+		regulator-name = "vdd_cpu_b";
+		regulator-min-microvolt = <600000>;
+		regulator-max-microvolt = <1230000>;
+		regulator-ramp-delay = <1000>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-initial-state = <3>;
+			regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+};
+
+/* Q7_I2S */
+&i2s0 {
+	status = "okay";
+	rockchip,i2s-broken-burst-len;
+	rockchip,playback-channels = <2>;
+	rockchip,capture-channels = <2>;
+	#sound-dai-cells = <0>;
+	pinctrl-0 = <&i2s0_2ch_bus>;
+};
+
+&i2s2 {
+	#sound-dai-cells = <0>;
+	status = "okay";
+};
+
+&io_domains {
+	status = "okay";
+
+	bt656-supply = <&vcc_1v8>;		/* bt656_gpio2ab_ms */
+	audio-supply = <&vcc_1v8>;	/* audio_gpio3d4a_ms */
+	sdmmc-supply = <&vcc_sd>;		/* sdmmc_gpio4b_ms */
+	gpio1830-supply = <&vcc_1v8>;		/* gpio1833_gpio4cd_ms */
+};
+
+&pcie0 {
+	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
+	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
+	assigned-clock-rates = <100000000>;
+	ep-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+	num-lanes = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_clkreqn>;
+	status = "okay";
+};
+
+&pcie_phy {
+	        status = "okay";
+};
+
+&pmu_io_domains {
+	status = "okay";
+	pmu1830-supply = <&vcc_1v8>;
+};
+
+&pwm0 {
+	status = "okay";
+};
+
+&pwm2 {
+	status = "okay";
+};
+
+/* On-Module eMMC */
+&sdhci {
+	bus-width = <8>;
+	supports-emmc;
+	non-removable;
+	keep-power-in-suspend;
+	status = "okay";
+};
+
+/* Q7_SDIO - External SD Card */
+&sdmmc {
+	max-frequency = <50000000>; // 50 MHz = High Speed 3.3V
+	supports-sdio;
+	supports-sd;
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	disable-wp;
+	num-slots = <1>;
+	vqmmc-supply = <&vcc_sd>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+	status = "okay";
+};
+
+&saradc {
+	status = "okay";
+};
+
+&tcphy0 {
+	status = "okay";
+};
+
+&tcphy1 {
+	status = "okay";
+};
+
+&tsadc {
+	/* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-mode = <1>;
+	/* tshut polarity 0:LOW 1:HIGH */
+	rockchip,hw-tshut-polarity = <1>;
+	status = "okay";
+};
+
+&u2phy0 {
+	status = "okay";
+
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy0_host: host-port {
+		phy-supply = <&vcc5v0_otg>;
+		status = "okay";
+	};
+};
+
+&u2phy1 {
+	status = "okay";
+
+	u2phy1_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy1_host: host-port {
+		phy-supply = <&vcc5v0_host>;
+		status = "okay";
+	};
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&usbdrd3_0 {
+	status = "okay";
+};
+
+&usbdrd3_1 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&usbdrd_dwc3_1 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb_host1_ehci {
+	status = "okay";
+};
+
+&usb_host1_ohci {
+	status = "okay";
+};
+
+&rkvdec {
+	status = "okay";
+	/* 0 means ion, 1 means drm */
+	//allocator = <0>;
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vpu {
+	status = "okay";
+	/* 0 means ion, 1 means drm */
+	//allocator = <0>;
+};
+
+&pinctrl {
+	// Pins that are not explicitely used by any devices
+	pinctrl-names = "default";
+	pinctrl-0 = <&puma_pin_hog>;
+	hog {
+		puma_pin_hog: puma_pin_hog {
+			rockchip,pins =
+				<1 26 RK_FUNC_GPIO &pcfg_pull_up>, // Q7_USB_ID
+				// We need pull-ups on Q7 buttons
+				<0  4 RK_FUNC_GPIO &pcfg_pull_up>, // LID_BTN#
+				<0 10 RK_FUNC_GPIO &pcfg_pull_up>, // BATLOW#
+				<0 11 RK_FUNC_GPIO &pcfg_pull_up>, // SLP_BTN#
+				<0  9 RK_FUNC_GPIO &pcfg_pull_up>, // BIOS_DISABLE#
+				<0  3 RK_FUNC_GPIO &pcfg_pull_up>, // THRM#
+				<0 13 RK_FUNC_GPIO &pcfg_pull_up>, // SDIO_WP#
+				<0 12 RK_FUNC_GPIO &pcfg_pull_up>; // SMB_ALERT#
+		};
+	};
+
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins =
+				<1 22 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	leds_pins_puma: led_pins@0 {
+			rockchip,pins =
+				<2 25 RK_FUNC_GPIO &pcfg_pull_none>,
+				<1 2 RK_FUNC_GPIO &pcfg_pull_none>;
+	};
+
+	usb2 {
+		otg_vbus_drv: otg-vbus-drv {
+			rockchip,pins =
+				<0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins =
+				<0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	i2c8 {
+		i2c8_xfer_a: i2c8-xfer {
+			rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>,
+			                <1 20 RK_FUNC_1 &pcfg_pull_up>;
+		};
+	};
+
+	i2s0 {
+		i2s0_2ch_bus: i2s0_2ch_bus {
+			rockchip,pins =
+				<3 24 RK_FUNC_1 &pcfg_pull_none>, // I2S_CLK
+				<3 26 RK_FUNC_1 &pcfg_pull_none>, // I2S_WS
+				<3 27 RK_FUNC_1 &pcfg_pull_none>, // I2S_SDI
+				<3 31 RK_FUNC_1 &pcfg_pull_none>; // I2S_SDO
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+	clock-frequency = <400000>;
+};
+&i2c2 {
+	status = "okay";
+	clock-frequency = <400000>;
+};
+&i2c4 {
+	status = "okay";
+	clock-frequency = <400000>;
+		sgtl5000: codec@0a {
+			#sound-dai-cells = <0>;
+			compatible = "fsl,sgtl5000";
+			reg = <0x0a>;
+			VDDA-supply = <&vdda_codec>;
+			VDDIO-supply = <&vdda_codec>;
+			VDDD-supply = <&vddd_codec>;
+			clocks = <&sgtl5000_clk>;
+			status = "okay";
+		};
+};
+&i2c6 {
+	status = "okay";
+	clock-frequency = <400000>;
+};
+
+// Enable pull-ups, the pins would float otherwise.
+&i2c6_xfer {
+	rockchip,pins =
+		<2 10 RK_FUNC_2 &pcfg_pull_up>,
+		<2 9 RK_FUNC_2 &pcfg_pull_up>;
+};
+
+&i2c7 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	rtc_twi: rtc@6f {
+		compatible = "isil,isl1208";
+		reg = <0x6f>;
+	};
+	fan: fan@18 {
+		compatible = "ti,amc6821";
+		reg = <0x18>;
+		cooling-min-state = <0>;
+		cooling-max-state = <9>;
+		#cooling-cells = <2>;
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer &uart0_cts>;
+	status = "okay";
+};
+
+&saradc {
+	vref-supply = <&vccadc_ref>;
+	status = "okay";
+};
+
+&spi1 {
+	status = "okay";
+
+	flash: w25q32fw@0 {
+		compatible = "winbond,w25q32dw";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&rockchip_suspend {
+	status = "okay";
+	rockchip,sleep-debug-en = <1>;
+	rockchip,sleep-mode-config = <
+		(0
+		| RKPM_SLP_ARMPD
+		| RKPM_SLP_PERILPPD
+		| RKPM_SLP_DDR_RET
+		| RKPM_SLP_PLLPD
+		| RKPM_SLP_CENTER_PD
+		| RKPM_SLP_AP_PWROFF
+		)
+		>;
+	rockchip,wakeup-config = <
+		(0
+		| RKPM_GPIO_WKUP_EN
+		| RKPM_PWM_WKUP_EN
+		)
+		>;
+		rockchip,pwm-regulator-config = <
+		(0
+		| PWM2_REGULATOR_EN
+		)
+		>;
+		rockchip,power-ctrl =
+		<&gpio1 4 GPIO_ACTIVE_HIGH>,
+		<&gpio1 14 GPIO_ACTIVE_HIGH>;
+}; 
+
+&cpu_l0 {
+	operating-points-v2 = <&cluster0_opp>;
+	sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
+};
+
+&cpu_l1 {
+	operating-points-v2 = <&cluster0_opp>;
+	sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
+};
+
+&cpu_l2 {
+	operating-points-v2 = <&cluster0_opp>;
+	sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
+};
+
+&cpu_l3 {
+	operating-points-v2 = <&cluster0_opp>;
+	sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
+};
+
+&cpu_b0 {
+	operating-points-v2 = <&cluster1_opp>;
+	sched-energy-costs = <&RK3399_CPU_COST_1 &RK3399_CLUSTER_COST_1>;
+};
+
+&cpu_b1 {
+	operating-points-v2 = <&cluster1_opp>;
+	sched-energy-costs = <&RK3399_CPU_COST_1 &RK3399_CLUSTER_COST_1>;
+};
+
+&gpu {
+	operating-points-v2 = <&gpu_opp_table>;
+};
+
+&dmc {
+	operating-points-v2 = <&dmc_opp_table>;
+};