arm64: dts: puma: merge opp

we have slightly different operation points then sapphire so we define
our opperation points in the dts instead including it from the
rk3399-opp.dtsi

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>

1 files changed, 183 insertions, 1 deletions

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma.dts
index ff5c024d81c8..33440ca47d98 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dts
@@ -46,7 +46,7 @@
 #include "dt-bindings/pwm/pwm.h"
 #include "rk3399.dtsi"
 #include "rk3399-linux.dtsi"
-#include "rk3399-opp.dtsi"
+#include "rk3399-sched-energy.dtsi"
 
 / {
 	model = "Theobroma Systems RK3399-Q7 SoM";
@@ -80,6 +80,150 @@
 		};
 	};
 
+	cluster0_opp: opp-table0 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp@408000000 {
+			opp-hz = /bits/ 64 <408000000>;
+			opp-microvolt = <800000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <800000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@816000000 {
+			opp-hz = /bits/ 64 <816000000>;
+			opp-microvolt = <850000>;
+			clock-latency-ns = <40000>;
+			opp-suspend;
+		};
+		opp@1008000000 {
+			opp-hz = /bits/ 64 <1008000000>;
+			opp-microvolt = <925000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1416000000 {
+			opp-hz = /bits/ 64 <1416000000>;
+			opp-microvolt = <1125000>;
+			clock-latency-ns = <40000>;
+		};
+	};
+
+	cluster1_opp: opp-table1 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp@408000000 {
+			opp-hz = /bits/ 64 <408000000>;
+			opp-microvolt = <800000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <800000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@816000000 {
+			opp-hz = /bits/ 64 <816000000>;
+			opp-microvolt = <830000>;
+			clock-latency-ns = <40000>;
+			opp-suspend;
+		};
+		opp@1008000000 {
+			opp-hz = /bits/ 64 <1008000000>;
+			opp-microvolt = <880000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <950000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1416000000 {
+			opp-hz = /bits/ 64 <1416000000>;
+			opp-microvolt = <1030000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1608000000 {
+			opp-hz = /bits/ 64 <1608000000>;
+			opp-microvolt = <1100000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1800000000 {
+			opp-hz = /bits/ 64 <1800000000>;
+			opp-microvolt = <1200000>;
+			clock-latency-ns = <40000>;
+		};
+		opp@1992000000 {
+			opp-hz = /bits/ 64 <1992000000>;
+			opp-microvolt = <1230000>;
+			clock-latency-ns = <40000>;
+			turbo-mode;
+		};
+	};
+
+	gpu_opp_table: opp-table2 {
+		compatible = "operating-points-v2";
+
+		opp@200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <800000>;
+		};
+		opp@297000000 {
+			opp-hz = /bits/ 64 <297000000>;
+			opp-microvolt = <800000>;
+		};
+		opp@400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <830000>;
+		};
+		opp@500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <880000>;
+		};
+		opp@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <930000>;
+		};
+		opp@800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1100000>;
+		};
+	};
+
+	dmc_opp_table: opp-table3 {
+		compatible = "operating-points-v2";
+
+		opp@200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <825000>;
+		};
+		opp@297000000 {
+			opp-hz = /bits/ 64 <297000000>;
+			opp-microvolt = <850000>;
+		};
+		opp@400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <850000>;
+		};
+		opp@594000000 {
+			opp-hz = /bits/ 64 <594000000>;
+			opp-microvolt = <900000>;
+		};
+		opp@800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <900000>;
+		};
+	};
+
 	clkin_gmac: external-gmac-clock {
 		compatible = "fixed-clock";
 		clock-frequency = <125000000>;
@@ -822,4 +966,42 @@
 		rockchip,power-ctrl =
 		<&gpio1 4 GPIO_ACTIVE_HIGH>,
 		<&gpio1 14 GPIO_ACTIVE_HIGH>;
+}; 
+
+&cpu_l0 {
+	operating-points-v2 = <&cluster0_opp>;
+	sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
+};
+
+&cpu_l1 {
+	operating-points-v2 = <&cluster0_opp>;
+	sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
+};
+
+&cpu_l2 {
+	operating-points-v2 = <&cluster0_opp>;
+	sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
+};
+
+&cpu_l3 {
+	operating-points-v2 = <&cluster0_opp>;
+	sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
+};
+
+&cpu_b0 {
+	operating-points-v2 = <&cluster1_opp>;
+	sched-energy-costs = <&RK3399_CPU_COST_1 &RK3399_CLUSTER_COST_1>;
+};
+
+&cpu_b1 {
+	operating-points-v2 = <&cluster1_opp>;
+	sched-energy-costs = <&RK3399_CPU_COST_1 &RK3399_CLUSTER_COST_1>;
+};
+
+&gpu {
+	operating-points-v2 = <&gpu_opp_table>;
+};
+
+&dmc {
+	operating-points-v2 = <&dmc_opp_table>;
 };