diff options
| author | Christoph Muellner <christoph.muellner@theobroma-systems.com> | 2018-12-20 16:02:37 +0100 |
|---|---|---|
| committer | Christoph Müllner <christophm30@gmail.com> | 2019-04-07 15:54:08 +0200 |
| commit | 1afbd643c878c6b8c59a088b5ec1e781addd32a9 (patch) | |
| tree | 8db20bf2035862e8b76bd11d1807ffa73084f878 | |
| parent | 53b8aaf03b57d96ecb53c27e29916a528cff5514 (diff) | |
dt-bindings: display: support drm_mipi_dsi macro
This is a forward-port from the rockchip 4.4 kernel
(commit ba5c781dad22d34bab890a138618233ff5d21e98).
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
| -rw-r--r-- | include/dt-bindings/display/drm_mipi_dsi.h | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/include/dt-bindings/display/drm_mipi_dsi.h b/include/dt-bindings/display/drm_mipi_dsi.h new file mode 100644 index 000000000000..be3994435168 --- /dev/null +++ b/include/dt-bindings/display/drm_mipi_dsi.h @@ -0,0 +1,50 @@ +/* + * MIPI DSI Bus + * + * Copyright (c) Fuzhou Rockchip Electronics Co.Ltd + * Authors: + * Mark Yao <yzq@rock-chips.com> + * + * based on include/drm/drm_mipi_dsi.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _DRM_MIPI_DSI_H__ +#define _DRM_MIPI_DSI_H__ + +/* DSI mode flags */ + +/* video mode */ +#define MIPI_DSI_MODE_VIDEO (1 << 0) +/* video burst mode */ +#define MIPI_DSI_MODE_VIDEO_BURST (1 << 1) +/* video pulse mode */ +#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE (1 << 2) +/* enable auto vertical count mode */ +#define MIPI_DSI_MODE_VIDEO_AUTO_VERT (1 << 3) +/* enable hsync-end packets in vsync-pulse and v-porch area */ +#define MIPI_DSI_MODE_VIDEO_HSE (1 << 4) +/* disable hfront-porch area */ +#define MIPI_DSI_MODE_VIDEO_HFP (1 << 5) +/* disable hback-porch area */ +#define MIPI_DSI_MODE_VIDEO_HBP (1 << 6) +/* disable hsync-active area */ +#define MIPI_DSI_MODE_VIDEO_HSA (1 << 7) +/* flush display FIFO on vsync pulse */ +#define MIPI_DSI_MODE_VSYNC_FLUSH (1 << 8) +/* disable EoT packets in HS mode */ +#define MIPI_DSI_MODE_EOT_PACKET (1 << 9) +/* device supports non-continuous clock behavior (DSI spec 5.6.1) */ +#define MIPI_DSI_CLOCK_NON_CONTINUOUS (1 << 10) +/* transmit data in low power */ +#define MIPI_DSI_MODE_LPM (1 << 11) + +#define MIPI_DSI_FMT_RGB888 0 +#define MIPI_DSI_FMT_RGB666 1 +#define MIPI_DSI_FMT_RGB666_PACKED 2 +#define MIPI_DSI_FMT_RGB565 3 + +#endif /* __DRM_MIPI_DSI__ */ |