From 8bde7f776c77b343aca29b8c7b58464d915ac245 Mon Sep 17 00:00:00 2001 From: wdenk Date: Fri, 27 Jun 2003 21:31:46 +0000 Subject: * Code cleanup: - remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen) --- board/sacsng/clkinit.c | 586 ++++++++++++++++++++++++------------------------- 1 file changed, 293 insertions(+), 293 deletions(-) (limited to 'board/sacsng/clkinit.c') diff --git a/board/sacsng/clkinit.c b/board/sacsng/clkinit.c index 634c1e05fb..ea4c65d6b3 100644 --- a/board/sacsng/clkinit.c +++ b/board/sacsng/clkinit.c @@ -41,8 +41,8 @@ void Daq_BRG_Reset(uint brg) brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; *brg_ptr |= CPM_BRG_RST; @@ -57,8 +57,8 @@ void Daq_BRG_Disable(uint brg) brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; *brg_ptr &= ~CPM_BRG_EN; @@ -71,8 +71,8 @@ void Daq_BRG_Enable(uint brg) brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; *brg_ptr |= CPM_BRG_EN; @@ -85,18 +85,18 @@ uint Daq_BRG_Get_Div16(uint brg) brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; if (*brg_ptr & CPM_BRG_DIV16) { - /* DIV16 active */ - return (TRUE); + /* DIV16 active */ + return (TRUE); } else { - /* DIV16 inactive */ - return (FALSE); + /* DIV16 inactive */ + return (FALSE); } } @@ -107,18 +107,18 @@ void Daq_BRG_Set_Div16(uint brg, uint div16) brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; if (div16) { - /* DIV16 active */ - *brg_ptr |= CPM_BRG_DIV16; + /* DIV16 active */ + *brg_ptr |= CPM_BRG_DIV16; } else { - /* DIV16 inactive */ - *brg_ptr &= ~CPM_BRG_DIV16; + /* DIV16 inactive */ + *brg_ptr &= ~CPM_BRG_DIV16; } } @@ -130,8 +130,8 @@ uint Daq_BRG_Get_Count(uint brg) brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; @@ -143,7 +143,7 @@ uint Daq_BRG_Get_Count(uint brg) brg_cnt = (*brg_ptr & CPM_BRG_CD_MASK) >> CPM_BRG_DIV16_SHIFT; brg_cnt++; if (*brg_ptr & CPM_BRG_DIV16) { - brg_cnt *= 16; + brg_cnt *= 16; } return (brg_cnt); @@ -156,8 +156,8 @@ void Daq_BRG_Set_Count(uint brg, uint brg_cnt) brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; @@ -166,14 +166,14 @@ void Daq_BRG_Set_Count(uint brg, uint brg_cnt) * therefore we need to subtract 1 from the count. */ if (brg_cnt > 4096) { - /* Prescale = Divide by 16 */ - *brg_ptr = (*brg_ptr & ~CPM_BRG_CD_MASK) | + /* Prescale = Divide by 16 */ + *brg_ptr = (*brg_ptr & ~CPM_BRG_CD_MASK) | (((brg_cnt / 16) - 1) << CPM_BRG_DIV16_SHIFT); *brg_ptr |= CPM_BRG_DIV16; } else { - /* Prescale = Divide by 1 */ - *brg_ptr = (*brg_ptr & ~CPM_BRG_CD_MASK) | + /* Prescale = Divide by 1 */ + *brg_ptr = (*brg_ptr & ~CPM_BRG_CD_MASK) | ((brg_cnt - 1) << CPM_BRG_DIV16_SHIFT); *brg_ptr &= ~CPM_BRG_DIV16; } @@ -186,8 +186,8 @@ uint Daq_BRG_Get_ExtClk(uint brg) brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; @@ -201,40 +201,40 @@ char* Daq_BRG_Get_ExtClk_Description(uint brg) extc = Daq_BRG_Get_ExtClk(brg); switch (brg + 1) { - case 1: - case 2: - case 5: - case 6: { - switch (extc) { - case 0: { - return ("BRG_INT"); - } - case 1: { - return ("CLK3"); - } - case 2: { - return ("CLK5"); - } - } - return ("??1245??"); - } - case 3: - case 4: - case 7: - case 8: { - switch (extc) { - case 0: { - return ("BRG_INT"); - } - case 1: { - return ("CLK9"); - } - case 2: { - return ("CLK15"); - } - } - return ("??3478??"); - } + case 1: + case 2: + case 5: + case 6: { + switch (extc) { + case 0: { + return ("BRG_INT"); + } + case 1: { + return ("CLK3"); + } + case 2: { + return ("CLK5"); + } + } + return ("??1245??"); + } + case 3: + case 4: + case 7: + case 8: { + switch (extc) { + case 0: { + return ("BRG_INT"); + } + case 1: { + return ("CLK9"); + } + case 2: { + return ("CLK15"); + } + } + return ("??3478??"); + } } return ("??9876??"); } @@ -246,13 +246,13 @@ void Daq_BRG_Set_ExtClk(uint brg, uint extc) brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; *brg_ptr = (*brg_ptr & ~CPM_BRG_EXTC_MASK) | - ((extc << CPM_BRG_EXTC_SHIFT) & CPM_BRG_EXTC_MASK); + ((extc << CPM_BRG_EXTC_SHIFT) & CPM_BRG_EXTC_MASK); } uint Daq_BRG_Rate(uint brg) @@ -266,15 +266,15 @@ uint Daq_BRG_Rate(uint brg) brg_ptr = (uint *)&immr->im_brgc1; brg_ptr += brg; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg_ptr += (brg - 4); + brg_ptr = (uint *)&immr->im_brgc5; + brg_ptr += (brg - 4); } brg_cnt = Daq_BRG_Get_Count(brg); switch (Daq_BRG_Get_ExtClk(brg)) { - case CPM_BRG_EXTC_CLK3: - case CPM_BRG_EXTC_CLK5: { + case CPM_BRG_EXTC_CLK3: + case CPM_BRG_EXTC_CLK5: { brg_freq = brg_cnt; break; } @@ -298,7 +298,7 @@ void Daq_Init_Clocks(int sample_rate, int sample_64x) DECLARE_GLOBAL_DATA_PTR; volatile ioport_t *iopa = ioport_addr((immap_t *)CFG_IMMR, 0 /* port A */); uint mclk_divisor; /* MCLK divisor */ - int flag; /* Interrupt state */ + int flag; /* Interrupt state */ /* Save off the clocking data */ Daq64xSampling = sample_64x; @@ -307,10 +307,10 @@ void Daq_Init_Clocks(int sample_rate, int sample_64x) * Limit the sample rate to some sensible values. */ if (sample_rate > MAX_64x_SAMPLE_RATE) { - sample_rate = MAX_64x_SAMPLE_RATE; + sample_rate = MAX_64x_SAMPLE_RATE; } if (sample_rate < MIN_SAMPLE_RATE) { - sample_rate = MIN_SAMPLE_RATE; + sample_rate = MIN_SAMPLE_RATE; } /* @@ -322,16 +322,16 @@ void Daq_Init_Clocks(int sample_rate, int sample_64x) /* Setup SCLK */ # ifdef RUN_SCLK_ON_BRG_INT - Daq_BRG_Set_ExtClk(SCLK_BRG, CPM_BRG_EXTC_BRGCLK); + Daq_BRG_Set_ExtClk(SCLK_BRG, CPM_BRG_EXTC_BRGCLK); # else - Daq_BRG_Set_ExtClk(SCLK_BRG, CPM_BRG_EXTC_CLK9); + Daq_BRG_Set_ExtClk(SCLK_BRG, CPM_BRG_EXTC_CLK9); # endif /* Setup LRCLK */ # ifdef RUN_LRCLK_ON_BRG_INT - Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_BRGCLK); + Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_BRGCLK); # else - Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_CLK5); + Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_CLK5); # endif /* @@ -357,7 +357,7 @@ void Daq_Init_Clocks(int sample_rate, int sample_64x) # endif # ifdef RUN_LRCLK_ON_BRG_INT - Daq_BRG_Set_Count(LRCLK_BRG, + Daq_BRG_Set_Count(LRCLK_BRG, mclk_divisor * MCLK_DIVISOR * SCLK_DIVISOR); # else Daq_BRG_Set_Count(LRCLK_BRG, SCLK_DIVISOR); @@ -367,7 +367,7 @@ void Daq_Init_Clocks(int sample_rate, int sample_64x) * Restore the Interrupt state */ if (flag) { - enable_interrupts(); + enable_interrupts(); } /* Enable the clock drivers */ @@ -386,276 +386,276 @@ void Daq_Stop_Clocks(void) #endif # ifdef TIGHTEN_UP_BRG_TIMING - /* - * Obtain MCLK BRG reset/disabled value - */ + /* + * Obtain MCLK BRG reset/disabled value + */ # if (MCLK_BRG == 0) - mclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 1) - mclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 2) - mclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 3) - mclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 4) - mclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 5) - mclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 6) - mclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 7) - mclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif - /* - * Obtain SCLK BRG reset/disabled value - */ + /* + * Obtain SCLK BRG reset/disabled value + */ # if (SCLK_BRG == 0) - sclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 1) - sclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 2) - sclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 3) - sclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 4) - sclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 5) - sclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 6) - sclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 7) - sclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif - /* - * Obtain LRCLK BRG reset/disabled value - */ + /* + * Obtain LRCLK BRG reset/disabled value + */ # if (LRCLK_BRG == 0) - lrclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 1) - lrclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 2) - lrclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 3) - lrclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 4) - lrclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 5) - lrclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 6) - lrclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 7) - lrclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif - + /* * Disable interrupt and save the current state */ flag = disable_interrupts(); - /* - * Set reset on MCLK BRG - */ + /* + * Set reset on MCLK BRG + */ # if (MCLK_BRG == 0) - *IM_BRGC1 = mclk_brg; + *IM_BRGC1 = mclk_brg; # endif # if (MCLK_BRG == 1) - *IM_BRGC2 = mclk_brg; + *IM_BRGC2 = mclk_brg; # endif # if (MCLK_BRG == 2) - *IM_BRGC3 = mclk_brg; + *IM_BRGC3 = mclk_brg; # endif # if (MCLK_BRG == 3) - *IM_BRGC4 = mclk_brg; + *IM_BRGC4 = mclk_brg; # endif # if (MCLK_BRG == 4) - *IM_BRGC5 = mclk_brg; + *IM_BRGC5 = mclk_brg; # endif # if (MCLK_BRG == 5) - *IM_BRGC6 = mclk_brg; + *IM_BRGC6 = mclk_brg; # endif # if (MCLK_BRG == 6) - *IM_BRGC7 = mclk_brg; + *IM_BRGC7 = mclk_brg; # endif # if (MCLK_BRG == 7) - *IM_BRGC8 = mclk_brg; + *IM_BRGC8 = mclk_brg; # endif - /* - * Set reset on SCLK BRG - */ + /* + * Set reset on SCLK BRG + */ # if (SCLK_BRG == 0) - *IM_BRGC1 = sclk_brg; + *IM_BRGC1 = sclk_brg; # endif # if (SCLK_BRG == 1) - *IM_BRGC2 = sclk_brg; + *IM_BRGC2 = sclk_brg; # endif # if (SCLK_BRG == 2) - *IM_BRGC3 = sclk_brg; + *IM_BRGC3 = sclk_brg; # endif # if (SCLK_BRG == 3) - *IM_BRGC4 = sclk_brg; + *IM_BRGC4 = sclk_brg; # endif # if (SCLK_BRG == 4) - *IM_BRGC5 = sclk_brg; + *IM_BRGC5 = sclk_brg; # endif # if (SCLK_BRG == 5) - *IM_BRGC6 = sclk_brg; + *IM_BRGC6 = sclk_brg; # endif # if (SCLK_BRG == 6) - *IM_BRGC7 = sclk_brg; + *IM_BRGC7 = sclk_brg; # endif # if (SCLK_BRG == 7) - *IM_BRGC8 = sclk_brg; + *IM_BRGC8 = sclk_brg; # endif - /* - * Set reset on LRCLK BRG - */ + /* + * Set reset on LRCLK BRG + */ # if (LRCLK_BRG == 0) - *IM_BRGC1 = lrclk_brg; + *IM_BRGC1 = lrclk_brg; # endif # if (LRCLK_BRG == 1) - *IM_BRGC2 = lrclk_brg; + *IM_BRGC2 = lrclk_brg; # endif # if (LRCLK_BRG == 2) - *IM_BRGC3 = lrclk_brg; + *IM_BRGC3 = lrclk_brg; # endif # if (LRCLK_BRG == 3) - *IM_BRGC4 = lrclk_brg; + *IM_BRGC4 = lrclk_brg; # endif # if (LRCLK_BRG == 4) - *IM_BRGC5 = lrclk_brg; + *IM_BRGC5 = lrclk_brg; # endif # if (LRCLK_BRG == 5) - *IM_BRGC6 = lrclk_brg; + *IM_BRGC6 = lrclk_brg; # endif # if (LRCLK_BRG == 6) - *IM_BRGC7 = lrclk_brg; + *IM_BRGC7 = lrclk_brg; # endif # if (LRCLK_BRG == 7) - *IM_BRGC8 = lrclk_brg; + *IM_BRGC8 = lrclk_brg; # endif - - /* - * Clear reset on MCLK BRG - */ + + /* + * Clear reset on MCLK BRG + */ # if (MCLK_BRG == 0) - *IM_BRGC1 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC1 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 1) - *IM_BRGC2 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC2 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 2) - *IM_BRGC3 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC3 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 3) - *IM_BRGC4 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC4 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 4) - *IM_BRGC5 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC5 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 5) - *IM_BRGC6 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC6 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 6) - *IM_BRGC7 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC7 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 7) - *IM_BRGC8 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC8 = mclk_brg & ~CPM_BRG_RST; # endif - /* - * Clear reset on SCLK BRG - */ + /* + * Clear reset on SCLK BRG + */ # if (SCLK_BRG == 0) - *IM_BRGC1 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC1 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 1) - *IM_BRGC2 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC2 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 2) - *IM_BRGC3 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC3 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 3) - *IM_BRGC4 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC4 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 4) - *IM_BRGC5 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC5 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 5) - *IM_BRGC6 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC6 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 6) - *IM_BRGC7 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC7 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 7) - *IM_BRGC8 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC8 = sclk_brg & ~CPM_BRG_RST; # endif - /* - * Clear reset on LRCLK BRG - */ + /* + * Clear reset on LRCLK BRG + */ # if (LRCLK_BRG == 0) - *IM_BRGC1 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC1 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 1) - *IM_BRGC2 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC2 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 2) - *IM_BRGC3 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC3 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 3) - *IM_BRGC4 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC4 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 4) - *IM_BRGC5 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC5 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 5) - *IM_BRGC6 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC6 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 6) - *IM_BRGC7 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC7 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 7) - *IM_BRGC8 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC8 = lrclk_brg & ~CPM_BRG_RST; # endif - + /* * Restore the Interrupt state */ if (flag) { - enable_interrupts(); + enable_interrupts(); } # else - /* - * Reset the clocks - */ - Daq_BRG_Reset(MCLK_BRG); - Daq_BRG_Reset(SCLK_BRG); - Daq_BRG_Reset(LRCLK_BRG); + /* + * Reset the clocks + */ + Daq_BRG_Reset(MCLK_BRG); + Daq_BRG_Reset(SCLK_BRG); + Daq_BRG_Reset(LRCLK_BRG); # endif } @@ -676,88 +676,88 @@ void Daq_Start_Clocks(int sample_rate) #endif # ifdef TIGHTEN_UP_BRG_TIMING - /* - * Obtain the enabled MCLK BRG value - */ + /* + * Obtain the enabled MCLK BRG value + */ # if (MCLK_BRG == 0) - mclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 1) - mclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 2) - mclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 3) - mclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 4) - mclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 5) - mclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 6) - mclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 7) - mclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif - /* - * Obtain the enabled SCLK BRG value - */ + /* + * Obtain the enabled SCLK BRG value + */ # if (SCLK_BRG == 0) - sclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 1) - sclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 2) - sclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 3) - sclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 4) - sclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 5) - sclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 6) - sclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 7) - sclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif - /* - * Obtain the enabled LRCLK BRG value - */ + /* + * Obtain the enabled LRCLK BRG value + */ # if (LRCLK_BRG == 0) - lrclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 1) - lrclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 2) - lrclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 3) - lrclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 4) - lrclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 5) - lrclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 6) - lrclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 7) - lrclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif /* Save off the real LRCLK value */ @@ -767,15 +767,15 @@ void Daq_Start_Clocks(int sample_rate) sclk_cnt = ((sclk_brg & 0x00001FFE) >> 1) + 1; /* Compute the delay as a function of SCLK count */ - delay_cnt = ((sclk_cnt / 4) - 2) * 10 + 6; + delay_cnt = ((sclk_cnt / 4) - 2) * 10 + 6; if (DaqSampleRate == 43402) { delay_cnt++; } - /* Clear out the count */ + /* Clear out the count */ temp_lrclk_brg = sclk_brg & ~0x00001FFE; - /* Insert the count */ + /* Insert the count */ temp_lrclk_brg |= ((delay_cnt + (sclk_cnt / 2) - 1) << 1) & 0x00001FFE; /* @@ -783,116 +783,116 @@ void Daq_Start_Clocks(int sample_rate) */ flag = disable_interrupts(); - /* - * Enable MCLK BRG - */ + /* + * Enable MCLK BRG + */ # if (MCLK_BRG == 0) - *IM_BRGC1 = mclk_brg; + *IM_BRGC1 = mclk_brg; # endif # if (MCLK_BRG == 1) - *IM_BRGC2 = mclk_brg; + *IM_BRGC2 = mclk_brg; # endif # if (MCLK_BRG == 2) - *IM_BRGC3 = mclk_brg; + *IM_BRGC3 = mclk_brg; # endif # if (MCLK_BRG == 3) - *IM_BRGC4 = mclk_brg; + *IM_BRGC4 = mclk_brg; # endif # if (MCLK_BRG == 4) - *IM_BRGC5 = mclk_brg; + *IM_BRGC5 = mclk_brg; # endif # if (MCLK_BRG == 5) - *IM_BRGC6 = mclk_brg; + *IM_BRGC6 = mclk_brg; # endif # if (MCLK_BRG == 6) - *IM_BRGC7 = mclk_brg; + *IM_BRGC7 = mclk_brg; # endif # if (MCLK_BRG == 7) - *IM_BRGC8 = mclk_brg; + *IM_BRGC8 = mclk_brg; # endif - /* - * Enable SCLK BRG - */ + /* + * Enable SCLK BRG + */ # if (SCLK_BRG == 0) - *IM_BRGC1 = sclk_brg; + *IM_BRGC1 = sclk_brg; # endif # if (SCLK_BRG == 1) - *IM_BRGC2 = sclk_brg; + *IM_BRGC2 = sclk_brg; # endif # if (SCLK_BRG == 2) - *IM_BRGC3 = sclk_brg; + *IM_BRGC3 = sclk_brg; # endif # if (SCLK_BRG == 3) - *IM_BRGC4 = sclk_brg; + *IM_BRGC4 = sclk_brg; # endif # if (SCLK_BRG == 4) - *IM_BRGC5 = sclk_brg; + *IM_BRGC5 = sclk_brg; # endif # if (SCLK_BRG == 5) - *IM_BRGC6 = sclk_brg; + *IM_BRGC6 = sclk_brg; # endif # if (SCLK_BRG == 6) - *IM_BRGC7 = sclk_brg; + *IM_BRGC7 = sclk_brg; # endif # if (SCLK_BRG == 7) - *IM_BRGC8 = sclk_brg; + *IM_BRGC8 = sclk_brg; # endif - /* - * Enable LRCLK BRG (1st time - temporary) - */ + /* + * Enable LRCLK BRG (1st time - temporary) + */ # if (LRCLK_BRG == 0) - *IM_BRGC1 = temp_lrclk_brg; + *IM_BRGC1 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 1) - *IM_BRGC2 = temp_lrclk_brg; + *IM_BRGC2 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 2) - *IM_BRGC3 = temp_lrclk_brg; + *IM_BRGC3 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 3) - *IM_BRGC4 = temp_lrclk_brg; + *IM_BRGC4 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 4) - *IM_BRGC5 = temp_lrclk_brg; + *IM_BRGC5 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 5) - *IM_BRGC6 = temp_lrclk_brg; + *IM_BRGC6 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 6) - *IM_BRGC7 = temp_lrclk_brg; + *IM_BRGC7 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 7) - *IM_BRGC8 = temp_lrclk_brg; + *IM_BRGC8 = temp_lrclk_brg; # endif - - /* - * Enable LRCLK BRG (2nd time - permanent) - */ + + /* + * Enable LRCLK BRG (2nd time - permanent) + */ # if (LRCLK_BRG == 0) - *IM_BRGC1 = real_lrclk_brg; + *IM_BRGC1 = real_lrclk_brg; # endif # if (LRCLK_BRG == 1) - *IM_BRGC2 = real_lrclk_brg; + *IM_BRGC2 = real_lrclk_brg; # endif # if (LRCLK_BRG == 2) - *IM_BRGC3 = real_lrclk_brg; + *IM_BRGC3 = real_lrclk_brg; # endif # if (LRCLK_BRG == 3) - *IM_BRGC4 = real_lrclk_brg; + *IM_BRGC4 = real_lrclk_brg; # endif # if (LRCLK_BRG == 4) - *IM_BRGC5 = real_lrclk_brg; + *IM_BRGC5 = real_lrclk_brg; # endif # if (LRCLK_BRG == 5) - *IM_BRGC6 = real_lrclk_brg; + *IM_BRGC6 = real_lrclk_brg; # endif # if (LRCLK_BRG == 6) - *IM_BRGC7 = real_lrclk_brg; + *IM_BRGC7 = real_lrclk_brg; # endif # if (LRCLK_BRG == 7) - *IM_BRGC8 = real_lrclk_brg; + *IM_BRGC8 = real_lrclk_brg; # endif /* @@ -900,14 +900,14 @@ void Daq_Start_Clocks(int sample_rate) */ if (flag) { enable_interrupts(); - } + } # else - /* - * Enable the clocks - */ - Daq_BRG_Enable(LRCLK_BRG); - Daq_BRG_Enable(SCLK_BRG); - Daq_BRG_Enable(MCLK_BRG); + /* + * Enable the clocks + */ + Daq_BRG_Enable(LRCLK_BRG); + Daq_BRG_Enable(SCLK_BRG); + Daq_BRG_Enable(MCLK_BRG); # endif } @@ -920,7 +920,7 @@ void Daq_Display_Clocks(void) printf("\nBRG:\n"); if (immr->im_brgc4 != 0) { - printf("\tbrgc4\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, MCLK\n", + printf("\tbrgc4\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, MCLK\n", immr->im_brgc4, (uint)&(immr->im_brgc4), Daq_BRG_Get_Count(3), @@ -928,7 +928,7 @@ void Daq_Display_Clocks(void) Daq_BRG_Get_ExtClk_Description(3)); } if (immr->im_brgc8 != 0) { - printf("\tbrgc8\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SCLK\n", + printf("\tbrgc8\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SCLK\n", immr->im_brgc8, (uint)&(immr->im_brgc8), Daq_BRG_Get_Count(7), @@ -936,7 +936,7 @@ void Daq_Display_Clocks(void) Daq_BRG_Get_ExtClk_Description(7)); } if (immr->im_brgc6 != 0) { - printf("\tbrgc6\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, LRCLK\n", + printf("\tbrgc6\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, LRCLK\n", immr->im_brgc6, (uint)&(immr->im_brgc6), Daq_BRG_Get_Count(5), @@ -944,7 +944,7 @@ void Daq_Display_Clocks(void) Daq_BRG_Get_ExtClk_Description(5)); } if (immr->im_brgc1 != 0) { - printf("\tbrgc1\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SMC1\n", + printf("\tbrgc1\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SMC1\n", immr->im_brgc1, (uint)&(immr->im_brgc1), Daq_BRG_Get_Count(0), @@ -952,7 +952,7 @@ void Daq_Display_Clocks(void) Daq_BRG_Get_ExtClk_Description(0)); } if (immr->im_brgc2 != 0) { - printf("\tbrgc2\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SMC2\n", + printf("\tbrgc2\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SMC2\n", immr->im_brgc2, (uint)&(immr->im_brgc2), Daq_BRG_Get_Count(1), @@ -960,7 +960,7 @@ void Daq_Display_Clocks(void) Daq_BRG_Get_ExtClk_Description(1)); } if (immr->im_brgc3 != 0) { - printf("\tbrgc3\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SCC1\n", + printf("\tbrgc3\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SCC1\n", immr->im_brgc3, (uint)&(immr->im_brgc3), Daq_BRG_Get_Count(2), @@ -968,7 +968,7 @@ void Daq_Display_Clocks(void) Daq_BRG_Get_ExtClk_Description(2)); } if (immr->im_brgc5 != 0) { - printf("\tbrgc5\t0x%08x @ 0x%08x, %5d count, %d extc, %8s\n", + printf("\tbrgc5\t0x%08x @ 0x%08x, %5d count, %d extc, %8s\n", immr->im_brgc5, (uint)&(immr->im_brgc5), Daq_BRG_Get_Count(4), @@ -976,7 +976,7 @@ void Daq_Display_Clocks(void) Daq_BRG_Get_ExtClk_Description(4)); } if (immr->im_brgc7 != 0) { - printf("\tbrgc7\t0x%08x @ 0x%08x, %5d count, %d extc, %8s\n", + printf("\tbrgc7\t0x%08x @ 0x%08x, %5d count, %d extc, %8s\n", immr->im_brgc7, (uint)&(immr->im_brgc7), Daq_BRG_Get_Count(6), @@ -985,14 +985,14 @@ void Daq_Display_Clocks(void) } # ifdef RUN_SCLK_ON_BRG_INT - mclk_divisor = Daq_BRG_Rate(MCLK_BRG) / Daq_BRG_Rate(SCLK_BRG); + mclk_divisor = Daq_BRG_Rate(MCLK_BRG) / Daq_BRG_Rate(SCLK_BRG); # else - mclk_divisor = Daq_BRG_Get_Count(SCLK_BRG); + mclk_divisor = Daq_BRG_Get_Count(SCLK_BRG); # endif # ifdef RUN_LRCLK_ON_BRG_INT - sclk_divisor = Daq_BRG_Rate(SCLK_BRG) / Daq_BRG_Rate(LRCLK_BRG); + sclk_divisor = Daq_BRG_Rate(SCLK_BRG) / Daq_BRG_Rate(LRCLK_BRG); # else - sclk_divisor = Daq_BRG_Get_Count(LRCLK_BRG); + sclk_divisor = Daq_BRG_Get_Count(LRCLK_BRG); # endif printf("\nADC/DAC Clocking (%d/%d):\n", sclk_divisor, mclk_divisor); @@ -1001,23 +1001,23 @@ void Daq_Display_Clocks(void) mclk_divisor, mclk_divisor * sclk_divisor); # ifdef RUN_SCLK_ON_BRG_INT - printf("\tSCLK %8d Hz, or %3dx LRCLK\n", + printf("\tSCLK %8d Hz, or %3dx LRCLK\n", Daq_BRG_Rate(SCLK_BRG), sclk_divisor); # else - printf("\tSCLK %8d Hz, or %3dx LRCLK\n", + printf("\tSCLK %8d Hz, or %3dx LRCLK\n", Daq_BRG_Rate(MCLK_BRG) / mclk_divisor, sclk_divisor); # endif # ifdef RUN_LRCLK_ON_BRG_INT - printf("\tLRCLK %8d Hz\n", + printf("\tLRCLK %8d Hz\n", Daq_BRG_Rate(LRCLK_BRG)); # else # ifdef RUN_SCLK_ON_BRG_INT - printf("\tLRCLK %8d Hz\n", + printf("\tLRCLK %8d Hz\n", Daq_BRG_Rate(SCLK_BRG) / sclk_divisor); # else - printf("\tLRCLK %8d Hz\n", + printf("\tLRCLK %8d Hz\n", Daq_BRG_Rate(MCLK_BRG) / (mclk_divisor * sclk_divisor)); # endif # endif -- cgit v1.2.3