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authorAlexey Brodkin <abrodkin@synopsys.com>2015-04-09 19:50:58 +0300
committerAlexey Brodkin <abrodkin@synopsys.com>2015-04-09 20:00:46 +0300
commit0241c3131dd4c19a1116c863d622358eb2680462 (patch)
tree3add3601f080dc79ec279e644c8b831ed5da83e0
parent385a08a60f042061b004642d6b9bb6cfb794ad5a (diff)
board: axs10x - support v3 mother-board
There're 2 versions of motherboards that could be used in ARC SDP. The only important difference for U-Boot is different NAND IC in use: [1] v2 board (we used to support up until now) sports MT29F4G08ABADAWP while [2] v3 board sports MT29F4G16ABADAWP They are almost the same except data bus width 8-bit in [1] and 16-bit in [2]. And for proper support of 16-bit data bus we have to pass NAND_BUSWIDTH_16 option to NAND driver core - which we do now knowing board type we're running on. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
-rw-r--r--board/synopsys/axs101/axs101.c14
-rw-r--r--board/synopsys/axs101/axs10x.h16
-rw-r--r--board/synopsys/axs101/nand.c7
-rw-r--r--include/configs/axs101.h6
4 files changed, 43 insertions, 0 deletions
diff --git a/board/synopsys/axs101/axs101.c b/board/synopsys/axs101/axs101.c
index 774204976e..8c16410944 100644
--- a/board/synopsys/axs101/axs101.c
+++ b/board/synopsys/axs101/axs101.c
@@ -9,6 +9,7 @@
#include <malloc.h>
#include <netdev.h>
#include <phy.h>
+#include "axs10x.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -42,3 +43,16 @@ int board_eth_init(bd_t *bis)
return 0;
}
+
+
+#define AXS_MB_CREG 0xE0011000
+
+int board_early_init_f(void)
+{
+ if (readl((void __iomem *)AXS_MB_CREG + 0x234) & (1 << 28))
+ gd->board_type = AXS_MB_V3;
+ else
+ gd->board_type = AXS_MB_V2;
+
+ return 0;
+}
diff --git a/board/synopsys/axs101/axs10x.h b/board/synopsys/axs101/axs10x.h
new file mode 100644
index 0000000000..8e8c41f865
--- /dev/null
+++ b/board/synopsys/axs101/axs10x.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2015 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _BOARD_SYNOPSYS_AXS10X_H
+#define _BOARD_SYNOPSYS_AXS10X_H
+
+enum {
+ AXS_MB_V2,
+ AXS_MB_V3
+};
+
+#endif /* _BOARD_SYNOPSYS_AXS10X_H */
+
diff --git a/board/synopsys/axs101/nand.c b/board/synopsys/axs101/nand.c
index ff35286c6e..4be52e22c0 100644
--- a/board/synopsys/axs101/nand.c
+++ b/board/synopsys/axs101/nand.c
@@ -9,6 +9,9 @@
#include <malloc.h>
#include <nand.h>
#include <asm/io.h>
+#include "axs10x.h"
+
+DECLARE_GLOBAL_DATA_PTR;
#define BUS_WIDTH 8 /* AXI data bus width in bytes */
@@ -232,5 +235,9 @@ int board_nand_init(struct nand_chip *nand)
nand->write_buf = axs101_nand_write_buf;
nand->read_buf = axs101_nand_read_buf;
+ /* MBv3 has NAND IC with 16-bit data bus */
+ if (gd->board_type == AXS_MB_V3)
+ nand->options |= NAND_BUSWIDTH_16;
+
return 0;
}
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index 5fb8aca4bc..8a7095c5b2 100644
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
@@ -34,6 +34,12 @@
#define CONFIG_SYS_LOAD_ADDR 0x82000000
/*
+ * This board might be of different versions so handle it
+ */
+#define CONFIG_BOARD_TYPES
+#define CONFIG_BOARD_EARLY_INIT_F
+
+/*
* NAND Flash configuration
*/
#define CONFIG_SYS_NO_FLASH