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authorSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>2015-05-29 09:54:37 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2015-07-07 11:39:39 +0200
commite05412f5ec27a07df92efa5cad47acd1c7fbea08 (patch)
tree46ce758cf332f1d7a9feb7755df2d59c54873510
parentb69969be5d509c50165d6b21ac6fca469732e049 (diff)
arm: dcc: Add uart dcc support for armv8
Added UART DCC support for armv8 Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
-rw-r--r--drivers/serial/arm_dcc.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c
index e77773740f..df7eb05e82 100644
--- a/drivers/serial/arm_dcc.c
+++ b/drivers/serial/arm_dcc.c
@@ -61,6 +61,22 @@
#define status_dcc(x) \
__asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x))
+#elif defined(CONFIG_CPU_ARMV8)
+/*
+ * ARMV8
+ */
+#define DCC_RBIT (1 << 30)
+#define DCC_WBIT (1 << 29)
+
+#define write_dcc(x) \
+ __asm__ volatile ("msr dbgdtrtx_el0, %0\n" : : "r" (x))
+
+#define read_dcc(x) \
+ __asm__ volatile ("mrs %0, dbgdtrrx_el0\n" : "=r" (x))
+
+#define status_dcc(x) \
+ __asm__ volatile ("mrs %0, mdccsr_el0\n" : "=r" (x))
+
#else
#define DCC_RBIT (1 << 0)
#define DCC_WBIT (1 << 1)