diff options
| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-07-07 11:38:44 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-07-07 11:38:44 +0200 |
| commit | 6f43ba70d15e15a08c25b3d956c70addb6740737 (patch) | |
| tree | e5ddc8498043c0c47559737ea60e4d7fc866e20a | |
| parent | 003b09dad492ebc385b28067b8028a0c0ff9323f (diff) | |
| parent | 9c6b05cb724e18d1db3f9e1a75b2272572f06fbd (diff) | |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
1917 files changed, 15300 insertions, 9505 deletions
@@ -1,7 +1,7 @@ VERSION = 2015 PATCHLEVEL = 07 SUBLEVEL = -EXTRAVERSION = -rc1 +EXTRAVERSION = -rc3 NAME = # *DOCUMENTATION* @@ -977,8 +977,6 @@ The following options need to be configured: CONFIG_AUTOBOOT_PROMPT CONFIG_AUTOBOOT_DELAY_STR CONFIG_AUTOBOOT_STOP_STR - CONFIG_AUTOBOOT_DELAY_STR2 - CONFIG_AUTOBOOT_STOP_STR2 CONFIG_ZERO_BOOTDELAY_CHECK CONFIG_RESET_TO_RETRY @@ -1050,9 +1048,7 @@ The following options need to be configured: Monitor commands can be included or excluded from the build by using the #include files <config_cmd_all.h> and #undef'ing unwanted - commands, or using <config_cmd_default.h> - and augmenting with additional #define's - for wanted commands. + commands, or adding #define's for wanted commands. The default command configuration includes all commands except those marked below with a "*". @@ -3039,6 +3035,19 @@ CBFS (Coreboot Filesystem) support this is instead controlled by the value of /config/load-environment. +- Parallel Flash support: + CONFIG_SYS_NO_FLASH + + Traditionally U-boot was run on systems with parallel NOR + flash. This option is used to disable support for parallel NOR + flash. This option should be defined if the board does not have + parallel flash. + + If this option is not defined one of the generic flash drivers + (e.g. CONFIG_FLASH_CFI_DRIVER or CONFIG_ST_SMI) must be + selected or the board must provide an implementation of the + flash API (see include/flash.h). + - DataFlash Support: CONFIG_HAS_DATAFLASH @@ -3081,6 +3090,15 @@ CBFS (Coreboot Filesystem) support memories can be connected with a given cs line. Currently Xilinx Zynq qspi supports these type of connections. + CONFIG_SPI_FLASH_MTD spi-flash MTD layer + + Define this option to use mtd support for spi flash layer, this + adapter is for translating mtd_read/mtd_write commands into + spi_flash_read/spi_flash_write commands. It is not intended to + use it within sf_cmd or the SPI flash subsystem. Such an adapter + is needed for subsystems like UBI which can only operate on top + of the MTD layer. + - SystemACE Support: CONFIG_SYSTEMACE diff --git a/arch/Kconfig b/arch/Kconfig index 200588aef6..96db5c5088 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -25,6 +25,7 @@ config ARM config AVR32 bool "AVR32 architecture" select HAVE_GENERIC_BOARD + select SYS_GENERIC_BOARD config BLACKFIN bool "Blackfin architecture" diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 67d28d33f9..925e31201e 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -4,9 +4,6 @@ menu "ARC architecture" config SYS_ARCH default "arc" -config USE_PRIVATE_LIBGCC - default y - config SYS_CPU default "arcv1" if ISA_ARCOMPACT default "arcv2" if ISA_ARCV2 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2985e6e065..0829235333 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -346,8 +346,13 @@ config TARGET_DRACO select CPU_V7 select SUPPORT_SPL -config TARGET_DXR2 - bool "Support dxr2" +config TARGET_THUBAN + bool "Support thuban" + select CPU_V7 + select SUPPORT_SPL + +config TARGET_RASTABAN + bool "Support rastaban" select CPU_V7 select SUPPORT_SPL @@ -369,6 +374,14 @@ config TARGET_PENGWYN select DM_SERIAL select DM_GPIO +config TARGET_AM335X_BALTOS + bool "Support am335x_baltos" + select CPU_V7 + select SUPPORT_SPL + select DM + select DM_SERIAL + select DM_GPIO + config TARGET_AM335X_EVM bool "Support am335x_evm" select CPU_V7 @@ -668,6 +681,7 @@ config TEGRA select SUPPORT_SPL select SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL select CPU_V7 select DM select DM_SPI_FLASH @@ -794,6 +808,7 @@ config ARCH_UNIPHIER select DM select DM_SERIAL select DM_I2C + select SPL_DISABLE_OF_CONTROL help Support for UniPhier SoC family developed by Socionext Inc. (formerly, System LSI Business Division of Panasonic Corporation) @@ -962,6 +977,7 @@ source "board/trizepsiv/Kconfig" source "board/ttcontrol/vision2/Kconfig" source "board/udoo/Kconfig" source "board/vpac270/Kconfig" +source "board/vscom/baltos/Kconfig" source "board/wandboard/Kconfig" source "board/warp/Kconfig" source "board/woodburn/Kconfig" diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c index c342217fa9..42f3df2ac2 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c @@ -332,6 +332,11 @@ static void mxs_enable_4p2_dcdc_input(int xfer) debug("SPL: %s 4P2 DC-DC Input\n", xfer ? "Enabling" : "Disabling"); + if (xfer && (readl(&power_regs->hw_power_5vctrl) & + POWER_5VCTRL_ENABLE_DCDC)) { + return; + } + prev_5v_brnout = readl(&power_regs->hw_power_5vctrl) & POWER_5VCTRL_PWDN_5VBRNOUT; prev_5v_droop = readl(&power_regs->hw_power_ctrl) & @@ -343,11 +348,6 @@ static void mxs_enable_4p2_dcdc_input(int xfer) clrbits_le32(&power_regs->hw_power_ctrl, POWER_CTRL_ENIRQ_VDD5V_DROOP); - if (xfer && (readl(&power_regs->hw_power_5vctrl) & - POWER_5VCTRL_ENABLE_DCDC)) { - return; - } - /* * Recording orignal values that will be modified temporarlily * to handle a chip bug. See chip errata for CQ ENGR00115837 diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c index f5b16b4b72..b3fb0c47ab 100644 --- a/arch/arm/cpu/armv7/am33xx/ddr.c +++ b/arch/arm/cpu/armv7/am33xx/ddr.c @@ -123,30 +123,33 @@ void config_sdram_emif4d5(const struct emif_regs *regs, int nr) writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl); writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw); - /* Perform hardware leveling. */ - udelay(1000); - writel(readl(&emif_reg[nr]->emif_ddr_ext_phy_ctrl_36) | - 0x100, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36); - writel(readl(&emif_reg[nr]->emif_ddr_ext_phy_ctrl_36_shdw) | - 0x100, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36_shdw); - - writel(0x80000000, &emif_reg[nr]->emif_rd_wr_lvl_rmp_ctl); - - /* Enable read leveling */ - writel(0x80000000, &emif_reg[nr]->emif_rd_wr_lvl_ctl); - - /* - * Enable full read and write leveling. Wait for read and write - * leveling bit to clear RDWRLVLFULL_START bit 31 - */ - while((readl(&emif_reg[nr]->emif_rd_wr_lvl_ctl) & 0x80000000) != 0) - ; - - /* Check the timeout register to see if leveling is complete */ - if((readl(&emif_reg[nr]->emif_status) & 0x70) != 0) - puts("DDR3 H/W leveling incomplete with errors\n"); - - if (emif_sdram_type() == EMIF_SDRAM_TYPE_LPDDR2) { + /* Perform hardware leveling for DDR3 */ + if (emif_sdram_type(regs->sdram_config) == EMIF_SDRAM_TYPE_DDR3) { + udelay(1000); + writel(readl(&emif_reg[nr]->emif_ddr_ext_phy_ctrl_36) | + 0x100, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36); + writel(readl(&emif_reg[nr]->emif_ddr_ext_phy_ctrl_36_shdw) | + 0x100, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36_shdw); + + writel(0x80000000, &emif_reg[nr]->emif_rd_wr_lvl_rmp_ctl); + + /* Enable read leveling */ + writel(0x80000000, &emif_reg[nr]->emif_rd_wr_lvl_ctl); + + /* + * Enable full read and write leveling. Wait for read and write + * leveling bit to clear RDWRLVLFULL_START bit 31 + */ + while ((readl(&emif_reg[nr]->emif_rd_wr_lvl_ctl) & 0x80000000) + != 0) + ; + + /* Check the timeout register to see if leveling is complete */ + if ((readl(&emif_reg[nr]->emif_status) & 0x70) != 0) + puts("DDR3 H/W leveling incomplete with errors\n"); + + } else { + /* DDR2 */ configure_mr(nr, 0); configure_mr(nr, 1); } @@ -183,9 +186,49 @@ void set_sdram_timings(const struct emif_regs *regs, int nr) } /* + * Configure EXT PHY registers for software leveling + */ +static void ext_phy_settings_swlvl(const struct emif_regs *regs, int nr) +{ + u32 *ext_phy_ctrl_base = 0; + u32 *emif_ext_phy_ctrl_base = 0; + __maybe_unused const u32 *ext_phy_ctrl_const_regs; + u32 i = 0; + __maybe_unused u32 size; + + ext_phy_ctrl_base = (u32 *)&(regs->emif_ddr_ext_phy_ctrl_1); + emif_ext_phy_ctrl_base = + (u32 *)&(emif_reg[nr]->emif_ddr_ext_phy_ctrl_1); + + /* Configure external phy control timing registers */ + for (i = 0; i < EMIF_EXT_PHY_CTRL_TIMING_REG; i++) { + writel(*ext_phy_ctrl_base, emif_ext_phy_ctrl_base++); + /* Update shadow registers */ + writel(*ext_phy_ctrl_base++, emif_ext_phy_ctrl_base++); + } + +#ifdef CONFIG_AM43XX + /* + * External phy 6-24 registers do not change with ddr frequency. + * These only need to be set on DDR2 on AM43xx. + */ + emif_get_ext_phy_ctrl_const_regs(&ext_phy_ctrl_const_regs, &size); + + if (!size) + return; + + for (i = 0; i < size; i++) { + writel(ext_phy_ctrl_const_regs[i], emif_ext_phy_ctrl_base++); + /* Update shadow registers */ + writel(ext_phy_ctrl_const_regs[i], emif_ext_phy_ctrl_base++); + } +#endif +} + +/* * Configure EXT PHY registers for hardware leveling */ -static void ext_phy_settings(const struct emif_regs *regs, int nr) +static void ext_phy_settings_hwlvl(const struct emif_regs *regs, int nr) { /* * Enable hardware leveling on the EMIF. For details about these @@ -256,8 +299,12 @@ void config_ddr_phy(const struct emif_regs *regs, int nr) writel(regs->emif_ddr_phy_ctlr_1, &emif_reg[nr]->emif_ddr_phy_ctrl_1_shdw); - if (get_emif_rev((u32)emif_reg[nr]) == EMIF_4D5) - ext_phy_settings(regs, nr); + if (get_emif_rev((u32)emif_reg[nr]) == EMIF_4D5) { + if (emif_sdram_type(regs->sdram_config) == EMIF_SDRAM_TYPE_DDR3) + ext_phy_settings_hwlvl(regs, nr); + else + ext_phy_settings_swlvl(regs, nr); + } } /** diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c index 9cf816c89a..27fa3fb462 100644 --- a/arch/arm/cpu/armv7/am33xx/emif4.c +++ b/arch/arm/cpu/armv7/am33xx/emif4.c @@ -124,8 +124,9 @@ void config_ddr(unsigned int pll, const struct ctrl_ioregs *ioregs, /* Set CKE to be controlled by EMIF/DDR PHY */ writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); - /* Allow EMIF to control DDR_RESET */ - writel(0x00000000, &ddrctrl->ddrioctrl); + if (emif_sdram_type(regs->sdram_config) == EMIF_SDRAM_TYPE_DDR3) + /* Allow EMIF to control DDR_RESET */ + writel(0x00000000, &ddrctrl->ddrioctrl); #endif /* Program EMIF instance */ diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c index c56417dd2f..0b0e5003cc 100644 --- a/arch/arm/cpu/armv7/cpu.c +++ b/arch/arm/cpu/armv7/cpu.c @@ -24,7 +24,7 @@ void __weak cpu_cache_initialization(void){} -int cleanup_before_linux(void) +int cleanup_before_linux_select(int flags) { /* * this function is called just before we call linux @@ -42,24 +42,30 @@ int cleanup_before_linux(void) icache_disable(); invalidate_icache_all(); - /* - * turn off D-cache - * dcache_disable() in turn flushes the d-cache and disables MMU - */ - dcache_disable(); - v7_outer_cache_disable(); + if (flags & CBL_DISABLE_CACHES) { + /* + * turn off D-cache + * dcache_disable() in turn flushes the d-cache and disables MMU + */ + dcache_disable(); + v7_outer_cache_disable(); - /* - * After D-cache is flushed and before it is disabled there may - * be some new valid entries brought into the cache. We are sure - * that these lines are not dirty and will not affect our execution. - * (because unwinding the call-stack and setting a bit in CP15 SCTLR - * is all we did during this. We have not pushed anything on to the - * stack. Neither have we affected any static data) - * So just invalidate the entire d-cache again to avoid coherency - * problems for kernel - */ - invalidate_dcache_all(); + /* + * After D-cache is flushed and before it is disabled there may + * be some new valid entries brought into the cache. We are + * sure that these lines are not dirty and will not affect our + * execution. (because unwinding the call-stack and setting a + * bit in CP15 SCTRL is all we did during this. We have not + * pushed anything on to the stack. Neither have we affected + * any static data) So just invalidate the entire d-cache again + * to avoid coherency problems for kernel + */ + invalidate_dcache_all(); + } else { + flush_dcache_all(); + invalidate_icache_all(); + icache_enable(); + } /* * Some CPU need more cache attention before starting the kernel. @@ -68,3 +74,8 @@ int cleanup_before_linux(void) return 0; } + +int cleanup_before_linux(void) +{ + return cleanup_before_linux_select(CBL_ALL); +} diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig index c61442578d..4a7d82f74c 100644 --- a/arch/arm/cpu/armv7/exynos/Kconfig +++ b/arch/arm/cpu/armv7/exynos/Kconfig @@ -8,6 +8,7 @@ config TARGET_SMDKV310 select SUPPORT_SPL bool "Exynos4210 SMDKV310 board" select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_TRATS bool "Exynos4210 Trats board" @@ -28,6 +29,7 @@ config TARGET_ODROID config TARGET_ODROID_XU3 bool "Exynos5422 Odroid board" select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_ARNDALE bool "Exynos5250 Arndale board" @@ -35,40 +37,43 @@ config TARGET_ARNDALE select CPU_V7_HAS_VIRT select SUPPORT_SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_SMDK5250 bool "SMDK5250 board" select SUPPORT_SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_SNOW bool "Snow board" select SUPPORT_SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_SMDK5420 bool "SMDK5420 board" select SUPPORT_SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_PEACH_PI bool "Peach Pi board" select SUPPORT_SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_PEACH_PIT bool "Peach Pit board" select SUPPORT_SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL endchoice config SYS_SOC default "exynos" -config DM_USB - default y - source "board/samsung/smdkv310/Kconfig" source "board/samsung/trats/Kconfig" source "board/samsung/universal_c210/Kconfig" diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c index 03674e609f..c94a807819 100644 --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c @@ -372,6 +372,7 @@ static void setup_dplls(void) { u32 temp; const struct dpll_params *params; + struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE; debug("setup_dplls\n"); @@ -382,7 +383,8 @@ static void setup_dplls(void) * Core DPLL will be locked after setting up EMIF * using the FREQ_UPDATE method(freq_update_core()) */ - if (emif_sdram_type() == EMIF_SDRAM_TYPE_LPDDR2) + if (emif_sdram_type(readl(&emif->emif_sdram_config)) == + EMIF_SDRAM_TYPE_LPDDR2) do_setup_dpll((*prcm)->cm_clkmode_dpll_core, params, DPLL_NO_LOCK, "core"); else @@ -508,6 +510,12 @@ static u32 optimize_vcore_voltage(struct volts const *v) return val; } +#ifdef CONFIG_IODELAY_RECALIBRATION +void __weak recalibrate_iodelay(void) +{ +} +#endif + /* * Setup the voltages for the main SoC core power domains. * We start with the maximum voltages allowed here, as set in the corresponding @@ -561,6 +569,16 @@ void scale_vcores(struct vcores_data const *vcores) debug("cor: %d\n", vcores->core.value); do_scale_vcore(vcores->core.addr, vcores->core.value, vcores->core.pmic); + /* + * IO delay recalibration should be done immediately after + * adjusting AVS voltages for VDD_CORE_L. + * Respective boards should call __recalibrate_iodelay() + * with proper mux, virtual and manual mode configurations. + */ +#ifdef CONFIG_IODELAY_RECALIBRATION + recalibrate_iodelay(); +#endif + debug("mpu: %d\n", vcores->mpu.value); do_scale_vcore(vcores->mpu.addr, vcores->mpu.value, vcores->mpu.pmic); /* Configure MPU ABB LDO after scale */ @@ -587,6 +605,16 @@ void scale_vcores(struct vcores_data const *vcores) val = optimize_vcore_voltage(&vcores->core); do_scale_vcore(vcores->core.addr, val, vcores->core.pmic); + /* + * IO delay recalibration should be done immediately after + * adjusting AVS voltages for VDD_CORE_L. + * Respective boards should call __recalibrate_iodelay() + * with proper mux, virtual and manual mode configurations. + */ +#ifdef CONFIG_IODELAY_RECALIBRATION + recalibrate_iodelay(); +#endif + val = optimize_vcore_voltage(&vcores->mpu); do_scale_vcore(vcores->mpu.addr, val, vcores->mpu.pmic); diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c index c01a98f719..f5b22f6a78 100644 --- a/arch/arm/cpu/armv7/omap-common/emif-common.c +++ b/arch/arm/cpu/armv7/omap-common/emif-common.c @@ -242,13 +242,122 @@ static void omap5_ddr3_leveling(u32 base, const struct emif_regs *regs) __udelay(130); } -static void ddr3_leveling(u32 base, const struct emif_regs *regs) +static void update_hwleveling_output(u32 base, const struct emif_regs *regs) { - if (is_omap54xx()) - omap5_ddr3_leveling(base, regs); + struct emif_reg_struct *emif = (struct emif_reg_struct *)base; + u32 *emif_ext_phy_ctrl_reg, *emif_phy_status; + u32 reg, i; + + emif_phy_status = (u32 *)&emif->emif_ddr_phy_status[7]; + + /* Update PHY_REG_RDDQS_RATIO */ + emif_ext_phy_ctrl_reg = (u32 *)&emif->emif_ddr_ext_phy_ctrl_7; + for (i = 0; i < PHY_RDDQS_RATIO_REGS; i++) { + reg = readl(emif_phy_status++); + writel(reg, emif_ext_phy_ctrl_reg++); + writel(reg, emif_ext_phy_ctrl_reg++); + } + + /* Update PHY_REG_FIFO_WE_SLAVE_RATIO */ + emif_ext_phy_ctrl_reg = (u32 *)&emif->emif_ddr_ext_phy_ctrl_2; + for (i = 0; i < PHY_FIFO_WE_SLAVE_RATIO_REGS; i++) { + reg = readl(emif_phy_status++); + writel(reg, emif_ext_phy_ctrl_reg++); + writel(reg, emif_ext_phy_ctrl_reg++); + } + + /* Update PHY_REG_WR_DQ/DQS_SLAVE_RATIO */ + emif_ext_phy_ctrl_reg = (u32 *)&emif->emif_ddr_ext_phy_ctrl_12; + for (i = 0; i < PHY_REG_WR_DQ_SLAVE_RATIO_REGS; i++) { + reg = readl(emif_phy_status++); + writel(reg, emif_ext_phy_ctrl_reg++); + writel(reg, emif_ext_phy_ctrl_reg++); + } + + /* Disable Leveling */ + writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1); + writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1_shdw); + writel(0x0, &emif->emif_rd_wr_lvl_rmp_ctl); } -static void ddr3_init(u32 base, const struct emif_regs *regs) +static void dra7_ddr3_leveling(u32 base, const struct emif_regs *regs) +{ + struct emif_reg_struct *emif = (struct emif_reg_struct *)base; + + /* Clear Error Status */ + clrsetbits_le32(&emif->emif_ddr_ext_phy_ctrl_36, + EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR, + EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR); + + clrsetbits_le32(&emif->emif_ddr_ext_phy_ctrl_36_shdw, + EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR, + EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR); + + /* Disable refreshed before leveling */ + clrsetbits_le32(&emif->emif_sdram_ref_ctrl, EMIF_REG_INITREF_DIS_SHIFT, + EMIF_REG_INITREF_DIS_SHIFT); + + /* Start Full leveling */ + writel(DDR3_FULL_LVL, &emif->emif_rd_wr_lvl_ctl); + + __udelay(300); + + /* Check for leveling timeout */ + if (readl(&emif->emif_status) & EMIF_REG_LEVELING_TO_MASK) { + printf("Leveling timeout on EMIF%d\n", emif_num(base)); + return; + } + + /* Enable refreshes after leveling */ + clrbits_le32(&emif->emif_sdram_ref_ctrl, EMIF_REG_INITREF_DIS_SHIFT); + + debug("HW leveling success\n"); + /* + * Update slave ratios in EXT_PHY_CTRLx registers + * as per HW leveling output + */ + update_hwleveling_output(base, regs); +} + +static void dra7_ddr3_init(u32 base, const struct emif_regs *regs) +{ + struct emif_reg_struct *emif = (struct emif_reg_struct *)base; + + if (warm_reset()) + emif_reset_phy(base); + do_ext_phy_settings(base, regs); + + writel(regs->ref_ctrl | EMIF_REG_INITREF_DIS_MASK, + &emif->emif_sdram_ref_ctrl); + /* Update timing registers */ + writel(regs->sdram_tim1, &emif->emif_sdram_tim_1); + writel(regs->sdram_tim2, &emif->emif_sdram_tim_2); + writel(regs->sdram_tim3, &emif->emif_sdram_tim_3); + + writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_5_LL_0, &emif->emif_l3_config); + writel(regs->read_idle_ctrl, &emif->emif_read_idlectrl); + writel(regs->zq_config, &emif->emif_zq_config); + writel(regs->temp_alert_config, &emif->emif_temp_alert_config); + writel(regs->emif_rd_wr_lvl_rmp_ctl, &emif->emif_rd_wr_lvl_rmp_ctl); + writel(regs->emif_rd_wr_lvl_ctl, &emif->emif_rd_wr_lvl_ctl); + + writel(regs->emif_ddr_phy_ctlr_1_init, &emif->emif_ddr_phy_ctrl_1); + writel(regs->emif_rd_wr_exec_thresh, &emif->emif_rd_wr_exec_thresh); + + writel(regs->ref_ctrl, &emif->emif_sdram_ref_ctrl); + + writel(regs->sdram_config2, &emif->emif_lpddr2_nvm_config); + writel(regs->sdram_config_init, &emif->emif_sdram_config); + + __udelay(1000); + + writel(regs->ref_ctrl_final, &emif->emif_sdram_ref_ctrl); + + if (regs->emif_rd_wr_lvl_rmp_ctl & EMIF_REG_RDWRLVL_EN_MASK) + dra7_ddr3_leveling(base, regs); +} + +static void omap5_ddr3_init(u32 base, const struct emif_regs *regs) { struct emif_reg_struct *emif = (struct emif_reg_struct *)base; @@ -269,25 +378,20 @@ static void ddr3_init(u32 base, const struct emif_regs *regs) writel(regs->read_idle_ctrl, &emif->emif_read_idlectrl); - /* - * The same sequence should work on OMAP5432 as well. But strange that - * it is not working - */ - if (is_dra7xx()) { - do_ext_phy_settings(base, regs); - writel(regs->ref_ctrl_final, &emif->emif_sdram_ref_ctrl); - writel(regs->sdram_config2, &emif->emif_lpddr2_nvm_config); - writel(regs->sdram_config_init, &emif->emif_sdram_config); - } else { - writel(regs->sdram_config2, &emif->emif_lpddr2_nvm_config); - writel(regs->sdram_config_init, &emif->emif_sdram_config); - do_ext_phy_settings(base, regs); - } + writel(regs->sdram_config2, &emif->emif_lpddr2_nvm_config); + writel(regs->sdram_config_init, &emif->emif_sdram_config); + do_ext_phy_settings(base, regs); - /* enable leveling */ writel(regs->emif_rd_wr_lvl_rmp_ctl, &emif->emif_rd_wr_lvl_rmp_ctl); + omap5_ddr3_leveling(base, regs); +} - ddr3_leveling(base, regs); +static void ddr3_init(u32 base, const struct emif_regs *regs) +{ + if (is_omap54xx()) + omap5_ddr3_init(base, regs); + else + dra7_ddr3_init(base, regs); } #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS @@ -1066,16 +1170,18 @@ static void do_sdram_init(u32 base) * Changing the timing registers in EMIF can happen(going from one * OPP to another) */ - if (!(in_sdram || warm_reset())) { - if (emif_sdram_type() == EMIF_SDRAM_TYPE_LPDDR2) + if (!in_sdram && (!warm_reset() || is_dra7xx())) { + if (emif_sdram_type(regs->sdram_config) == + EMIF_SDRAM_TYPE_LPDDR2) lpddr2_init(base, regs); else ddr3_init(base, regs); } - if (warm_reset() && (emif_sdram_type() == EMIF_SDRAM_TYPE_DDR3)) { + if (warm_reset() && (emif_sdram_type(regs->sdram_config) == + EMIF_SDRAM_TYPE_DDR3) && !is_dra7xx()) { set_lpmode_selfrefresh(base); emif_reset_phy(base); - ddr3_leveling(base, regs); + omap5_ddr3_leveling(base, regs); } /* Write to the shadow registers */ @@ -1294,7 +1400,8 @@ static void do_bug0039_workaround(u32 base) void sdram_init(void) { u32 in_sdram, size_prog, size_detect; - u32 sdram_type = emif_sdram_type(); + struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE; + u32 sdram_type = emif_sdram_type(emif->emif_sdram_config); debug(">>sdram_init()\n"); diff --git a/arch/arm/cpu/armv7/omap5/Makefile b/arch/arm/cpu/armv7/omap5/Makefile index 64c68791f1..e709f14a92 100644 --- a/arch/arm/cpu/armv7/omap5/Makefile +++ b/arch/arm/cpu/armv7/omap5/Makefile @@ -11,3 +11,4 @@ obj-y += sdram.o obj-y += prcm-regs.o obj-y += hw_data.o obj-y += abb.o +obj-$(CONFIG_IODELAY_RECALIBRATION) += dra7xx_iodelay.o diff --git a/arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c b/arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c new file mode 100644 index 0000000000..9fa6e6991f --- /dev/null +++ b/arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c @@ -0,0 +1,238 @@ +/* + * (C) Copyright 2015 + * Texas Instruments Incorporated, <www.ti.com> + * + * Lokesh Vutla <lokeshvutla@ti.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/utils.h> +#include <asm/arch/dra7xx_iodelay.h> +#include <asm/arch/omap.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/clock.h> +#include <asm/arch/mux_dra7xx.h> +#include <asm/omap_common.h> + +static int isolate_io(u32 isolate) +{ + if (isolate) { + clrsetbits_le32((*ctrl)->control_pbias, SDCARD_PWRDNZ, + SDCARD_PWRDNZ); + clrsetbits_le32((*ctrl)->control_pbias, SDCARD_BIAS_PWRDNZ, + SDCARD_BIAS_PWRDNZ); + } + + /* Override control on ISOCLKIN signal to IO pad ring. */ + clrsetbits_le32((*prcm)->prm_io_pmctrl, PMCTRL_ISOCLK_OVERRIDE_MASK, + PMCTRL_ISOCLK_OVERRIDE_CTRL); + if (!wait_on_value(PMCTRL_ISOCLK_STATUS_MASK, PMCTRL_ISOCLK_STATUS_MASK, + (u32 *)(*prcm)->prm_io_pmctrl, LDELAY)) + return ERR_DEISOLATE_IO << isolate; + + /* Isolate/Deisolate IO */ + clrsetbits_le32((*ctrl)->ctrl_core_sma_sw_0, CTRL_ISOLATE_MASK, + isolate << CTRL_ISOLATE_SHIFT); + /* Dummy read to add delay t > 10ns */ + readl((*ctrl)->ctrl_core_sma_sw_0); + + /* Return control on ISOCLKIN to hardware */ + clrsetbits_le32((*prcm)->prm_io_pmctrl, PMCTRL_ISOCLK_OVERRIDE_MASK, + PMCTRL_ISOCLK_NOT_OVERRIDE_CTRL); + if (!wait_on_value(PMCTRL_ISOCLK_STATUS_MASK, + 0 << PMCTRL_ISOCLK_STATUS_SHIFT, + (u32 *)(*prcm)->prm_io_pmctrl, LDELAY)) + return ERR_DEISOLATE_IO << isolate; + + return 0; +} + +static int calibrate_iodelay(u32 base) +{ + u32 reg; + + /* Configure REFCLK period */ + reg = readl(base + CFG_REG_2_OFFSET); + reg &= ~CFG_REG_REFCLK_PERIOD_MASK; + reg |= CFG_REG_REFCLK_PERIOD; + writel(reg, base + CFG_REG_2_OFFSET); + + /* Initiate Calibration */ + clrsetbits_le32(base + CFG_REG_0_OFFSET, CFG_REG_CALIB_STRT_MASK, + CFG_REG_CALIB_STRT << CFG_REG_CALIB_STRT_SHIFT); + if (!wait_on_value(CFG_REG_CALIB_STRT_MASK, CFG_REG_CALIB_END, + (u32 *)(base + CFG_REG_0_OFFSET), LDELAY)) + return ERR_CALIBRATE_IODELAY; + + return 0; +} + +static int update_delay_mechanism(u32 base) +{ + /* Initiate the reload of calibrated values. */ + clrsetbits_le32(base + CFG_REG_0_OFFSET, CFG_REG_ROM_READ_MASK, + CFG_REG_ROM_READ_START); + if (!wait_on_value(CFG_REG_ROM_READ_MASK, CFG_REG_ROM_READ_END, + (u32 *)(base + CFG_REG_0_OFFSET), LDELAY)) + return ERR_UPDATE_DELAY; + + return 0; +} + +static u32 calculate_delay(u32 base, u16 offset, u16 den) +{ + u16 refclk_period, dly_cnt, ref_cnt; + u32 reg, q, r; + + refclk_period = readl(base + CFG_REG_2_OFFSET) & + CFG_REG_REFCLK_PERIOD_MASK; + + reg = readl(base + offset); + dly_cnt = (reg & CFG_REG_DLY_CNT_MASK) >> CFG_REG_DLY_CNT_SHIFT; + ref_cnt = (reg & CFG_REG_REF_CNT_MASK) >> CFG_REG_REF_CNT_SHIFT; + + if (!dly_cnt || !den) + return 0; + + /* + * To avoid overflow and integer truncation, delay value + * is calculated as quotient + remainder. + */ + q = 5 * ((ref_cnt * refclk_period) / (dly_cnt * den)); + r = (10 * ((ref_cnt * refclk_period) % (dly_cnt * den))) / + (2 * dly_cnt * den); + + return q + r; +} + +static u32 get_cfg_reg(u16 a_delay, u16 g_delay, u32 cpde, u32 fpde) +{ + u32 g_delay_coarse, g_delay_fine; + u32 a_delay_coarse, a_delay_fine; + u32 c_elements, f_elements; + u32 total_delay, reg = 0; + + g_delay_coarse = g_delay / 920; + g_delay_fine = ((g_delay % 920) * 10) / 60; + + a_delay_coarse = a_delay / cpde; + a_delay_fine = ((a_delay % cpde) * 10) / fpde; + + c_elements = g_delay_coarse + a_delay_coarse; + f_elements = (g_delay_fine + a_delay_fine) / 10; + + if (f_elements > 22) { + total_delay = c_elements * cpde + f_elements * fpde; + + c_elements = total_delay / cpde; + f_elements = (total_delay % cpde) / fpde; + } + + reg = (c_elements << CFG_X_COARSE_DLY_SHIFT) & CFG_X_COARSE_DLY_MASK; + reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; + reg |= CFG_X_SIGNATURE << CFG_X_SIGNATURE_SHIFT; + reg |= CFG_X_LOCK << CFG_X_LOCK_SHIFT; + + return reg; +} + +static int do_set_iodelay(u32 base, struct iodelay_cfg_entry const *array, + int niodelays) +{ + struct iodelay_cfg_entry *iodelay = (struct iodelay_cfg_entry *)array; + u32 reg, cpde, fpde, i; + + if (!niodelays) + return 0; + + cpde = calculate_delay((*ctrl)->iodelay_config_base, CFG_REG_3_OFFSET, + 88); + if (!cpde) + return ERR_CPDE; + + fpde = calculate_delay((*ctrl)->iodelay_config_base, CFG_REG_4_OFFSET, + 264); + if (!fpde) + return ERR_FPDE; + + for (i = 0; i < niodelays; i++, iodelay++) { + reg = get_cfg_reg(iodelay->a_delay, iodelay->g_delay, cpde, + fpde); + writel(reg, base + iodelay->offset); + } + + return 0; +} + +void __recalibrate_iodelay(struct pad_conf_entry const *pad, int npads, + struct iodelay_cfg_entry const *iodelay, + int niodelays) +{ + int ret = 0; + + /* IO recalibration should be done only from SRAM */ + if (OMAP_INIT_CONTEXT_SPL != omap_hw_init_context()) { + puts("IODELAY recalibration called from invalid context - use only from SPL in SRAM\n"); + return; + } + + /* unlock IODELAY CONFIG registers */ + writel(CFG_IODELAY_UNLOCK_KEY, (*ctrl)->iodelay_config_base + + CFG_REG_8_OFFSET); + + ret = calibrate_iodelay((*ctrl)->iodelay_config_base); + if (ret) + goto err; + + ret = isolate_io(ISOLATE_IO); + if (ret) + goto err; + + ret = update_delay_mechanism((*ctrl)->iodelay_config_base); + if (ret) + goto err; + + /* Configure Mux settings */ + do_set_mux32((*ctrl)->control_padconf_core_base, pad, npads); + + /* Configure Manual IO timing modes */ + ret = do_set_iodelay((*ctrl)->iodelay_config_base, iodelay, niodelays); + if (ret) + goto err; + + ret = isolate_io(DEISOLATE_IO); + +err: + /* lock IODELAY CONFIG registers */ + writel(CFG_IODELAY_LOCK_KEY, (*ctrl)->iodelay_config_base + + CFG_REG_8_OFFSET); + /* + * UART cannot be used during IO recalibration sequence as IOs are in + * isolation. So error handling and debug prints are done after + * complete IO delay recalibration sequence + */ + switch (ret) { + case ERR_CALIBRATE_IODELAY: + puts("IODELAY: IO delay calibration sequence failed\n"); + break; + case ERR_ISOLATE_IO: + puts("IODELAY: Isolation of Device IOs failed\n"); + break; + case ERR_UPDATE_DELAY: + puts("IODELAY: Delay mechanism update with new calibrated values failed\n"); + break; + case ERR_DEISOLATE_IO: + puts("IODELAY: De-isolation of Device IOs failed\n"); + break; + case ERR_CPDE: + puts("IODELAY: CPDE calculation failed\n"); + break; + case ERR_FPDE: + puts("IODELAY: FPDE calculation failed\n"); + break; + default: + debug("IODELAY: IO delay recalibration successfully completed\n"); + } +} diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 868415d038..3a723cace7 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -534,6 +534,9 @@ void enable_basic_clocks(void) void enable_basic_uboot_clocks(void) { u32 const clk_domains_essential[] = { +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) + (*prcm)->cm_ipu_clkstctrl, +#endif 0 }; @@ -547,7 +550,11 @@ void enable_basic_uboot_clocks(void) (*prcm)->cm_l4per_i2c2_clkctrl, (*prcm)->cm_l4per_i2c3_clkctrl, (*prcm)->cm_l4per_i2c4_clkctrl, +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) + (*prcm)->cm_ipu_i2c5_clkctrl, +#else (*prcm)->cm_l4per_i2c5_clkctrl, +#endif (*prcm)->cm_l3init_hsusbhost_clkctrl, (*prcm)->cm_l3init_fsusb_clkctrl, 0 @@ -592,8 +599,8 @@ const struct ctrl_ioregs ioregs_dra7xx_es1 = { .ctrl_ddrch = 0x40404040, .ctrl_lpddr2ch = 0x40404040, .ctrl_ddr3ch = 0x80808080, - .ctrl_ddrio_0 = 0xA2084210, - .ctrl_ddrio_1 = 0x84210840, + .ctrl_ddrio_0 = 0x00094A40, + .ctrl_ddrio_1 = 0x04A52000, .ctrl_ddrio_2 = 0x84210000, .ctrl_emif_sdram_config_ext = 0x0001C1A7, .ctrl_emif_sdram_config_ext_final = 0x0001C1A7, @@ -604,8 +611,8 @@ const struct ctrl_ioregs ioregs_dra72x_es1 = { .ctrl_ddrch = 0x40404040, .ctrl_lpddr2ch = 0x40404040, .ctrl_ddr3ch = 0x60606080, - .ctrl_ddrio_0 = 0xA2084210, - .ctrl_ddrio_1 = 0x84210840, + .ctrl_ddrio_0 = 0x00094A40, + .ctrl_ddrio_1 = 0x04A52000, .ctrl_ddrio_2 = 0x84210000, .ctrl_emif_sdram_config_ext = 0x0001C1A7, .ctrl_emif_sdram_config_ext_final = 0x0001C1A7, diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c index 8d6b59eeb0..39f8d0d5e2 100644 --- a/arch/arm/cpu/armv7/omap5/hwinit.c +++ b/arch/arm/cpu/armv7/omap5/hwinit.c @@ -40,6 +40,15 @@ static struct gpio_bank gpio_bank_54xx[8] = { const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx; +void do_set_mux32(u32 base, struct pad_conf_entry const *array, int size) +{ + int i; + struct pad_conf_entry *pad = (struct pad_conf_entry *)array; + + for (i = 0; i < size; i++, pad++) + writel(pad->val, base + pad->offset); +} + #ifdef CONFIG_SPL_BUILD /* LPDDR2 specific IO settings */ static void io_settings_lpddr2(void) @@ -75,16 +84,20 @@ static void io_settings_ddr3(void) writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); writel(ioregs->ctrl_ddrio_1, (*ctrl)->control_ddrio_1); - writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2); + + if (!is_dra7xx()) { + writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2); + writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1); + } /* omap5432 does not use lpddr2 */ writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0); - writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1); writel(ioregs->ctrl_emif_sdram_config_ext, (*ctrl)->control_emif1_sdram_config_ext); - writel(ioregs->ctrl_emif_sdram_config_ext, - (*ctrl)->control_emif2_sdram_config_ext); + if (!is_dra72x()) + writel(ioregs->ctrl_emif_sdram_config_ext, + (*ctrl)->control_emif2_sdram_config_ext); if (is_omap54xx()) { /* Disable DLL select */ @@ -109,6 +122,7 @@ static void io_settings_ddr3(void) void do_io_settings(void) { u32 io_settings = 0, mask = 0; + struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE; /* Impedance settings EMMC, C2C 1,2, hsi2 */ mask = (ds_mask << 2) | (ds_mask << 8) | @@ -164,7 +178,7 @@ void do_io_settings(void) (sc_fast << 17) | (sc_fast << 14); writel(io_settings, (*ctrl)->control_smart3io_padconf_1); - if (emif_sdram_type() == EMIF_SDRAM_TYPE_LPDDR2) + if (emif_sdram_type(emif->emif_sdram_config) == EMIF_SDRAM_TYPE_LPDDR2) io_settings_lpddr2(); else io_settings_ddr3(); diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c index f80d36dc3c..cd51fe7678 100644 --- a/arch/arm/cpu/armv7/omap5/prcm-regs.c +++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c @@ -378,6 +378,7 @@ struct omap_sys_ctrl_regs const dra7xx_ctrl = { .control_status = 0x4A002134, .control_phy_power_usb = 0x4A002370, .control_phy_power_sata = 0x4A002374, + .ctrl_core_sma_sw_0 = 0x4A0023FC, .control_core_mac_id_0_lo = 0x4A002514, .control_core_mac_id_0_hi = 0x4A002518, .control_core_mac_id_1_lo = 0x4A00251C, @@ -457,6 +458,7 @@ struct omap_sys_ctrl_regs const dra7xx_ctrl = { .control_efuse_3 = 0x4AE0C5D0, .control_efuse_4 = 0x4AE0C5D4, .control_efuse_13 = 0x4AE0C5F0, + .iodelay_config_base = 0x4844A000, }; struct prcm_regs const omap5_es2_prcm = { @@ -815,6 +817,10 @@ struct prcm_regs const dra7xx_prcm = { .cm_dsp_clkstctrl = 0x4a005400, .cm_dsp_dsp_clkctrl = 0x4a005420, + /* cm IPU */ + .cm_ipu_clkstctrl = 0x4a005540, + .cm_ipu_i2c5_clkctrl = 0x4a005578, + /* prm irqstatus regs */ .prm_irqstatus_mpu_2 = 0x4ae06014, @@ -976,6 +982,7 @@ struct prcm_regs const dra7xx_prcm = { .prm_rstctrl = 0x4ae07d00, .prm_rstst = 0x4ae07d04, .prm_rsttime = 0x4ae07d08, + .prm_io_pmctrl = 0x4ae07d20, .prm_vc_val_bypass = 0x4ae07da0, .prm_vc_cfg_i2c_mode = 0x4ae07db4, .prm_vc_cfg_i2c_clk = 0x4ae07db8, diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c index 5f8daa1ee1..cf4452d260 100644 --- a/arch/arm/cpu/armv7/omap5/sdram.c +++ b/arch/arm/cpu/armv7/omap5/sdram.c @@ -146,18 +146,18 @@ const struct emif_regs emif_1_regs_ddr3_532_mhz_1cs_dra_es1 = { .sdram_tim1 = 0xCCCF36B3, .sdram_tim2 = 0x308F7FDA, .sdram_tim3 = 0x027F88A8, - .read_idle_ctrl = 0x00050001, + .read_idle_ctrl = 0x00050000, .zq_config = 0x0007190B, .temp_alert_config = 0x00000000, - .emif_ddr_phy_ctlr_1_init = 0x0E24400A, - .emif_ddr_phy_ctlr_1 = 0x0E24400A, + .emif_ddr_phy_ctlr_1_init = 0x0024400B, + .emif_ddr_phy_ctlr_1 = 0x0E24400B, .emif_ddr_ext_phy_ctrl_1 = 0x10040100, .emif_ddr_ext_phy_ctrl_2 = 0x00910091, .emif_ddr_ext_phy_ctrl_3 = 0x00950095, .emif_ddr_ext_phy_ctrl_4 = 0x009B009B, .emif_ddr_ext_phy_ctrl_5 = 0x009E009E, .emif_rd_wr_lvl_rmp_win = 0x00000000, - .emif_rd_wr_lvl_rmp_ctl = 0x00000000, + .emif_rd_wr_lvl_rmp_ctl = 0x80000000, .emif_rd_wr_lvl_ctl = 0x00000000, .emif_rd_wr_exec_thresh = 0x00000305 }; @@ -171,18 +171,18 @@ const struct emif_regs emif_2_regs_ddr3_532_mhz_1cs_dra_es1 = { .sdram_tim1 = 0xCCCF36B3, .sdram_tim2 = 0x308F7FDA, .sdram_tim3 = 0x027F88A8, - .read_idle_ctrl = 0x00050001, + .read_idle_ctrl = 0x00050000, .zq_config = 0x0007190B, .temp_alert_config = 0x00000000, - .emif_ddr_phy_ctlr_1_init = 0x0E24400A, - .emif_ddr_phy_ctlr_1 = 0x0E24400A, + .emif_ddr_phy_ctlr_1_init = 0x0024400B, + .emif_ddr_phy_ctlr_1 = 0x0E24400B, .emif_ddr_ext_phy_ctrl_1 = 0x10040100, .emif_ddr_ext_phy_ctrl_2 = 0x00910091, .emif_ddr_ext_phy_ctrl_3 = 0x00950095, .emif_ddr_ext_phy_ctrl_4 = 0x009B009B, .emif_ddr_ext_phy_ctrl_5 = 0x009E009E, .emif_rd_wr_lvl_rmp_win = 0x00000000, - .emif_rd_wr_lvl_rmp_ctl = 0x00000000, + .emif_rd_wr_lvl_rmp_ctl = 0x80000000, .emif_rd_wr_lvl_ctl = 0x00000000, .emif_rd_wr_exec_thresh = 0x00000305 }; @@ -191,15 +191,15 @@ const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra_es1 = { .sdram_config_init = 0x61862B32, .sdram_config = 0x61862B32, .sdram_config2 = 0x08000000, - .ref_ctrl = 0x0000493E, + .ref_ctrl = 0x0000514C, .ref_ctrl_final = 0x0000144A, .sdram_tim1 = 0xD113781C, - .sdram_tim2 = 0x308F7FE3, - .sdram_tim3 = 0x009F86A8, + .sdram_tim2 = 0x305A7FDA, + .sdram_tim3 = 0x409F86A8, .read_idle_ctrl = 0x00050000, - .zq_config = 0x0007190B, + .zq_config = 0x5007190B, .temp_alert_config = 0x00000000, - .emif_ddr_phy_ctlr_1_init = 0x0E24400D, + .emif_ddr_phy_ctlr_1_init = 0x0024400D, .emif_ddr_phy_ctlr_1 = 0x0E24400D, .emif_ddr_ext_phy_ctrl_1 = 0x10040100, .emif_ddr_ext_phy_ctrl_2 = 0x00A400A4, @@ -207,7 +207,7 @@ const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra_es1 = { .emif_ddr_ext_phy_ctrl_4 = 0x00B000B0, .emif_ddr_ext_phy_ctrl_5 = 0x00B000B0, .emif_rd_wr_lvl_rmp_win = 0x00000000, - .emif_rd_wr_lvl_rmp_ctl = 0x00000000, + .emif_rd_wr_lvl_rmp_ctl = 0x80000000, .emif_rd_wr_lvl_ctl = 0x00000000, .emif_rd_wr_exec_thresh = 0x00000305 }; @@ -421,8 +421,14 @@ const u32 ddr3_ext_phy_ctrl_const_base_es2[] = { 0x0 }; +/* Ext phy ctrl 1-35 regs */ const u32 dra_ddr3_ext_phy_ctrl_const_base_es1_emif1[] = { + 0x10040100, + 0x00910091, + 0x00950095, + 0x009B009B, + 0x009E009E, 0x00980098, 0x00340034, 0x00350035, @@ -441,17 +447,28 @@ dra_ddr3_ext_phy_ctrl_const_base_es1_emif1[] = { 0x00500050, 0x00000000, 0x00600020, - 0x40010080, + 0x40011080, 0x08102040, 0x0, 0x0, 0x0, 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, 0x0 }; +/* Ext phy ctrl 1-35 regs */ const u32 dra_ddr3_ext_phy_ctrl_const_base_es1_emif2[] = { + 0x10040100, + 0x00910091, + 0x00950095, + 0x009B009B, + 0x009E009E, 0x00980098, 0x00330033, 0x00330033, @@ -470,17 +487,28 @@ dra_ddr3_ext_phy_ctrl_const_base_es1_emif2[] = { 0x00500050, 0x00000000, 0x00600020, - 0x40010080, + 0x40011080, 0x08102040, 0x0, 0x0, 0x0, 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, 0x0 }; +/* Ext phy ctrl 1-35 regs */ const u32 dra_ddr3_ext_phy_ctrl_const_base_666MHz[] = { + 0x10040100, + 0x00A400A4, + 0x00A900A9, + 0x00B000B0, + 0x00B000B0, 0x00A400A4, 0x00390039, 0x00320032, @@ -505,6 +533,11 @@ dra_ddr3_ext_phy_ctrl_const_base_666MHz[] = { 0x0, 0x0, 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, 0x0 }; @@ -562,7 +595,7 @@ void get_lpddr2_mr_regs(const struct lpddr2_mr_regs **regs) *regs = &mr_regs; } -void do_ext_phy_settings(u32 base, const struct emif_regs *regs) +static void do_ext_phy_settings_omap5(u32 base, const struct emif_regs *regs) { u32 *ext_phy_ctrl_base = 0; u32 *emif_ext_phy_ctrl_base = 0; @@ -601,6 +634,58 @@ void do_ext_phy_settings(u32 base, const struct emif_regs *regs) } } +static void do_ext_phy_settings_dra7(u32 base, const struct emif_regs *regs) +{ + struct emif_reg_struct *emif = (struct emif_reg_struct *)base; + u32 *emif_ext_phy_ctrl_base = 0; + u32 emif_nr; + const u32 *ext_phy_ctrl_const_regs; + u32 i, hw_leveling, size; + + emif_nr = (base == EMIF1_BASE) ? 1 : 2; + + hw_leveling = regs->emif_rd_wr_lvl_rmp_ctl >> EMIF_REG_RDWRLVL_EN_SHIFT; + + emif_ext_phy_ctrl_base = (u32 *)&(emif->emif_ddr_ext_phy_ctrl_1); + + emif_get_ext_phy_ctrl_const_regs(emif_nr, + &ext_phy_ctrl_const_regs, &size); + + writel(ext_phy_ctrl_const_regs[0], &emif_ext_phy_ctrl_base[0]); + writel(ext_phy_ctrl_const_regs[0], &emif_ext_phy_ctrl_base[1]); + + if (!hw_leveling) { + /* + * Copy the predefined PHY register values + * in case of sw leveling + */ + for (i = 1; i < 25; i++) { + writel(ext_phy_ctrl_const_regs[i], + &emif_ext_phy_ctrl_base[i * 2]); + writel(ext_phy_ctrl_const_regs[i], + &emif_ext_phy_ctrl_base[i * 2 + 1]); + } + } else { + /* + * Write the init value for HW levling to occur + */ + for (i = 21; i < 35; i++) { + writel(ext_phy_ctrl_const_regs[i], + &emif_ext_phy_ctrl_base[i * 2]); + writel(ext_phy_ctrl_const_regs[i], + &emif_ext_phy_ctrl_base[i * 2 + 1]); + } + } +} + +void do_ext_phy_settings(u32 base, const struct emif_regs *regs) +{ + if (is_omap54xx()) + do_ext_phy_settings_omap5(base, regs); + else + do_ext_phy_settings_dra7(base, regs); +} + #ifndef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS static const struct lpddr2_ac_timings timings_jedec_532_mhz = { .max_freq = 532000000, diff --git a/arch/arm/cpu/armv7/s5pc1xx/Kconfig b/arch/arm/cpu/armv7/s5pc1xx/Kconfig index 04acdaad79..792ef595e4 100644 --- a/arch/arm/cpu/armv7/s5pc1xx/Kconfig +++ b/arch/arm/cpu/armv7/s5pc1xx/Kconfig @@ -7,10 +7,12 @@ choice config TARGET_S5P_GONI bool "S5P Goni board" select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_SMDKC100 bool "Support smdkc100 board" select OF_CONTROL + select SPL_DISABLE_OF_CONTROL endchoice diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index a82c8b9d44..03443629bc 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -119,20 +119,11 @@ void s_init(void) #ifdef CONFIG_SPL_BUILD /* The sunxi internal brom will try to loader external bootloader * from mmc0, nand flash, mmc2. - * - * Unfortunately we can't check how SPL was loaded so assume it's - * always the first SD/MMC controller, unless it was explicitly - * stated that SPL is on nand flash. + * Unfortunately we can't check how SPL was loaded so assume + * it's always the first SD/MMC controller */ u32 spl_boot_device(void) { -#if defined(CONFIG_SPL_NAND_SUPPORT) - /* - * This is compile time configuration informing SPL, that it - * was loaded from nand flash. - */ - return BOOT_DEVICE_NAND; -#else /* * When booting from the SD card, the "eGON.BT0" signature is expected * to be found in memory at the address 0x0004 (see the "mksunxiboot" @@ -153,7 +144,6 @@ u32 spl_boot_device(void) return BOOT_DEVICE_MMC1; else return BOOT_DEVICE_BOARD; -#endif } /* No confirmation data available in SPL yet. Hardcode bootmode */ @@ -202,6 +192,7 @@ void reset_cpu(ulong addr) writel(WDT_CFG_RESET, &wdog->cfg); writel(WDT_MODE_EN, &wdog->mode); writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl); + while (1) { } #endif } @@ -223,6 +214,7 @@ int cpu_eth_init(bd_t *bis) __maybe_unused int rc; #ifdef CONFIG_MACPWR + gpio_request(CONFIG_MACPWR, "macpwr"); gpio_direction_output(CONFIG_MACPWR, 1); mdelay(200); #endif diff --git a/arch/arm/cpu/armv7/sunxi/usb_phy.c b/arch/arm/cpu/armv7/sunxi/usb_phy.c index 410669e548..b07d67ff3f 100644 --- a/arch/arm/cpu/armv7/sunxi/usb_phy.c +++ b/arch/arm/cpu/armv7/sunxi/usb_phy.c @@ -128,10 +128,10 @@ static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy) usb_phy_write(phy, 0x20, 0x14, 5); /* threshold adjustment disconnect */ -#if defined CONFIG_MACH_SUN4I || defined CONFIG_MACH_SUN6I - usb_phy_write(phy, 0x2a, 3, 2); -#else +#if defined CONFIG_MACH_SUN5I || defined CONFIG_MACH_SUN7I usb_phy_write(phy, 0x2a, 2, 2); +#else + usb_phy_write(phy, 0x2a, 3, 2); #endif return; diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index 1bb9b8ed1d..05c401dc73 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -198,6 +198,11 @@ static u32 get_i2c_clk(void) return get_ipg_clk(); } +static u32 get_dspi_clk(void) +{ + return get_ipg_clk(); +} + unsigned int mxc_get_clock(enum mxc_clock clk) { switch (clk) { @@ -215,6 +220,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return get_fec_clk(); case MXC_I2C_CLK: return get_i2c_clk(); + case MXC_DSPI_CLK: + return get_dspi_clk(); default: break; } diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 267fd17906..9c735c672a 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -95,6 +95,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \ sun6i-a31-hummingbird.dtb \ sun6i-a31-i7.dtb \ sun6i-a31-m9.dtb \ + sun6i-a31-mele-a1000g-quad.dtb \ sun6i-a31-mixtile-loftq.dtb \ sun6i-a31s-cs908.dtb \ sun6i-a31s-primo81.dtb @@ -121,18 +122,24 @@ dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-wits-pro-a20-dkt.dtb \ sun7i-a20-yones-toptech-bd1078.dtb dtb-$(CONFIG_MACH_SUN8I_A23) += \ + sun8i-a23-evb.dtb \ sun8i-a23-ippo-q8h-v5.dtb \ sun8i-a23-ippo-q8h-v1.2.dtb dtb-$(CONFIG_MACH_SUN8I_A33) += \ - sun8i-a33-astar-mid756.dtb \ + sun8i-a33-et-q8-v1.6.dtb \ + sun8i-a33-ga10h-v1.1.dtb \ sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dtb dtb-$(CONFIG_MACH_SUN9I) += \ sun9i-a80-optimus.dtb \ sun9i-a80-cubieboard4.dtb +dtb-$(CONFIG_VF610) += vf500-colibri.dtb \ + vf610-colibri.dtb + targets += $(dtb-y) -DTC_FLAGS += -R 4 -p 0x1000 +# Add any required device tree compiler flags here +DTC_FLAGS += PHONY += dtbs dtbs: $(addprefix $(obj)/, $(dtb-y)) diff --git a/arch/arm/dts/exynos4412-odroid.dts b/arch/arm/dts/exynos4412-odroid.dts index 415dfeab6a..d572f1e72b 100644 --- a/arch/arm/dts/exynos4412-odroid.dts +++ b/arch/arm/dts/exynos4412-odroid.dts @@ -43,140 +43,102 @@ voltage-regulators { ldo1_reg: ldo1 { - regulator-compatible = "LDO1"; regulator-name = "VDD_ALIVE_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; }; ldo2_reg: ldo2 { - regulator-compatible = "LDO2"; regulator-name = "VDDQ_VM1M2_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; ldo3_reg: ldo3 { - regulator-compatible = "LDO3"; regulator-name = "VCC_1.8V_AP"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo4_reg: ldo4 { - regulator-compatible = "LDO4"; regulator-name = "VDDQ_MMC2_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; }; ldo5_reg: ldo5 { - regulator-compatible = "LDO5"; regulator-name = "VDDQ_MMC0/1/3_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo6_reg: ldo6 { - regulator-compatible = "LDO6"; regulator-name = "VMPLL_1.0V"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; }; ldo7_reg: ldo7 { - regulator-compatible = "LDO7"; regulator-name = "VPLL_1.1V"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; }; ldo8_reg: ldo8 { - regulator-compatible = "LDO8"; regulator-name = "VDD_MIPI/HDMI_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; }; - ldo9_reg: ldo9 { - regulator-compatible = "LDO9"; - regulator-name = "nc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - ldo10_reg: ldo10 { - regulator-compatible = "LDO10"; regulator-name = "VDD_MIPI/HDMI_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo11_reg: ldo11 { - regulator-compatible = "LDO11"; regulator-name = "VDD_ABB1_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo12_reg: ldo12 { - regulator-compatible = "LDO12"; regulator-name = "VDD_UOTG_3.0V"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; }; ldo13_reg: ldo13 { - regulator-compatible = "LDO13"; regulator-name = "VDD_C2C_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo14_reg: ldo14 { - regulator-compatible = "LDO14"; regulator-name = "VDD_ABB02_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo15_reg: ldo15 { - regulator-compatible = "LDO15"; regulator-name = "VDD_HSIC/OTG_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; }; ldo16_reg: ldo16 { - regulator-compatible = "LDO16"; regulator-name = "VDD_HSIC_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo17_reg: ldo17 { - regulator-compatible = "LDO17"; regulator-name = "VDDQ_CAM_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - ldo18_reg: ldo18 { - regulator-compatible = "LDO18"; - regulator-name = "nc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - ldo19_reg: ldo19 { - regulator-compatible = "LDO19"; - regulator-name = "nc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - ldo20_reg: ldo20 { - regulator-compatible = "LDO20"; regulator-name = "VDDQ_EMMC_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -185,7 +147,6 @@ }; ldo21_reg: ldo21 { - regulator-compatible = "LDO21"; regulator-name = "TFLASH_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; @@ -194,7 +155,6 @@ }; ldo22_reg: ldo22 { - regulator-compatible = "LDO22"; regulator-name = "VDDQ_EMMC_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; @@ -202,20 +162,6 @@ regulator-boot-on; }; - ldo23_reg: ldo23 { - regulator-compatible = "LDO23"; - regulator-name = "nc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - ldo24_reg: ldo24 { - regulator-compatible = "LDO24"; - regulator-name = "nc"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - ldo25_reg: ldo25 { regulator-compatible = "LDO25"; regulator-name = "VDDQ_LCD_3.0V"; @@ -223,75 +169,53 @@ regulator-max-microvolt = <3000000>; }; - ldo26_reg: ldo26 { - regulator-compatible = "LDO26"; - regulator-name = "nc"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - - buck1_reg: buck@1 { - regulator-compatible = "BUCK1"; + buck1_reg: buck1 { regulator-name = "VDD_MIF_1.0V"; regulator-min-microvolt = <8500000>; regulator-max-microvolt = <1100000>; }; - buck2_reg: buck@2 { - regulator-compatible = "BUCK2"; + buck2_reg: buck2 { regulator-name = "VDD_ARM_1.0V"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1500000>; }; buck3_reg: buck3 { - regulator-compatible = "BUCK3"; regulator-name = "VDD_INT_1.1V"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1150000>; }; buck4_reg: buck4 { - regulator-compatible = "BUCK4"; regulator-name = "VDD_G3D_1.0V"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1150000>; }; buck5_reg: buck5 { - regulator-compatible = "BUCK5"; regulator-name = "VDDQ_AP_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; buck6_reg: buck6 { - regulator-compatible = "BUCK6"; regulator-name = "VCC_INL1/7_1.35V"; regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; }; buck7_reg: buck7 { - regulator-compatible = "BUCK7"; regulator-name = "VCC_INL2/3/5_2.0V"; regulator-min-microvolt = <2000000>; regulator-max-microvolt = <2000000>; }; buck8_reg: buck8 { - regulator-compatible = "BUCK8"; regulator-name = "VCC_P3V3_2.85V"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <3300000>; }; - - buck9_reg: buck9 { - regulator-compatible = "BUCK9"; - regulator-name = "nc"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; }; }; }; diff --git a/arch/arm/dts/ls1021a-qds.dts b/arch/arm/dts/ls1021a-qds.dts index 836781153d..e634292359 100644 --- a/arch/arm/dts/ls1021a-qds.dts +++ b/arch/arm/dts/ls1021a-qds.dts @@ -30,7 +30,7 @@ dspiflash: at45db021d@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "spi-flash"; + compatible = "atmel,dataflash"; spi-max-frequency = <16000000>; spi-cpol; spi-cpha; diff --git a/arch/arm/dts/sun4i-a10-a1000.dts b/arch/arm/dts/sun4i-a10-a1000.dts index f03281434e..2630d78d9e 100644 --- a/arch/arm/dts/sun4i-a10-a1000.dts +++ b/arch/arm/dts/sun4i-a10-a1000.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -113,6 +108,10 @@ status = "okay"; }; +&emac_sram { + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; @@ -130,7 +129,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun4i-a10-ba10-tvbox.dts b/arch/arm/dts/sun4i-a10-ba10-tvbox.dts index 1a3c7ddc53..93d435670e 100644 --- a/arch/arm/dts/sun4i-a10-ba10-tvbox.dts +++ b/arch/arm/dts/sun4i-a10-ba10-tvbox.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -79,6 +74,10 @@ status = "okay"; }; +&emac_sram { + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; @@ -96,7 +95,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts b/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts index 35fb163827..5878a0b11f 100644 --- a/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts +++ b/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun4i-a10-cubieboard.dts b/arch/arm/dts/sun4i-a10-cubieboard.dts index 0ba67d79c2..9afb4e0185 100644 --- a/arch/arm/dts/sun4i-a10-cubieboard.dts +++ b/arch/arm/dts/sun4i-a10-cubieboard.dts @@ -17,11 +17,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -107,6 +102,10 @@ status = "okay"; }; +&emac_sram { + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; @@ -126,7 +125,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; @@ -206,7 +205,8 @@ &spi0 { pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins_a>; + pinctrl-0 = <&spi0_pins_a>, + <&spi0_cs0_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun4i-a10-gemei-g9.dts b/arch/arm/dts/sun4i-a10-gemei-g9.dts index fbd638a380..570754d8df 100644 --- a/arch/arm/dts/sun4i-a10-gemei-g9.dts +++ b/arch/arm/dts/sun4i-a10-gemei-g9.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun4i-a10-hackberry.dts b/arch/arm/dts/sun4i-a10-hackberry.dts index f4437883fb..2b17c51991 100644 --- a/arch/arm/dts/sun4i-a10-hackberry.dts +++ b/arch/arm/dts/sun4i-a10-hackberry.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -91,9 +86,13 @@ status = "okay"; }; +&emac_sram { + status = "okay"; +}; + &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts b/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts index 9f06b18050..43f58fbe16 100644 --- a/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts +++ b/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun4i-a10-inet97fv2.dts b/arch/arm/dts/sun4i-a10-inet97fv2.dts index e19ef52f35..6c927a824b 100644 --- a/arch/arm/dts/sun4i-a10-inet97fv2.dts +++ b/arch/arm/dts/sun4i-a10-inet97fv2.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun4i-a10-jesurun-q5.dts b/arch/arm/dts/sun4i-a10-jesurun-q5.dts index 1b0452fea2..dc2f2aeaff 100644 --- a/arch/arm/dts/sun4i-a10-jesurun-q5.dts +++ b/arch/arm/dts/sun4i-a10-jesurun-q5.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -109,6 +104,10 @@ status = "okay"; }; +&emac_sram { + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; @@ -126,7 +125,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun4i-a10-marsboard.dts b/arch/arm/dts/sun4i-a10-marsboard.dts index 00c54d2a18..02158bcd64 100644 --- a/arch/arm/dts/sun4i-a10-marsboard.dts +++ b/arch/arm/dts/sun4i-a10-marsboard.dts @@ -17,11 +17,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -104,6 +99,10 @@ status = "okay"; }; +&emac_sram { + status = "okay"; +}; + &emac { pinctrl-names = "default"; pinctrl-0 = <&emac_pins_a>; @@ -174,7 +173,8 @@ &spi0 { pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins_a>; + pinctrl-0 = <&spi0_pins_a>, + <&spi0_cs0_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun4i-a10-mini-xplus.dts b/arch/arm/dts/sun4i-a10-mini-xplus.dts index 0f24914c1a..ebe2a04ef6 100644 --- a/arch/arm/dts/sun4i-a10-mini-xplus.dts +++ b/arch/arm/dts/sun4i-a10-mini-xplus.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -92,11 +87,11 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; -&ir0_pins_a { +&ir0_rx_pins_a { /* The ir receiver is not always populated */ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; diff --git a/arch/arm/dts/sun4i-a10-mk802.dts b/arch/arm/dts/sun4i-a10-mk802.dts index 0f1c99133c..3c7eebe170 100644 --- a/arch/arm/dts/sun4i-a10-mk802.dts +++ b/arch/arm/dts/sun4i-a10-mk802.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun4i-a10-mk802ii.dts b/arch/arm/dts/sun4i-a10-mk802ii.dts index f97aa6f523..c861fa7e35 100644 --- a/arch/arm/dts/sun4i-a10-mk802ii.dts +++ b/arch/arm/dts/sun4i-a10-mk802ii.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/dts/sun4i-a10-olinuxino-lime.dts index 5840d5e16b..b64aa4eb07 100644 --- a/arch/arm/dts/sun4i-a10-olinuxino-lime.dts +++ b/arch/arm/dts/sun4i-a10-olinuxino-lime.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -110,6 +105,10 @@ status = "okay"; }; +&emac_sram { + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; diff --git a/arch/arm/dts/sun4i-a10-pcduino.dts b/arch/arm/dts/sun4i-a10-pcduino.dts index be6948e416..4e3e1b9d82 100644 --- a/arch/arm/dts/sun4i-a10-pcduino.dts +++ b/arch/arm/dts/sun4i-a10-pcduino.dts @@ -17,11 +17,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -124,6 +119,10 @@ status = "okay"; }; +&emac_sram { + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; diff --git a/arch/arm/dts/sun4i-a10.dtsi b/arch/arm/dts/sun4i-a10.dtsi index 1d7fd68bea..61c03d1fe5 100644 --- a/arch/arm/dts/sun4i-a10.dtsi +++ b/arch/arm/dts/sun4i-a10.dtsi @@ -17,11 +17,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this library; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -66,7 +61,8 @@ ranges; framebuffer@0 { - compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-hdmi"; clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, <&ahb_gates 44>; @@ -74,7 +70,8 @@ }; framebuffer@1 { - compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi"; clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, <&ahb_gates 44>, <&ahb_gates 46>; @@ -110,11 +107,11 @@ clocks = <&cpu>; clock-latency = <244144>; /* 8 32k periods */ operating-points = < - /* kHz uV */ + /* kHz uV */ 1008000 1400000 - 912000 1350000 - 864000 1300000 - 624000 1250000 + 912000 1350000 + 864000 1300000 + 624000 1250000 >; #cooling-cells = <2>; cooling-min-level = <0>; @@ -434,11 +431,12 @@ usb_clk: clk@01c200cc { #clock-cells = <1>; - #reset-cells = <1>; + #reset-cells = <1>; compatible = "allwinner,sun4i-a10-usb-clk"; reg = <0x01c200cc 0x4>; clocks = <&pll6 1>; - clock-output-names = "usb_ohci0", "usb_ohci1", "usb_phy"; + clock-output-names = "usb_ohci0", "usb_ohci1", + "usb_phy"; }; spi3_clk: clk@01c200d4 { @@ -450,44 +448,46 @@ }; }; - /* - * Note we use the address where the mmio registers start, not where - * the SRAM blocks start, this cannot be changed because that would be - * a devicetree ABI change. - */ soc@01c00000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - sram@00000000 { - compatible = "allwinner,sun4i-a10-sram"; - reg = <0x00000000 0x4000>; - allwinner,sram-name = "A1"; - }; - - sram@00004000 { - compatible = "allwinner,sun4i-a10-sram"; - reg = <0x00004000 0x4000>; - allwinner,sram-name = "A2"; - }; - - sram@00008000 { - compatible = "allwinner,sun4i-a10-sram"; - reg = <0x00008000 0x4000>; - allwinner,sram-name = "A3-A4"; - }; - - sram@00010000 { - compatible = "allwinner,sun4i-a10-sram"; - reg = <0x00010000 0x1000>; - allwinner,sram-name = "D"; - }; - sram-controller@01c00000 { compatible = "allwinner,sun4i-a10-sram-controller"; reg = <0x01c00000 0x30>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sram_a: sram@00000000 { + compatible = "mmio-sram"; + reg = <0x00000000 0xc000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00000000 0xc000>; + + emac_sram: sram-section@8000 { + compatible = "allwinner,sun4i-a10-sram-a3-a4"; + reg = <0x8000 0x4000>; + status = "disabled"; + }; + }; + + sram_d: sram@00010000 { + compatible = "mmio-sram"; + reg = <0x00010000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00010000 0x1000>; + + otg_sram: sram-section@0000 { + compatible = "allwinner,sun4i-a10-sram-d"; + reg = <0x0000 0x1000>; + status = "disabled"; + }; + }; }; dma: dma-controller@01c02000 { @@ -531,6 +531,7 @@ reg = <0x01c0b000 0x1000>; interrupts = <55>; clocks = <&ahb_gates 17>; + allwinner,sram = <&emac_sram 1>; status = "disabled"; }; @@ -784,7 +785,8 @@ }; mmc0_pins_a: mmc0@0 { - allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; + allwinner,pins = "PF0", "PF1", "PF2", + "PF3", "PF4", "PF5"; allwinner,function = "mmc0"; allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; @@ -797,43 +799,85 @@ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; - ir0_pins_a: ir0@0 { - allwinner,pins = "PB3","PB4"; + ir0_rx_pins_a: ir0@0 { + allwinner,pins = "PB4"; allwinner,function = "ir0"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ir1_pins_a: ir1@0 { - allwinner,pins = "PB22","PB23"; + ir0_tx_pins_a: ir0@1 { + allwinner,pins = "PB3"; + allwinner,function = "ir0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + ir1_rx_pins_a: ir1@0 { + allwinner,pins = "PB23"; + allwinner,function = "ir1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + ir1_tx_pins_a: ir1@1 { + allwinner,pins = "PB22"; allwinner,function = "ir1"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; spi0_pins_a: spi0@0 { - allwinner,pins = "PI10", "PI11", "PI12", "PI13"; + allwinner,pins = "PI11", "PI12", "PI13"; + allwinner,function = "spi0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi0_cs0_pins_a: spi0_cs0@0 { + allwinner,pins = "PI10"; allwinner,function = "spi0"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; spi1_pins_a: spi1@0 { - allwinner,pins = "PI16", "PI17", "PI18", "PI19"; + allwinner,pins = "PI17", "PI18", "PI19"; + allwinner,function = "spi1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi1_cs0_pins_a: spi1_cs0@0 { + allwinner,pins = "PI16"; allwinner,function = "spi1"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; spi2_pins_a: spi2@0 { - allwinner,pins = "PB14", "PB15", "PB16", "PB17"; + allwinner,pins = "PC20", "PC21", "PC22"; allwinner,function = "spi2"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; spi2_pins_b: spi2@1 { - allwinner,pins = "PC19", "PC20", "PC21", "PC22"; + allwinner,pins = "PB15", "PB16", "PB17"; + allwinner,function = "spi2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi2_cs0_pins_a: spi2_cs0@0 { + allwinner,pins = "PC19"; + allwinner,function = "spi2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi2_cs0_pins_b: spi2_cs0@1 { + allwinner,pins = "PB14"; allwinner,function = "spi2"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; diff --git a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts index ceb0582ac9..2b3511ea2e 100644 --- a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts +++ b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun5i-a10s-mk802.dts b/arch/arm/dts/sun5i-a10s-mk802.dts index e1a11e1d96..46ff940782 100644 --- a/arch/arm/dts/sun5i-a10s-mk802.dts +++ b/arch/arm/dts/sun5i-a10s-mk802.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts index 85a8745fff..a7e19e4847 100644 --- a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts +++ b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -93,6 +88,10 @@ status = "okay"; }; +&emac_sram { + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; diff --git a/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts index 9980969d09..3b057983c7 100644 --- a/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts +++ b/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun5i-a10s.dtsi b/arch/arm/dts/sun5i-a10s.dtsi index a78c95dfb3..f11efb722b 100644 --- a/arch/arm/dts/sun5i-a10s.dtsi +++ b/arch/arm/dts/sun5i-a10s.dtsi @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this library; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -67,7 +62,8 @@ ranges; framebuffer@0 { - compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-hdmi"; clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, <&ahb_gates 44>; @@ -89,13 +85,17 @@ compatible = "allwinner,sun5i-a10s-ahb-gates-clk"; reg = <0x01c20060 0x8>; clocks = <&ahb>; - clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci", - "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", - "ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram", - "ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1", - "ahb_spi2", "ahb_gps", "ahb_stimer", "ahb_ve", - "ahb_tve", "ahb_lcd", "ahb_csi", "ahb_hdmi", - "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400"; + clock-output-names = "ahb_usbotg", "ahb_ehci", + "ahb_ohci", "ahb_ss", "ahb_dma", + "ahb_bist", "ahb_mmc0", "ahb_mmc1", + "ahb_mmc2", "ahb_nand", + "ahb_sdram", "ahb_emac", "ahb_ts", + "ahb_spi0", "ahb_spi1", "ahb_spi2", + "ahb_gps", "ahb_stimer", "ahb_ve", + "ahb_tve", "ahb_lcd", "ahb_csi", + "ahb_hdmi", "ahb_de_be", + "ahb_de_fe", "ahb_iep", + "ahb_mali400"; }; apb0_gates: clk@01c20068 { @@ -103,8 +103,9 @@ compatible = "allwinner,sun5i-a10s-apb0-gates-clk"; reg = <0x01c20068 0x4>; clocks = <&apb0>; - clock-output-names = "apb0_codec", "apb0_iis", "apb0_pio", - "apb0_ir", "apb0_keypad"; + clock-output-names = "apb0_codec", "apb0_iis", + "apb0_pio", "apb0_ir", + "apb0_keypad"; }; apb1_gates: clk@01c2006c { @@ -124,6 +125,7 @@ reg = <0x01c0b000 0x1000>; interrupts = <55>; clocks = <&ahb_gates 17>; + allwinner,sram = <&emac_sram 1>; status = "disabled"; }; @@ -193,9 +195,18 @@ }; mmc1_pins_a: mmc1@0 { - allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8"; + allwinner,pins = "PG3", "PG4", "PG5", + "PG6", "PG7", "PG8"; allwinner,function = "mmc1"; allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; }; + +&sram_a { + emac_sram: sram-section@8000 { + compatible = "allwinner,sun4i-a10-sram-a3-a4"; + reg = <0x8000 0x4000>; + status = "disabled"; + }; +}; diff --git a/arch/arm/dts/sun5i-a13-hsg-h702.dts b/arch/arm/dts/sun5i-a13-hsg-h702.dts index adf78a234f..990f9d61ae 100644 --- a/arch/arm/dts/sun5i-a13-hsg-h702.dts +++ b/arch/arm/dts/sun5i-a13-hsg-h702.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/dts/sun5i-a13-olinuxino-micro.dts index 4a00bcee92..ad84fe4276 100644 --- a/arch/arm/dts/sun5i-a13-olinuxino-micro.dts +++ b/arch/arm/dts/sun5i-a13-olinuxino-micro.dts @@ -17,11 +17,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun5i-a13-olinuxino.dts b/arch/arm/dts/sun5i-a13-olinuxino.dts index 4440156553..42324005eb 100644 --- a/arch/arm/dts/sun5i-a13-olinuxino.dts +++ b/arch/arm/dts/sun5i-a13-olinuxino.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun5i-a13-utoo-p66.dts b/arch/arm/dts/sun5i-a13-utoo-p66.dts index 6e19f789ae..8c1bca7039 100644 --- a/arch/arm/dts/sun5i-a13-utoo-p66.dts +++ b/arch/arm/dts/sun5i-a13-utoo-p66.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -50,6 +45,7 @@ #include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/sun4i-a10.h> / { @@ -101,6 +97,20 @@ pinctrl-0 = <&i2c1_pins_a>; status = "okay"; + icn8318: touchscreen@40 { + compatible = "chipone,icn8318"; + reg = <0x40>; + interrupt-parent = <&pio>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */ + pinctrl-names = "default"; + pinctrl-0 = <&ts_wake_pin_p66>; + wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + touchscreen-inverted-x; + touchscreen-swapped-x-y; + }; + pcf8563: rtc@51 { compatible = "nxp,pcf8563"; reg = <0x51>; @@ -166,6 +176,13 @@ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; + ts_wake_pin_p66: ts_wake_pin@0 { + allwinner,pins = "PB3"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + usb0_vbus_pin_a: usb0_vbus_pin@0 { allwinner,pins = "PB4"; allwinner,function = "gpio_out"; diff --git a/arch/arm/dts/sun5i-a13.dtsi b/arch/arm/dts/sun5i-a13.dtsi index 0188deed6f..976d4faa21 100644 --- a/arch/arm/dts/sun5i-a13.dtsi +++ b/arch/arm/dts/sun5i-a13.dtsi @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this library; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -109,12 +104,16 @@ compatible = "allwinner,sun5i-a13-ahb-gates-clk"; reg = <0x01c20060 0x8>; clocks = <&ahb>; - clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci", - "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", - "ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram", - "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_stimer", - "ahb_ve", "ahb_lcd", "ahb_csi", "ahb_de_be", - "ahb_de_fe", "ahb_iep", "ahb_mali400"; + clock-output-names = "ahb_usbotg", "ahb_ehci", + "ahb_ohci", "ahb_ss", "ahb_dma", + "ahb_bist", "ahb_mmc0", "ahb_mmc1", + "ahb_mmc2", "ahb_nand", + "ahb_sdram", "ahb_spi0", + "ahb_spi1", "ahb_spi2", + "ahb_stimer", "ahb_ve", "ahb_lcd", + "ahb_csi", "ahb_de_be", + "ahb_de_fe", "ahb_iep", + "ahb_mali400"; }; apb0_gates: clk@01c20068 { @@ -122,7 +121,8 @@ compatible = "allwinner,sun5i-a13-apb0-gates-clk"; reg = <0x01c20068 0x4>; clocks = <&apb0>; - clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir"; + clock-output-names = "apb0_codec", "apb0_pio", + "apb0_ir"; }; apb1_gates: clk@01c2006c { @@ -139,13 +139,13 @@ &cpu0 { clock-latency = <244144>; /* 8 32k periods */ operating-points = < - /* kHz uV */ + /* kHz uV */ 1008000 1400000 - 912000 1350000 - 864000 1300000 - 624000 1200000 - 576000 1200000 - 432000 1200000 + 912000 1350000 + 864000 1300000 + 624000 1200000 + 576000 1200000 + 432000 1200000 >; #cooling-cells = <2>; cooling-min-level = <0>; diff --git a/arch/arm/dts/sun5i.dtsi b/arch/arm/dts/sun5i.dtsi index 96b20d646b..54b0978304 100644 --- a/arch/arm/dts/sun5i.dtsi +++ b/arch/arm/dts/sun5i.dtsi @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this library; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -150,10 +145,16 @@ ahb: ahb@01c20054 { #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-ahb-clk"; + compatible = "allwinner,sun5i-a13-ahb-clk"; reg = <0x01c20054 0x4>; - clocks = <&axi>; + clocks = <&axi>, <&cpu>, <&pll6 1>; clock-output-names = "ahb"; + /* + * Use PLL6 as parent, instead of CPU/AXI + * which has rate changes due to cpufreq + */ + assigned-clocks = <&ahb>; + assigned-clock-parents = <&pll6 1>; }; apb0: apb0@01c20054 { @@ -276,7 +277,7 @@ usb_clk: clk@01c200cc { #clock-cells = <1>; - #reset-cells = <1>; + #reset-cells = <1>; compatible = "allwinner,sun5i-a13-usb-clk"; reg = <0x01c200cc 0x4>; clocks = <&pll6 1>; @@ -292,44 +293,40 @@ }; }; - /* - * Note we use the address where the mmio registers start, not where - * the SRAM blocks start, this cannot be changed because that would be - * a devicetree ABI change. - */ soc@01c00000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - sram@00000000 { - compatible = "allwinner,sun4i-a10-sram"; - reg = <0x00000000 0x4000>; - allwinner,sram-name = "A1"; - }; - - sram@00004000 { - compatible = "allwinner,sun4i-a10-sram"; - reg = <0x00004000 0x4000>; - allwinner,sram-name = "A2"; - }; - - sram@00008000 { - compatible = "allwinner,sun4i-a10-sram"; - reg = <0x00008000 0x4000>; - allwinner,sram-name = "A3-A4"; - }; - - sram@00010000 { - compatible = "allwinner,sun4i-a10-sram"; - reg = <0x00010000 0x1000>; - allwinner,sram-name = "D"; - }; - sram-controller@01c00000 { compatible = "allwinner,sun4i-a10-sram-controller"; reg = <0x01c00000 0x30>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sram_a: sram@00000000 { + compatible = "mmio-sram"; + reg = <0x00000000 0xc000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00000000 0xc000>; + }; + + sram_d: sram@00010000 { + compatible = "mmio-sram"; + reg = <0x00010000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00010000 0x1000>; + + otg_sram: sram-section@0000 { + compatible = "allwinner,sun4i-a10-sram-d"; + reg = <0x0000 0x1000>; + status = "disabled"; + }; + }; }; dma: dma-controller@01c02000 { @@ -504,7 +501,8 @@ }; mmc0_pins_a: mmc0@0 { - allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; + allwinner,pins = "PF0", "PF1", "PF2", "PF3", + "PF4", "PF5"; allwinner,function = "mmc0"; allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; diff --git a/arch/arm/dts/sun6i-a31-app4-evb1.dts b/arch/arm/dts/sun6i-a31-app4-evb1.dts index b7b1df4be4..2f8cfab771 100644 --- a/arch/arm/dts/sun6i-a31-app4-evb1.dts +++ b/arch/arm/dts/sun6i-a31-app4-evb1.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun6i-a31-colombus.dts b/arch/arm/dts/sun6i-a31-colombus.dts index 95d7ec2b29..0cf9926d1e 100644 --- a/arch/arm/dts/sun6i-a31-colombus.dts +++ b/arch/arm/dts/sun6i-a31-colombus.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun6i-a31-hummingbird.dts b/arch/arm/dts/sun6i-a31-hummingbird.dts index 1e820bc0c7..d0cfadac06 100644 --- a/arch/arm/dts/sun6i-a31-hummingbird.dts +++ b/arch/arm/dts/sun6i-a31-hummingbird.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun6i-a31-i7.dts b/arch/arm/dts/sun6i-a31-i7.dts index ce37d69d34..e9185dad67 100644 --- a/arch/arm/dts/sun6i-a31-i7.dts +++ b/arch/arm/dts/sun6i-a31-i7.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun6i-a31-m9.dts b/arch/arm/dts/sun6i-a31-m9.dts index 29f5fc717b..a5660d61a9 100644 --- a/arch/arm/dts/sun6i-a31-m9.dts +++ b/arch/arm/dts/sun6i-a31-m9.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts b/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts new file mode 100644 index 0000000000..4404f37d13 --- /dev/null +++ b/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts @@ -0,0 +1,149 @@ +/* + * Copyright 2014 Hans de Goede <hdegoede@redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun6i-a31.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> + +/ { + model = "Mele A1000G Quad top set box"; + compatible = "mele,a1000g-quad", "allwinner,sun6i-a31"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins_m9>; + + blue { + label = "m9:blue:usr"; + gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_pins_mii_a>; + phy = <&phy1>; + phy-mode = "mii"; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ + cd-inverted; + status = "okay"; +}; + +&pio { + led_pins_m9: led_pins@0 { + allwinner,pins = "PH13"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + mmc0_cd_pin_m9: mmc0_cd_pin@0 { + allwinner,pins = "PH22"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb1_vbus_pin_m9: usb1_vbus_pin@0 { + allwinner,pins = "PC27"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + +®_usb1_vbus { + pinctrl-names = "default"; + pinctrl-0 = <&usb1_vbus_pin_m9>; + gpio = <&pio 2 27 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun6i-a31.dtsi b/arch/arm/dts/sun6i-a31.dtsi index 25a97f08d9..008047a018 100644 --- a/arch/arm/dts/sun6i-a31.dtsi +++ b/arch/arm/dts/sun6i-a31.dtsi @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -67,7 +62,8 @@ ranges; framebuffer@0 { - compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-hdmi"; clocks = <&pll6 0>; status = "disabled"; @@ -104,11 +100,11 @@ clocks = <&cpu>; clock-latency = <244144>; /* 8 32k periods */ operating-points = < - /* kHz uV */ + /* kHz uV */ 1008000 1200000 - 864000 1200000 - 720000 1100000 - 480000 1000000 + 864000 1200000 + 720000 1100000 + 480000 1000000 >; #cooling-cells = <2>; cooling-min-level = <0>; @@ -241,6 +237,14 @@ reg = <0x01c20054 0x4>; clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>; clock-output-names = "ahb1"; + + /* + * Clock AHB1 from PLL6, instead of CPU/AXI which + * has rate changes due to cpufreq. Also the DMA + * controller requires AHB1 clocked from PLL6. + */ + assigned-clocks = <&ahb1>; + assigned-clock-parents = <&pll6 0>; }; ahb1_gates: clk@01c20060 { @@ -296,9 +300,10 @@ reg = <0x01c2006c 0x4>; clocks = <&apb2>; clock-output-names = "apb2_i2c0", "apb2_i2c1", - "apb2_i2c2", "apb2_i2c3", "apb2_uart0", - "apb2_uart1", "apb2_uart2", "apb2_uart3", - "apb2_uart4", "apb2_uart5"; + "apb2_i2c2", "apb2_i2c3", + "apb2_uart0", "apb2_uart1", + "apb2_uart2", "apb2_uart3", + "apb2_uart4", "apb2_uart5"; }; mmc0_clk: clk@01c20088 { @@ -375,7 +380,7 @@ usb_clk: clk@01c200cc { #clock-cells = <1>; - #reset-cells = <1>; + #reset-cells = <1>; compatible = "allwinner,sun6i-a31-usb-clk"; reg = <0x01c200cc 0x4>; clocks = <&osc24M>; @@ -385,10 +390,13 @@ }; /* - * The following two are dummy clocks, placeholders used in the gmac_tx - * clock. The gmac driver will choose one parent depending on the PHY - * interface mode, using clk_set_rate auto-reparenting. - * The actual TX clock rate is not controlled by the gmac_tx clock. + * The following two are dummy clocks, placeholders + * used in the gmac_tx clock. The gmac driver will + * choose one parent depending on the PHY interface + * mode, using clk_set_rate auto-reparenting. + * + * The actual TX clock rate is not controlled by the + * gmac_tx clock. */ mii_phy_tx_clk: clk@1 { #clock-cells = <0>; @@ -426,10 +434,6 @@ clocks = <&ahb1_gates 6>; resets = <&ahb1_rst 6>; #dma-cells = <1>; - - /* DMA controller requires AHB1 clocked from PLL6 */ - assigned-clocks = <&ahb1>; - assigned-clock-parents = <&pll6 0>; }; mmc0: mmc@01c0f000 { @@ -628,7 +632,8 @@ }; mmc0_pins_a: mmc0@0 { - allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; + allwinner,pins = "PF0", "PF1", "PF2", + "PF3", "PF4", "PF5"; allwinner,function = "mmc0"; allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; @@ -866,7 +871,8 @@ }; timer@01c60000 { - compatible = "allwinner,sun6i-a31-hstimer", "allwinner,sun7i-a20-hstimer"; + compatible = "allwinner,sun6i-a31-hstimer", + "allwinner,sun7i-a20-hstimer"; reg = <0x01c60000 0x1000>; interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, @@ -957,7 +963,8 @@ ar100: ar100_clk { compatible = "allwinner,sun6i-a31-ar100-clk"; #clock-cells = <0>; - clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>; + clocks = <&osc32k>, <&osc24M>, <&pll6 0>, + <&pll6 0>; clock-output-names = "ar100"; }; diff --git a/arch/arm/dts/sun6i-a31s-cs908.dts b/arch/arm/dts/sun6i-a31s-cs908.dts index 68cb2bf399..1e2411a2bc 100644 --- a/arch/arm/dts/sun6i-a31s-cs908.dts +++ b/arch/arm/dts/sun6i-a31s-cs908.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this library; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun6i-a31s.dtsi b/arch/arm/dts/sun6i-a31s.dtsi index eaf5ec8fd4..c17a32771b 100644 --- a/arch/arm/dts/sun6i-a31s.dtsi +++ b/arch/arm/dts/sun6i-a31s.dtsi @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this library; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts index b952ac4455..9f7b472e67 100644 --- a/arch/arm/dts/sun7i-a20-bananapi.dts +++ b/arch/arm/dts/sun7i-a20-bananapi.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -142,7 +137,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; @@ -197,7 +192,9 @@ &spi0 { pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins_a>; + pinctrl-0 = <&spi0_pins_a>, + <&spi0_cs0_pins_a>, + <&spi0_cs1_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-bananapro.dts b/arch/arm/dts/sun7i-a20-bananapro.dts index 9d9027f25a..18fcc87f46 100644 --- a/arch/arm/dts/sun7i-a20-bananapro.dts +++ b/arch/arm/dts/sun7i-a20-bananapro.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -57,7 +52,7 @@ aliases { serial0 = &uart0; - serial1 = &uart2; + serial1 = &uart4; serial2 = &uart7; }; @@ -154,7 +149,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; @@ -243,7 +238,9 @@ &spi0 { pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins_a>; + pinctrl-0 = <&spi0_pins_a>, + <&spi0_cs0_pins_a>, + <&spi0_cs1_pins_a>; status = "okay"; }; @@ -253,9 +250,9 @@ status = "okay"; }; -&uart2 { +&uart4 { pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins_a>; + pinctrl-0 = <&uart4_pins_b>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-cubieboard2.dts b/arch/arm/dts/sun7i-a20-cubieboard2.dts index 3c817ac936..39a51d5143 100644 --- a/arch/arm/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/dts/sun7i-a20-cubieboard2.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -133,7 +128,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts index 613a19e63e..4611e2f5a9 100644 --- a/arch/arm/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/dts/sun7i-a20-cubietruck.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -160,7 +155,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-hummingbird.dts b/arch/arm/dts/sun7i-a20-hummingbird.dts index d3f15c2e72..37f4a54974 100644 --- a/arch/arm/dts/sun7i-a20-hummingbird.dts +++ b/arch/arm/dts/sun7i-a20-hummingbird.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -160,7 +155,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; @@ -245,7 +240,8 @@ &spi2 { pinctrl-names = "default"; - pinctrl-0 = <&spi2_pins_b>; + pinctrl-0 = <&spi2_pins_b>, + <&spi2_cs0_pins_b>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/dts/sun7i-a20-i12-tvbox.dts index 3f99b3f222..f32f6f20d9 100644 --- a/arch/arm/dts/sun7i-a20-i12-tvbox.dts +++ b/arch/arm/dts/sun7i-a20-i12-tvbox.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -157,7 +152,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-m3.dts b/arch/arm/dts/sun7i-a20-m3.dts index f2fb26e7d6..8d9ea48dd9 100644 --- a/arch/arm/dts/sun7i-a20-m3.dts +++ b/arch/arm/dts/sun7i-a20-m3.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -117,7 +112,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-mk808c.dts b/arch/arm/dts/sun7i-a20-mk808c.dts index f3f9eeb0d1..4f432f8ade 100644 --- a/arch/arm/dts/sun7i-a20-mk808c.dts +++ b/arch/arm/dts/sun7i-a20-mk808c.dts @@ -1,20 +1,66 @@ /* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> + * Copyright 2015 Marcus Cooper * - * Minimal dts file for the MK808C for u-boot only + * Marcus Cooper <codekipper@gmail.com> * - * SPDX-License-Identifier: GPL-2.0+ or X11 + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; #include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> / { - model = "MK808C"; + model = "mk808c"; compatible = "allwinner,mk808c", "allwinner,sun7i-a20"; aliases { serial0 = &uart0; + serial1 = &uart2; }; chosen { @@ -30,6 +76,43 @@ status = "okay"; }; +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + compatible = "x-powers,axp209"; + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <1>; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v0>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; + status = "okay"; +}; + &ohci0 { status = "okay"; }; @@ -38,8 +121,28 @@ status = "okay"; }; +®_usb1_vbus { + status = "okay"; +}; + +®_usb2_vbus { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins_a>; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts index 6592cb21e3..769726dfb0 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts @@ -19,11 +19,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts index 3a7a2c2b48..8acff78272 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts index 82802b6cb1..00f8f25ecc 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -250,13 +245,15 @@ &spi1 { pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins_a>; + pinctrl-0 = <&spi1_pins_a>, + <&spi1_cs0_pins_a>; status = "okay"; }; &spi2 { pinctrl-names = "default"; - pinctrl-0 = <&spi2_pins_a>; + pinctrl-0 = <&spi2_pins_a>, + <&spi2_cs0_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts index 0556938a5d..73cd81ee02 100644 --- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts +++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -137,7 +132,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts index 7e6405c544..55a06ceb80 100644 --- a/arch/arm/dts/sun7i-a20-orangepi.dts +++ b/arch/arm/dts/sun7i-a20-orangepi.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -132,7 +127,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts index 810c5f7645..5361fce26b 100644 --- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts +++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -125,7 +120,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts index cd05267781..afc9ecebed 100644 --- a/arch/arm/dts/sun7i-a20-pcduino3.dts +++ b/arch/arm/dts/sun7i-a20-pcduino3.dts @@ -17,11 +17,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -154,7 +149,7 @@ &ir0 { pinctrl-names = "default"; - pinctrl-0 = <&ir0_pins_a>; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts index 2ad3b09dcb..83c6d3f872 100644 --- a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts +++ b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts @@ -17,11 +17,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun7i-a20.dtsi b/arch/arm/dts/sun7i-a20.dtsi index d4ba77202d..6a63f30c9a 100644 --- a/arch/arm/dts/sun7i-a20.dtsi +++ b/arch/arm/dts/sun7i-a20.dtsi @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -68,7 +63,8 @@ ranges; framebuffer@0 { - compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-hdmi"; clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, <&ahb_gates 44>; @@ -104,14 +100,14 @@ clocks = <&cpu>; clock-latency = <244144>; /* 8 32k periods */ operating-points = < - /* kHz uV */ - 960000 1400000 - 912000 1400000 - 864000 1300000 - 720000 1200000 - 528000 1100000 - 312000 1000000 - 144000 900000 + /* kHz uV */ + 960000 1400000 + 912000 1400000 + 864000 1300000 + 720000 1200000 + 528000 1100000 + 312000 1000000 + 144000 900000 >; #cooling-cells = <2>; cooling-min-level = <0>; @@ -224,7 +220,8 @@ compatible = "allwinner,sun4i-a10-pll6-clk"; reg = <0x01c20028 0x4>; clocks = <&osc24M>; - clock-output-names = "pll6_sata", "pll6_other", "pll6"; + clock-output-names = "pll6_sata", "pll6_other", "pll6", + "pll6_div_4"; }; pll8: clk@01c20040 { @@ -253,10 +250,16 @@ ahb: ahb@01c20054 { #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-ahb-clk"; + compatible = "allwinner,sun5i-a13-ahb-clk"; reg = <0x01c20054 0x4>; - clocks = <&axi>; + clocks = <&axi>, <&pll6 3>, <&pll6 1>; clock-output-names = "ahb"; + /* + * Use PLL6 as parent, instead of CPU/AXI + * which has rate changes due to cpufreq + */ + assigned-clocks = <&ahb>; + assigned-clock-parents = <&pll6 3>; }; ahb_gates: clk@01c20060 { @@ -441,11 +444,12 @@ usb_clk: clk@01c200cc { #clock-cells = <1>; - #reset-cells = <1>; + #reset-cells = <1>; compatible = "allwinner,sun4i-a10-usb-clk"; reg = <0x01c200cc 0x4>; clocks = <&pll6 1>; - clock-output-names = "usb_ohci0", "usb_ohci1", "usb_phy"; + clock-output-names = "usb_ohci0", "usb_ohci1", + "usb_phy"; }; spi3_clk: clk@01c200d4 { @@ -465,10 +469,13 @@ }; /* - * The following two are dummy clocks, placeholders used in the gmac_tx - * clock. The gmac driver will choose one parent depending on the PHY - * interface mode, using clk_set_rate auto-reparenting. - * The actual TX clock rate is not controlled by the gmac_tx clock. + * The following two are dummy clocks, placeholders + * used in the gmac_tx clock. The gmac driver will + * choose one parent depending on the PHY interface + * mode, using clk_set_rate auto-reparenting. + * + * The actual TX clock rate is not controlled by the + * gmac_tx clock. */ mii_phy_tx_clk: clk@2 { #clock-cells = <0>; @@ -521,44 +528,46 @@ }; }; - /* - * Note we use the address where the mmio registers start, not where - * the SRAM blocks start, this cannot be changed because that would be - * a devicetree ABI change. - */ soc@01c00000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - sram@00000000 { - compatible = "allwinner,sun4i-a10-sram"; - reg = <0x00000000 0x4000>; - allwinner,sram-name = "A1"; - }; - - sram@00004000 { - compatible = "allwinner,sun4i-a10-sram"; - reg = <0x00004000 0x4000>; - allwinner,sram-name = "A2"; - }; - - sram@00008000 { - compatible = "allwinner,sun4i-a10-sram"; - reg = <0x00008000 0x4000>; - allwinner,sram-name = "A3-A4"; - }; - - sram@00010000 { - compatible = "allwinner,sun4i-a10-sram"; - reg = <0x00010000 0x1000>; - allwinner,sram-name = "D"; - }; - sram-controller@01c00000 { compatible = "allwinner,sun4i-a10-sram-controller"; reg = <0x01c00000 0x30>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sram_a: sram@00000000 { + compatible = "mmio-sram"; + reg = <0x00000000 0xc000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00000000 0xc000>; + + emac_sram: sram-section@8000 { + compatible = "allwinner,sun4i-a10-sram-a3-a4"; + reg = <0x8000 0x4000>; + status = "disabled"; + }; + }; + + sram_d: sram@00010000 { + compatible = "mmio-sram"; + reg = <0x00010000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00010000 0x1000>; + + otg_sram: sram-section@0000 { + compatible = "allwinner,sun4i-a10-sram-d"; + reg = <0x0000 0x1000>; + status = "disabled"; + }; + }; }; nmi_intc: interrupt-controller@01c00030 { @@ -610,6 +619,7 @@ reg = <0x01c0b000 0x1000>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ahb_gates 17>; + allwinner,sram = <&emac_sram 1>; status = "disabled"; }; @@ -837,6 +847,13 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + uart4_pins_b: uart4@1 { + allwinner,pins = "PH4", "PH5"; + allwinner,function = "uart4"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + uart5_pins_a: uart5@0 { allwinner,pins = "PI10", "PI11"; allwinner,function = "uart5"; @@ -938,35 +955,71 @@ }; spi0_pins_a: spi0@0 { - allwinner,pins = "PI10", "PI11", "PI12", "PI13", "PI14"; + allwinner,pins = "PI11", "PI12", "PI13"; + allwinner,function = "spi0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi0_cs0_pins_a: spi0_cs0@0 { + allwinner,pins = "PI10"; + allwinner,function = "spi0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi0_cs1_pins_a: spi0_cs1@0 { + allwinner,pins = "PI14"; allwinner,function = "spi0"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; spi1_pins_a: spi1@0 { - allwinner,pins = "PI16", "PI17", "PI18", "PI19"; + allwinner,pins = "PI17", "PI18", "PI19"; + allwinner,function = "spi1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi1_cs0_pins_a: spi1_cs0@0 { + allwinner,pins = "PI16"; allwinner,function = "spi1"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; spi2_pins_a: spi2@0 { - allwinner,pins = "PC19", "PC20", "PC21", "PC22"; + allwinner,pins = "PC20", "PC21", "PC22"; allwinner,function = "spi2"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; spi2_pins_b: spi2@1 { - allwinner,pins = "PB14", "PB15", "PB16", "PB17"; + allwinner,pins = "PB15", "PB16", "PB17"; + allwinner,function = "spi2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi2_cs0_pins_a: spi2_cs0@0 { + allwinner,pins = "PC19"; + allwinner,function = "spi2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi2_cs0_pins_b: spi2_cs0@1 { + allwinner,pins = "PB14"; allwinner,function = "spi2"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; mmc0_pins_a: mmc0@0 { - allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; + allwinner,pins = "PF0", "PF1", "PF2", + "PF3", "PF4", "PF5"; allwinner,function = "mmc0"; allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; @@ -980,28 +1033,44 @@ }; mmc2_pins_a: mmc2@0 { - allwinner,pins = "PC6","PC7","PC8","PC9","PC10","PC11"; + allwinner,pins = "PC6", "PC7", "PC8", + "PC9", "PC10", "PC11"; allwinner,function = "mmc2"; allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; mmc3_pins_a: mmc3@0 { - allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9"; + allwinner,pins = "PI4", "PI5", "PI6", + "PI7", "PI8", "PI9"; allwinner,function = "mmc3"; allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ir0_pins_a: ir0@0 { - allwinner,pins = "PB3","PB4"; + ir0_rx_pins_a: ir0@0 { + allwinner,pins = "PB4"; + allwinner,function = "ir0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + ir0_tx_pins_a: ir0@1 { + allwinner,pins = "PB3"; allwinner,function = "ir0"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ir1_pins_a: ir1@0 { - allwinner,pins = "PB22","PB23"; + ir1_rx_pins_a: ir1@0 { + allwinner,pins = "PB23"; + allwinner,function = "ir1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + ir1_tx_pins_a: ir1@1 { + allwinner,pins = "PB22"; allwinner,function = "ir1"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; @@ -1171,7 +1240,8 @@ }; i2c0: i2c@01c2ac00 { - compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; + compatible = "allwinner,sun7i-a20-i2c", + "allwinner,sun4i-a10-i2c"; reg = <0x01c2ac00 0x400>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apb1_gates 0>; @@ -1181,7 +1251,8 @@ }; i2c1: i2c@01c2b000 { - compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; + compatible = "allwinner,sun7i-a20-i2c", + "allwinner,sun4i-a10-i2c"; reg = <0x01c2b000 0x400>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apb1_gates 1>; @@ -1191,7 +1262,8 @@ }; i2c2: i2c@01c2b400 { - compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; + compatible = "allwinner,sun7i-a20-i2c", + "allwinner,sun4i-a10-i2c"; reg = <0x01c2b400 0x400>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apb1_gates 2>; @@ -1201,7 +1273,8 @@ }; i2c3: i2c@01c2b800 { - compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; + compatible = "allwinner,sun7i-a20-i2c", + "allwinner,sun4i-a10-i2c"; reg = <0x01c2b800 0x400>; interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apb1_gates 3>; @@ -1211,7 +1284,8 @@ }; i2c4: i2c@01c2c000 { - compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; + compatible = "allwinner,sun7i-a20-i2c", + "allwinner,sun4i-a10-i2c"; reg = <0x01c2c000 0x400>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apb1_gates 15>; diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi new file mode 100644 index 0000000000..faea94e45e --- /dev/null +++ b/arch/arm/dts/sun8i-a23-a33.dtsi @@ -0,0 +1,626 @@ +/* + * Copyright 2014 Chen-Yu Tsai + * + * Chen-Yu Tsai <wens@csie.org> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "skeleton.dtsi" + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +#include <dt-bindings/pinctrl/sun4i-a10.h> + +/ { + interrupt-parent = <&gic>; + + chosen { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + framebuffer@0 { + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; + allwinner,pipeline = "de_be0-lcd0"; + clocks = <&pll6 0>; + status = "disabled"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + clock-frequency = <24000000>; + arm,cpu-registers-not-fw-configured; + }; + + cpus { + enable-method = "allwinner,sun8i-a23"; + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0>; + }; + + cpu@1 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <1>; + }; + }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + osc24M: osc24M_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "osc24M"; + }; + + osc32k: osc32k_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "osc32k"; + }; + + pll1: clk@01c20000 { + #clock-cells = <0>; + compatible = "allwinner,sun8i-a23-pll1-clk"; + reg = <0x01c20000 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll1"; + }; + + /* dummy clock until actually implemented */ + pll5: pll5_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + clock-output-names = "pll5"; + }; + + pll6: clk@01c20028 { + #clock-cells = <1>; + compatible = "allwinner,sun6i-a31-pll6-clk"; + reg = <0x01c20028 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll6", "pll6x2"; + }; + + cpu: cpu_clk@01c20050 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-cpu-clk"; + reg = <0x01c20050 0x4>; + + /* + * PLL1 is listed twice here. + * While it looks suspicious, it's actually documented + * that way both in the datasheet and in the code from + * Allwinner. + */ + clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>; + clock-output-names = "cpu"; + }; + + axi: axi_clk@01c20050 { + #clock-cells = <0>; + compatible = "allwinner,sun8i-a23-axi-clk"; + reg = <0x01c20050 0x4>; + clocks = <&cpu>; + clock-output-names = "axi"; + }; + + ahb1: ahb1_clk@01c20054 { + #clock-cells = <0>; + compatible = "allwinner,sun6i-a31-ahb1-clk"; + reg = <0x01c20054 0x4>; + clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>; + clock-output-names = "ahb1"; + }; + + apb1: apb1_clk@01c20054 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-apb0-clk"; + reg = <0x01c20054 0x4>; + clocks = <&ahb1>; + clock-output-names = "apb1"; + }; + + ahb1_gates: clk@01c20060 { + #clock-cells = <1>; + compatible = "allwinner,sun8i-a23-ahb1-gates-clk"; + reg = <0x01c20060 0x8>; + clocks = <&ahb1>; + clock-output-names = "ahb1_mipidsi", "ahb1_dma", + "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2", + "ahb1_nand", "ahb1_sdram", + "ahb1_hstimer", "ahb1_spi0", + "ahb1_spi1", "ahb1_otg", "ahb1_ehci", + "ahb1_ohci", "ahb1_ve", "ahb1_lcd", + "ahb1_csi", "ahb1_be", "ahb1_fe", + "ahb1_gpu", "ahb1_spinlock", + "ahb1_drc"; + }; + + apb1_gates: clk@01c20068 { + #clock-cells = <1>; + compatible = "allwinner,sun8i-a23-apb1-gates-clk"; + reg = <0x01c20068 0x4>; + clocks = <&apb1>; + clock-output-names = "apb1_codec", "apb1_pio", + "apb1_daudio0", "apb1_daudio1"; + }; + + apb2: clk@01c20058 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-apb1-clk"; + reg = <0x01c20058 0x4>; + clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>; + clock-output-names = "apb2"; + }; + + apb2_gates: clk@01c2006c { + #clock-cells = <1>; + compatible = "allwinner,sun8i-a23-apb2-gates-clk"; + reg = <0x01c2006c 0x4>; + clocks = <&apb2>; + clock-output-names = "apb2_i2c0", "apb2_i2c1", + "apb2_i2c2", "apb2_uart0", + "apb2_uart1", "apb2_uart2", + "apb2_uart3", "apb2_uart4"; + }; + + mmc0_clk: clk@01c20088 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-mmc-clk"; + reg = <0x01c20088 0x4>; + clocks = <&osc24M>, <&pll6 0>; + clock-output-names = "mmc0", + "mmc0_output", + "mmc0_sample"; + }; + + mmc1_clk: clk@01c2008c { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-mmc-clk"; + reg = <0x01c2008c 0x4>; + clocks = <&osc24M>, <&pll6 0>; + clock-output-names = "mmc1", + "mmc1_output", + "mmc1_sample"; + }; + + mmc2_clk: clk@01c20090 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-mmc-clk"; + reg = <0x01c20090 0x4>; + clocks = <&osc24M>, <&pll6 0>; + clock-output-names = "mmc2", + "mmc2_output", + "mmc2_sample"; + }; + + usb_clk: clk@01c200cc { + #clock-cells = <1>; + #reset-cells = <1>; + compatible = "allwinner,sun8i-a23-usb-clk"; + reg = <0x01c200cc 0x4>; + clocks = <&osc24M>; + clock-output-names = "usb_phy0", "usb_phy1", "usb_hsic", + "usb_hsic_12M", "usb_ohci0"; + }; + }; + + soc@01c00000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dma: dma-controller@01c02000 { + compatible = "allwinner,sun8i-a23-dma"; + reg = <0x01c02000 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ahb1_gates 6>; + resets = <&ahb1_rst 6>; + #dma-cells = <1>; + }; + + mmc0: mmc@01c0f000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c0f000 0x1000>; + clocks = <&ahb1_gates 8>, + <&mmc0_clk 0>, + <&mmc0_clk 1>, + <&mmc0_clk 2>; + clock-names = "ahb", + "mmc", + "output", + "sample"; + resets = <&ahb1_rst 8>; + reset-names = "ahb"; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc1: mmc@01c10000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c10000 0x1000>; + clocks = <&ahb1_gates 9>, + <&mmc1_clk 0>, + <&mmc1_clk 1>, + <&mmc1_clk 2>; + clock-names = "ahb", + "mmc", + "output", + "sample"; + resets = <&ahb1_rst 9>; + reset-names = "ahb"; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc2: mmc@01c11000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c11000 0x1000>; + clocks = <&ahb1_gates 10>, + <&mmc2_clk 0>, + <&mmc2_clk 1>, + <&mmc2_clk 2>; + clock-names = "ahb", + "mmc", + "output", + "sample"; + resets = <&ahb1_rst 10>; + reset-names = "ahb"; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + pio: pinctrl@01c20800 { + /* compatible gets set in SoC specific dtsi file */ + reg = <0x01c20800 0x400>; + /* interrupts get set in SoC specific dtsi file */ + clocks = <&apb1_gates 5>; + gpio-controller; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + #gpio-cells = <3>; + + uart0_pins_a: uart0@0 { + allwinner,pins = "PF2", "PF4"; + allwinner,function = "uart0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + mmc0_pins_a: mmc0@0 { + allwinner,pins = "PF0", "PF1", "PF2", + "PF3", "PF4", "PF5"; + allwinner,function = "mmc0"; + allwinner,drive = <SUN4I_PINCTRL_30_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + mmc1_pins_a: mmc1@0 { + allwinner,pins = "PG0", "PG1", "PG2", + "PG3", "PG4", "PG5"; + allwinner,function = "mmc1"; + allwinner,drive = <SUN4I_PINCTRL_30_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + i2c0_pins_a: i2c0@0 { + allwinner,pins = "PH2", "PH3"; + allwinner,function = "i2c0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + i2c1_pins_a: i2c1@0 { + allwinner,pins = "PH4", "PH5"; + allwinner,function = "i2c1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + i2c2_pins_a: i2c2@0 { + allwinner,pins = "PE12", "PE13"; + allwinner,function = "i2c2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + }; + + ahb1_rst: reset@01c202c0 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-clock-reset"; + reg = <0x01c202c0 0xc>; + }; + + apb1_rst: reset@01c202d0 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-clock-reset"; + reg = <0x01c202d0 0x4>; + }; + + apb2_rst: reset@01c202d8 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-clock-reset"; + reg = <0x01c202d8 0x4>; + }; + + timer@01c20c00 { + compatible = "allwinner,sun4i-a10-timer"; + reg = <0x01c20c00 0xa0>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc24M>; + }; + + wdt0: watchdog@01c20ca0 { + compatible = "allwinner,sun6i-a31-wdt"; + reg = <0x01c20ca0 0x20>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + }; + + lradc: lradc@01c22800 { + compatible = "allwinner,sun4i-a10-lradc-keys"; + reg = <0x01c22800 0x100>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + uart0: serial@01c28000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28000 0x400>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb2_gates 16>; + resets = <&apb2_rst 16>; + dmas = <&dma 6>, <&dma 6>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart1: serial@01c28400 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28400 0x400>; + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb2_gates 17>; + resets = <&apb2_rst 17>; + dmas = <&dma 7>, <&dma 7>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart2: serial@01c28800 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28800 0x400>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb2_gates 18>; + resets = <&apb2_rst 18>; + dmas = <&dma 8>, <&dma 8>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart3: serial@01c28c00 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28c00 0x400>; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb2_gates 19>; + resets = <&apb2_rst 19>; + dmas = <&dma 9>, <&dma 9>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart4: serial@01c29000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c29000 0x400>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb2_gates 20>; + resets = <&apb2_rst 20>; + dmas = <&dma 10>, <&dma 10>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + i2c0: i2c@01c2ac00 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2ac00 0x400>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb2_gates 0>; + resets = <&apb2_rst 0>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c1: i2c@01c2b000 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2b000 0x400>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb2_gates 1>; + resets = <&apb2_rst 1>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c2: i2c@01c2b400 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2b400 0x400>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb2_gates 2>; + resets = <&apb2_rst 2>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + gic: interrupt-controller@01c81000 { + compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; + reg = <0x01c81000 0x1000>, + <0x01c82000 0x1000>, + <0x01c84000 0x2000>, + <0x01c86000 0x2000>; + interrupt-controller; + #interrupt-cells = <3>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + }; + + rtc: rtc@01f00000 { + compatible = "allwinner,sun6i-a31-rtc"; + reg = <0x01f00000 0x54>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + }; + + prcm@01f01400 { + compatible = "allwinner,sun8i-a23-prcm"; + reg = <0x01f01400 0x200>; + + ar100: ar100_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&osc24M>; + clock-output-names = "ar100"; + }; + + ahb0: ahb0_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&ar100>; + clock-output-names = "ahb0"; + }; + + apb0: apb0_clk { + compatible = "allwinner,sun8i-a23-apb0-clk"; + #clock-cells = <0>; + clocks = <&ahb0>; + clock-output-names = "apb0"; + }; + + apb0_gates: apb0_gates_clk { + compatible = "allwinner,sun8i-a23-apb0-gates-clk"; + #clock-cells = <1>; + clocks = <&apb0>; + clock-output-names = "apb0_pio", "apb0_timer", + "apb0_rsb", "apb0_uart", + "apb0_i2c"; + }; + + apb0_rst: apb0_rst { + compatible = "allwinner,sun6i-a31-clock-reset"; + #reset-cells = <1>; + }; + }; + + cpucfg@01f01c00 { + compatible = "allwinner,sun8i-a23-cpuconfig"; + reg = <0x01f01c00 0x300>; + }; + + r_uart: serial@01f02800 { + compatible = "snps,dw-apb-uart"; + reg = <0x01f02800 0x400>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb0_gates 4>; + resets = <&apb0_rst 4>; + status = "disabled"; + }; + + r_pio: pinctrl@01f02c00 { + compatible = "allwinner,sun8i-a23-r-pinctrl"; + reg = <0x01f02c00 0x400>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb0_gates 0>; + resets = <&apb0_rst 0>; + gpio-controller; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + #gpio-cells = <3>; + + r_uart_pins_a: r_uart@0 { + allwinner,pins = "PL2", "PL3"; + allwinner,function = "s_uart"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + }; + }; +}; diff --git a/arch/arm/dts/sun8i-a23-evb.dts b/arch/arm/dts/sun8i-a23-evb.dts new file mode 100644 index 0000000000..610786e635 --- /dev/null +++ b/arch/arm/dts/sun8i-a23-evb.dts @@ -0,0 +1,134 @@ +/* + * Copyright 2015 Maxime Ripard + * + * Maxime Ripard <maxime.ripard@free-electrons.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-a23.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> + +/ { + model = "Allwinner A23 Evaluation Board"; + compatible = "allwinner,sun8i-a23-evb", "allwinner,sun8i-a23"; + + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + serial0 = &r_uart; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&lradc { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button@190 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <190000>; + }; + + button@390 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <390000>; + }; + + button@600 { + label = "Home"; + linux,code = <KEY_HOME>; + channel = <0>; + voltage = <600000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_evb>; + vmmc-supply = <®_vcc3v0>; + bus-width = <4>; + cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ + cd-inverted; + status = "okay"; +}; + +&pio { + mmc0_cd_pin_evb: mmc0_cd_pin@0 { + allwinner,pins = "PB4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; +}; + +/* + * The RX line has a non-populated resistance. In order to use it, you + * need to solder R207 on the back of the board in order to close the + * line and get a working UART. + */ +&r_uart { + pinctrl-names = "default"; + pinctrl-0 = <&r_uart_pins_a>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts b/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts index dd31c53e2a..382d64c3b7 100644 --- a/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts +++ b/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts @@ -16,11 +16,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts index f5658d123f..95134c69cf 100644 --- a/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts +++ b/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun8i-a23.dtsi b/arch/arm/dts/sun8i-a23.dtsi index 6d6eda398e..8698f7aa31 100644 --- a/arch/arm/dts/sun8i-a23.dtsi +++ b/arch/arm/dts/sun8i-a23.dtsi @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -47,217 +42,14 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - -#include <dt-bindings/interrupt-controller/arm-gic.h> - -#include <dt-bindings/pinctrl/sun4i-a10.h> +#include "sun8i-a23-a33.dtsi" / { - interrupt-parent = <&gic>; - - chosen { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - framebuffer@0 { - compatible = "allwinner,simple-framebuffer", - "simple-framebuffer"; - allwinner,pipeline = "de_be0-lcd0"; - clocks = <&pll6 0>; - status = "disabled"; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; - clock-frequency = <24000000>; - arm,cpu-registers-not-fw-configured; - }; - - cpus { - enable-method = "allwinner,sun8i-a23"; - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0>; - }; - - cpu@1 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <1>; - }; - }; - memory { reg = <0x40000000 0x40000000>; }; clocks { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - osc24M: osc24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "osc24M"; - }; - - osc32k: osc32k_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "osc32k"; - }; - - pll1: clk@01c20000 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a23-pll1-clk"; - reg = <0x01c20000 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll1"; - }; - - /* dummy clock until actually implemented */ - pll5: pll5_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <0>; - clock-output-names = "pll5"; - }; - - pll6: clk@01c20028 { - #clock-cells = <1>; - compatible = "allwinner,sun6i-a31-pll6-clk"; - reg = <0x01c20028 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll6", "pll6x2"; - }; - - cpu: cpu_clk@01c20050 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-cpu-clk"; - reg = <0x01c20050 0x4>; - - /* - * PLL1 is listed twice here. - * While it looks suspicious, it's actually documented - * that way both in the datasheet and in the code from - * Allwinner. - */ - clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>; - clock-output-names = "cpu"; - }; - - axi: axi_clk@01c20050 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a23-axi-clk"; - reg = <0x01c20050 0x4>; - clocks = <&cpu>; - clock-output-names = "axi"; - }; - - ahb1: ahb1_clk@01c20054 { - #clock-cells = <0>; - compatible = "allwinner,sun6i-a31-ahb1-clk"; - reg = <0x01c20054 0x4>; - clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>; - clock-output-names = "ahb1"; - }; - - apb1: apb1_clk@01c20054 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb0-clk"; - reg = <0x01c20054 0x4>; - clocks = <&ahb1>; - clock-output-names = "apb1"; - }; - - ahb1_gates: clk@01c20060 { - #clock-cells = <1>; - compatible = "allwinner,sun8i-a23-ahb1-gates-clk"; - reg = <0x01c20060 0x8>; - clocks = <&ahb1>; - clock-output-names = "ahb1_mipidsi", "ahb1_dma", - "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2", - "ahb1_nand", "ahb1_sdram", - "ahb1_hstimer", "ahb1_spi0", - "ahb1_spi1", "ahb1_otg", "ahb1_ehci", - "ahb1_ohci", "ahb1_ve", "ahb1_lcd", - "ahb1_csi", "ahb1_be", "ahb1_fe", - "ahb1_gpu", "ahb1_spinlock", - "ahb1_drc"; - }; - - apb1_gates: clk@01c20068 { - #clock-cells = <1>; - compatible = "allwinner,sun8i-a23-apb1-gates-clk"; - reg = <0x01c20068 0x4>; - clocks = <&apb1>; - clock-output-names = "apb1_codec", "apb1_pio", - "apb1_daudio0", "apb1_daudio1"; - }; - - apb2: clk@01c20058 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb1-clk"; - reg = <0x01c20058 0x4>; - clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>; - clock-output-names = "apb2"; - }; - - apb2_gates: clk@01c2006c { - #clock-cells = <1>; - compatible = "allwinner,sun8i-a23-apb2-gates-clk"; - reg = <0x01c2006c 0x4>; - clocks = <&apb2>; - clock-output-names = "apb2_i2c0", "apb2_i2c1", - "apb2_i2c2", "apb2_uart0", - "apb2_uart1", "apb2_uart2", - "apb2_uart3", "apb2_uart4"; - }; - - mmc0_clk: clk@01c20088 { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c20088 0x4>; - clocks = <&osc24M>, <&pll6 0>; - clock-output-names = "mmc0", - "mmc0_output", - "mmc0_sample"; - }; - - mmc1_clk: clk@01c2008c { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c2008c 0x4>; - clocks = <&osc24M>, <&pll6 0>; - clock-output-names = "mmc1", - "mmc1_output", - "mmc1_sample"; - }; - - mmc2_clk: clk@01c20090 { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c20090 0x4>; - clocks = <&osc24M>, <&pll6 0>; - clock-output-names = "mmc2", - "mmc2_output", - "mmc2_sample"; - }; - mbus_clk: clk@01c2015c { #clock-cells = <0>; compatible = "allwinner,sun8i-a23-mbus-clk"; @@ -266,368 +58,11 @@ clock-output-names = "mbus"; }; }; +}; - soc@01c00000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - dma: dma-controller@01c02000 { - compatible = "allwinner,sun8i-a23-dma"; - reg = <0x01c02000 0x1000>; - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ahb1_gates 6>; - resets = <&ahb1_rst 6>; - #dma-cells = <1>; - }; - - mmc0: mmc@01c0f000 { - compatible = "allwinner,sun5i-a13-mmc"; - reg = <0x01c0f000 0x1000>; - clocks = <&ahb1_gates 8>, - <&mmc0_clk 0>, - <&mmc0_clk 1>, - <&mmc0_clk 2>; - clock-names = "ahb", - "mmc", - "output", - "sample"; - resets = <&ahb1_rst 8>; - reset-names = "ahb"; - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc1: mmc@01c10000 { - compatible = "allwinner,sun5i-a13-mmc"; - reg = <0x01c10000 0x1000>; - clocks = <&ahb1_gates 9>, - <&mmc1_clk 0>, - <&mmc1_clk 1>, - <&mmc1_clk 2>; - clock-names = "ahb", - "mmc", - "output", - "sample"; - resets = <&ahb1_rst 9>; - reset-names = "ahb"; - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc2: mmc@01c11000 { - compatible = "allwinner,sun5i-a13-mmc"; - reg = <0x01c11000 0x1000>; - clocks = <&ahb1_gates 10>, - <&mmc2_clk 0>, - <&mmc2_clk 1>, - <&mmc2_clk 2>; - clock-names = "ahb", - "mmc", - "output", - "sample"; - resets = <&ahb1_rst 10>; - reset-names = "ahb"; - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - pio: pinctrl@01c20800 { - compatible = "allwinner,sun8i-a23-pinctrl"; - reg = <0x01c20800 0x400>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&apb1_gates 5>; - gpio-controller; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - #gpio-cells = <3>; - - uart0_pins_a: uart0@0 { - allwinner,pins = "PF2", "PF4"; - allwinner,function = "uart0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - mmc0_pins_a: mmc0@0 { - allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; - allwinner,function = "mmc0"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - mmc1_pins_a: mmc1@0 { - allwinner,pins = "PG0","PG1","PG2","PG3","PG4","PG5"; - allwinner,function = "mmc1"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - i2c0_pins_a: i2c0@0 { - allwinner,pins = "PH2", "PH3"; - allwinner,function = "i2c0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - i2c1_pins_a: i2c1@0 { - allwinner,pins = "PH4", "PH5"; - allwinner,function = "i2c1"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - i2c2_pins_a: i2c2@0 { - allwinner,pins = "PE12", "PE13"; - allwinner,function = "i2c2"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - }; - - ahb1_rst: reset@01c202c0 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202c0 0xc>; - }; - - apb1_rst: reset@01c202d0 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202d0 0x4>; - }; - - apb2_rst: reset@01c202d8 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202d8 0x4>; - }; - - timer@01c20c00 { - compatible = "allwinner,sun4i-a10-timer"; - reg = <0x01c20c00 0xa0>; - interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&osc24M>; - }; - - wdt0: watchdog@01c20ca0 { - compatible = "allwinner,sun6i-a31-wdt"; - reg = <0x01c20ca0 0x20>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - }; - - lradc: lradc@01c22800 { - compatible = "allwinner,sun4i-a10-lradc-keys"; - reg = <0x01c22800 0x100>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - uart0: serial@01c28000 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28000 0x400>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&apb2_gates 16>; - resets = <&apb2_rst 16>; - dmas = <&dma 6>, <&dma 6>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - uart1: serial@01c28400 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28400 0x400>; - interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&apb2_gates 17>; - resets = <&apb2_rst 17>; - dmas = <&dma 7>, <&dma 7>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - uart2: serial@01c28800 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28800 0x400>; - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&apb2_gates 18>; - resets = <&apb2_rst 18>; - dmas = <&dma 8>, <&dma 8>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - uart3: serial@01c28c00 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28c00 0x400>; - interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&apb2_gates 19>; - resets = <&apb2_rst 19>; - dmas = <&dma 9>, <&dma 9>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - uart4: serial@01c29000 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c29000 0x400>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&apb2_gates 20>; - resets = <&apb2_rst 20>; - dmas = <&dma 10>, <&dma 10>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - i2c0: i2c@01c2ac00 { - compatible = "allwinner,sun6i-a31-i2c"; - reg = <0x01c2ac00 0x400>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&apb2_gates 0>; - resets = <&apb2_rst 0>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c1: i2c@01c2b000 { - compatible = "allwinner,sun6i-a31-i2c"; - reg = <0x01c2b000 0x400>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&apb2_gates 1>; - resets = <&apb2_rst 1>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c2: i2c@01c2b400 { - compatible = "allwinner,sun6i-a31-i2c"; - reg = <0x01c2b400 0x400>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&apb2_gates 2>; - resets = <&apb2_rst 2>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - gic: interrupt-controller@01c81000 { - compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x1000>, - <0x01c84000 0x2000>, - <0x01c86000 0x2000>; - interrupt-controller; - #interrupt-cells = <3>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - }; - - rtc: rtc@01f00000 { - compatible = "allwinner,sun6i-a31-rtc"; - reg = <0x01f00000 0x54>; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; - }; - - prcm@01f01400 { - compatible = "allwinner,sun8i-a23-prcm"; - reg = <0x01f01400 0x200>; - - ar100: ar100_clk { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clock-div = <1>; - clock-mult = <1>; - clocks = <&osc24M>; - clock-output-names = "ar100"; - }; - - ahb0: ahb0_clk { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clock-div = <1>; - clock-mult = <1>; - clocks = <&ar100>; - clock-output-names = "ahb0"; - }; - - apb0: apb0_clk { - compatible = "allwinner,sun8i-a23-apb0-clk"; - #clock-cells = <0>; - clocks = <&ahb0>; - clock-output-names = "apb0"; - }; - - apb0_gates: apb0_gates_clk { - compatible = "allwinner,sun8i-a23-apb0-gates-clk"; - #clock-cells = <1>; - clocks = <&apb0>; - clock-output-names = "apb0_pio", "apb0_timer", - "apb0_rsb", "apb0_uart", - "apb0_i2c"; - }; - - apb0_rst: apb0_rst { - compatible = "allwinner,sun6i-a31-clock-reset"; - #reset-cells = <1>; - }; - }; - - cpucfg@01f01c00 { - compatible = "allwinner,sun8i-a23-cpuconfig"; - reg = <0x01f01c00 0x300>; - }; - - r_uart: serial@01f02800 { - compatible = "snps,dw-apb-uart"; - reg = <0x01f02800 0x400>; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&apb0_gates 4>; - resets = <&apb0_rst 4>; - status = "disabled"; - }; - - r_pio: pinctrl@01f02c00 { - compatible = "allwinner,sun8i-a23-r-pinctrl"; - reg = <0x01f02c00 0x400>; - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&apb0_gates 0>; - resets = <&apb0_rst 0>; - gpio-controller; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - #gpio-cells = <3>; - - r_uart_pins_a: r_uart@0 { - allwinner,pins = "PL2", "PL3"; - allwinner,function = "s_uart"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - }; - }; +&pio { + compatible = "allwinner,sun8i-a23-pinctrl"; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; }; diff --git a/arch/arm/dts/sun8i-a33-astar-mid756.dts b/arch/arm/dts/sun8i-a33-astar-mid756.dts deleted file mode 100644 index d9ce4465f0..0000000000 --- a/arch/arm/dts/sun8i-a33-astar-mid756.dts +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * Minimal dts file for the Astar MID756 for u-boot only - * - * SPDX-License-Identifier: GPL-2.0+ or X11 - */ - -/dts-v1/; -#include "sun8i-a23.dtsi" - -/ { - model = "Astar MID756"; - compatible = "astar,mid756", "allwinner,sun8i-a23"; - - aliases { - serial0 = &r_uart; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&r_uart { - pinctrl-names = "default"; - pinctrl-0 = <&r_uart_pins_a>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts b/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts new file mode 100644 index 0000000000..19db844863 --- /dev/null +++ b/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts @@ -0,0 +1,88 @@ +/* + * Copyright 2015 Vishnu Patekar + * Vishnu Patekar <vishnupatekar0510@gmail.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-a33.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> + +/ { + model = "ET Q8 Quad Core Tablet (v1.6)"; + compatible = "et,q8-v1.6", "allwinner,sun8i-a33"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&lradc { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button@200 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <200000>; + }; + + button@400 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <400000>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts b/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts new file mode 100644 index 0000000000..866703355b --- /dev/null +++ b/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts @@ -0,0 +1,125 @@ +/* + * Copyright 2015 Hans de Goede <hdegoede@redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-a33.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> + +/ { + model = "Allwinner GA10H Quad Core Tablet (v1.1)"; + compatible = "allwinner,ga10h-v1.1", "allwinner,sun8i-a33"; + + aliases { + serial0 = &r_uart; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&lradc { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button@200 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <200000>; + }; + + button@400 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <400000>; + }; + + button@600 { + label = "Back"; + linux,code = <KEY_BACK>; + channel = <0>; + voltage = <600000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8h>; + vmmc-supply = <®_vcc3v0>; + bus-width = <4>; + cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ + cd-inverted; + status = "okay"; +}; + +&pio { + mmc0_cd_pin_q8h: mmc0_cd_pin@0 { + allwinner,pins = "PB4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; +}; + +&r_uart { + pinctrl-names = "default"; + pinctrl-0 = <&r_uart_pins_a>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts b/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts index 4a431874fb..97771495c2 100644 --- a/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts +++ b/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -#include "sun8i-a23.dtsi" +#include "sun8i-a33.dtsi" / { model = "Ippo Q8H V1.2 (A33, 1024x600)"; diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33.dtsi new file mode 100644 index 0000000000..9b43bc6e79 --- /dev/null +++ b/arch/arm/dts/sun8i-a33.dtsi @@ -0,0 +1,89 @@ +/* + * Copyright 2014 Chen-Yu Tsai + * + * Chen-Yu Tsai <wens@csie.org> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "sun8i-a23-a33.dtsi" + +/ { + cpus { + cpu@2 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <2>; + }; + + cpu@3 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <3>; + }; + }; + + memory { + reg = <0x40000000 0x80000000>; + }; + + clocks { + /* Dummy clock for pll11 (DDR1) until actually implemented */ + pll11: pll11_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + clock-output-names = "pll11"; + }; + + mbus_clk: clk@01c2015c { + #clock-cells = <0>; + compatible = "allwinner,sun8i-a23-mbus-clk"; + reg = <0x01c2015c 0x4>; + clocks = <&osc24M>, <&pll6 1>, <&pll5>, <&pll11>; + clock-output-names = "mbus"; + }; + }; +}; + +&pio { + compatible = "allwinner,sun8i-a33-pinctrl"; + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; +}; diff --git a/arch/arm/dts/sun9i-a80-optimus.dts b/arch/arm/dts/sun9i-a80-optimus.dts index e463138a4d..6ce4b5e8b6 100644 --- a/arch/arm/dts/sun9i-a80-optimus.dts +++ b/arch/arm/dts/sun9i-a80-optimus.dts @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/sun9i-a80.dtsi b/arch/arm/dts/sun9i-a80.dtsi index d3dece2eea..a43ad779ee 100644 --- a/arch/arm/dts/sun9i-a80.dtsi +++ b/arch/arm/dts/sun9i-a80.dtsi @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person @@ -289,7 +284,7 @@ "ahb0_ss", "ahb0_sd", "ahb0_nand1", "ahb0_nand0", "ahb0_sdram", "ahb0_mipi_hsi", "ahb0_sata", "ahb0_ts", - "ahb0_spi0","ahb0_spi1", "ahb0_spi2", + "ahb0_spi0", "ahb0_spi1", "ahb0_spi2", "ahb0_spi3"; }; @@ -570,6 +565,12 @@ clocks = <&osc24M>; }; + wdt: watchdog@06000ca0 { + compatible = "allwinner,sun6i-a31-wdt"; + reg = <0x06000ca0 0x20>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + }; + pio: pinctrl@06000800 { compatible = "allwinner,sun9i-a80-pinctrl"; reg = <0x06000800 0x400>; diff --git a/arch/arm/dts/sunxi-common-regulators.dtsi b/arch/arm/dts/sunxi-common-regulators.dtsi index e02baa66b3..51cc8383f7 100644 --- a/arch/arm/dts/sunxi-common-regulators.dtsi +++ b/arch/arm/dts/sunxi-common-regulators.dtsi @@ -18,11 +18,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person diff --git a/arch/arm/dts/tegra124-nyan-big.dts b/arch/arm/dts/tegra124-nyan-big.dts index 5a39e93c68..8be6adbf07 100644 --- a/arch/arm/dts/tegra124-nyan-big.dts +++ b/arch/arm/dts/tegra124-nyan-big.dts @@ -163,12 +163,15 @@ spi@7000d400 { status = "okay"; + spi-deactivate-delay = <200>; + spi-max-frequency = <3000000>; cros_ec: cros-ec@0 { compatible = "google,cros-ec-spi"; spi-max-frequency = <3000000>; interrupt-parent = <&gpio>; interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>; + ec-interrupt = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; reg = <0>; google,cros-ec-spi-msg-delay = <2000>; diff --git a/arch/arm/dts/vf-colibri.dtsi b/arch/arm/dts/vf-colibri.dtsi new file mode 100644 index 0000000000..7a8e9bee33 --- /dev/null +++ b/arch/arm/dts/vf-colibri.dtsi @@ -0,0 +1,21 @@ +/* + * Copyright 2014 Toradex AG + * + * SPDX-License-Identifier: GPL-2.0+ or X11 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include "vf.dtsi" + +&dspi1 { + status = "okay"; + bus-num = <1>; + + spi_cmd: sspi@0 { + reg = <0>; + spi-max-frequency = <50000000>; + }; +}; diff --git a/arch/arm/dts/vf.dtsi b/arch/arm/dts/vf.dtsi new file mode 100644 index 0000000000..78706e118e --- /dev/null +++ b/arch/arm/dts/vf.dtsi @@ -0,0 +1,100 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ or X11 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +/include/ "skeleton.dtsi" + +/ { + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; + spi0 = &dspi0; + spi1 = &dspi1; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + + aips0: aips-bus@40000000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dspi0: dspi0@4002c000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,vf610-dspi"; + reg = <0x4002c000 0x1000>; + num-cs = <5>; + status = "disabled"; + }; + + dspi1: dspi1@4002d000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,vf610-dspi"; + reg = <0x4002d000 0x1000>; + num-cs = <5>; + status = "disabled"; + }; + + qspi0: quadspi@40044000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,vf610-qspi"; + reg = <0x40044000 0x1000>; + status = "disabled"; + }; + + gpio0: gpio@40049000 { + compatible = "fsl,vf610-gpio"; + reg = <0x400ff000 0x40>; + #gpio-cells = <2>; + }; + + gpio1: gpio@4004a000 { + compatible = "fsl,vf610-gpio"; + reg = <0x400ff040 0x40>; + #gpio-cells = <2>; + }; + + gpio2: gpio@4004b000 { + compatible = "fsl,vf610-gpio"; + reg = <0x400ff080 0x40>; + #gpio-cells = <2>; + }; + + gpio3: gpio@4004c000 { + compatible = "fsl,vf610-gpio"; + reg = <0x400ff0c0 0x40>; + #gpio-cells = <2>; + }; + + gpio4: gpio@4004d000 { + compatible = "fsl,vf610-gpio"; + reg = <0x400ff100 0x40>; + #gpio-cells = <2>; + }; + }; + + aips1: aips-bus@40080000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + }; + }; +}; diff --git a/arch/arm/dts/vf500-colibri.dts b/arch/arm/dts/vf500-colibri.dts new file mode 100644 index 0000000000..e3833064d2 --- /dev/null +++ b/arch/arm/dts/vf500-colibri.dts @@ -0,0 +1,18 @@ +/* + * Copyright 2014 Toradex AG + * + * SPDX-License-Identifier: GPL-2.0+ or X11 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/dts-v1/; +#include "vf-colibri.dtsi" + +/ { + model = "Toradex Colibri VF50"; + compatible = "toradex,vf500-colibri_vf50", "toradex,vf500-colibri_vf50", "fsl,vf500"; +}; diff --git a/arch/arm/dts/vf610-colibri.dts b/arch/arm/dts/vf610-colibri.dts new file mode 100644 index 0000000000..63bb3f4ee7 --- /dev/null +++ b/arch/arm/dts/vf610-colibri.dts @@ -0,0 +1,18 @@ +/* + * Copyright 2014 Toradex AG + * + * SPDX-License-Identifier: GPL-2.0+ or X11 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/dts-v1/; +#include "vf-colibri.dtsi" + +/ { + model = "Toradex Colibri VF61"; + compatible = "toradex,vf610-colibri_vf61", "toradex,vf610-colibri_vf61", "fsl,vf610"; +}; diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index 275befd2f8..5e56cfe8f2 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -145,7 +145,8 @@ const char *get_imx_type(u32 imxtype) int print_cpuinfo(void) { - u32 cpurev, max_freq; + u32 cpurev; + __maybe_unused u32 max_freq; #if defined(CONFIG_MX6) && defined(CONFIG_IMX6_THERMAL) struct udevice *thermal_dev; diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c index e88e6e2a98..7fb23dd027 100644 --- a/arch/arm/imx-common/iomux-v3.c +++ b/arch/arm/imx-common/iomux-v3.c @@ -92,3 +92,29 @@ void imx_iomux_set_gpr_register(int group, int start_bit, reg |= (value << start_bit); writel(reg, base + group * 4); } + +#ifdef CONFIG_IOMUX_SHARE_CONF_REG +void imx_iomux_gpio_set_direction(unsigned int gpio, + unsigned int direction) +{ + u32 reg; + /* + * Only on Vybrid the input/output buffer enable flags + * are part of the shared mux/conf register. + */ + reg = readl(base + (gpio << 2)); + + if (direction) + reg |= 0x2; + else + reg &= ~0x2; + + writel(reg, base + (gpio << 2)); +} + +void imx_iomux_gpio_get_function(unsigned int gpio, u32 *gpio_state) +{ + *gpio_state = readl(base + (gpio << 2)) & + ((0X07 << PAD_MUX_MODE_SHIFT) | PAD_CTL_OBE_IBE_ENABLE); +} +#endif diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index e7395201ad..cb3d2cc06f 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -167,6 +167,7 @@ #define EXYNOS5420_USB_HOST_EHCI_BASE 0x12110000 #define EXYNOS5420_MMC_BASE 0x12200000 #define EXYNOS5420_SROMC_BASE 0x12250000 +#define EXYNOS5420_USB3PHY_BASE 0x12500000 #define EXYNOS5420_UART_BASE 0x12C00000 #define EXYNOS5420_I2C_BASE 0x12C60000 #define EXYNOS5420_I2C_8910_BASE 0x12E00000 @@ -187,7 +188,6 @@ #define EXYNOS5420_FIMD_BASE DEVICE_NOT_AVAILABLE #define EXYNOS5420_ADC_BASE DEVICE_NOT_AVAILABLE #define EXYNOS5420_MODEM_BASE DEVICE_NOT_AVAILABLE -#define EXYNOS5420_USB3PHY_BASE DEVICE_NOT_AVAILABLE #define EXYNOS5420_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE diff --git a/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h b/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h new file mode 100644 index 0000000000..2f53d85283 --- /dev/null +++ b/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h @@ -0,0 +1,83 @@ +/* + * (C) Copyright 2015 + * Texas Instruments Incorporated + * + * Lokesh Vutla <lokeshvutla@ti.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _DRA7_IODELAY_H_ +#define _DRA7_IODELAY_H_ + +#include <common.h> +#include <asm/arch/sys_proto.h> + +/* CONFIG_REG_0 */ +#define CFG_REG_0_OFFSET 0xC +#define CFG_REG_ROM_READ_SHIFT 1 +#define CFG_REG_ROM_READ_MASK (1 << 1) +#define CFG_REG_CALIB_STRT_SHIFT 0 +#define CFG_REG_CALIB_STRT_MASK (1 << 0) +#define CFG_REG_CALIB_STRT 1 +#define CFG_REG_CALIB_END 0 +#define CFG_REG_ROM_READ_START (1 << 1) +#define CFG_REG_ROM_READ_END (0 << 1) + +/* CONFIG_REG_2 */ +#define CFG_REG_2_OFFSET 0x14 +#define CFG_REG_REFCLK_PERIOD_SHIFT 0 +#define CFG_REG_REFCLK_PERIOD_MASK (0xFFFF << 0) +#define CFG_REG_REFCLK_PERIOD 0x2EF + +/* CONFIG_REG_8 */ +#define CFG_REG_8_OFFSET 0x2C +#define CFG_IODELAY_UNLOCK_KEY 0x0000AAAA +#define CFG_IODELAY_LOCK_KEY 0x0000AAAB + +/* CONFIG_REG_3/4 */ +#define CFG_REG_3_OFFSET 0x18 +#define CFG_REG_4_OFFSET 0x1C +#define CFG_REG_DLY_CNT_SHIFT 16 +#define CFG_REG_DLY_CNT_MASK (0xFFFF << 16) +#define CFG_REG_REF_CNT_SHIFT 0 +#define CFG_REG_REF_CNT_MASK (0xFFFF << 0) + +/* CTRL_CORE_SMA_SW_0 */ +#define CTRL_ISOLATE_SHIFT 2 +#define CTRL_ISOLATE_MASK (1 << 2) +#define ISOLATE_IO 1 +#define DEISOLATE_IO 0 + +/* PRM_IO_PMCTRL */ +#define PMCTRL_ISOCLK_OVERRIDE_SHIFT 0 +#define PMCTRL_ISOCLK_OVERRIDE_MASK (1 << 0) +#define PMCTRL_ISOCLK_STATUS_SHIFT 1 +#define PMCTRL_ISOCLK_STATUS_MASK (1 << 1) +#define PMCTRL_ISOCLK_OVERRIDE_CTRL 1 +#define PMCTRL_ISOCLK_NOT_OVERRIDE_CTRL 0 + +#define ERR_CALIBRATE_IODELAY 0x1 +#define ERR_DEISOLATE_IO 0x2 +#define ERR_ISOLATE_IO 0x4 +#define ERR_UPDATE_DELAY 0x8 +#define ERR_CPDE 0x3 +#define ERR_FPDE 0x5 + +/* CFG_XXX */ +#define CFG_X_SIGNATURE_SHIFT 12 +#define CFG_X_SIGNATURE_MASK (0x3F << 12) +#define CFG_X_LOCK_SHIFT 10 +#define CFG_X_LOCK_MASK (0x1 << 10) +#define CFG_X_COARSE_DLY_SHIFT 5 +#define CFG_X_COARSE_DLY_MASK (0x1F << 5) +#define CFG_X_FINE_DLY_SHIFT 0 +#define CFG_X_FINE_DLY_MASK (0x1F << 0) +#define CFG_X_SIGNATURE 0x29 +#define CFG_X_LOCK 1 + +void __recalibrate_iodelay(struct pad_conf_entry const *pad, int npads, + struct iodelay_cfg_entry const *iodelay, + int niodelays); + +#endif diff --git a/arch/arm/include/asm/arch-omap5/mux_dra7xx.h b/arch/arm/include/asm/arch-omap5/mux_dra7xx.h index e1553879d0..2115abb555 100644 --- a/arch/arm/include/asm/arch-omap5/mux_dra7xx.h +++ b/arch/arm/include/asm/arch-omap5/mux_dra7xx.h @@ -26,6 +26,21 @@ #define WKEN (1 << 24) #define WKDIS (0 << 24) +#define PULL_ENA (0 << 16) +#define PULL_DIS (1 << 16) +#define PULL_UP (1 << 17) +#define INPUT_EN (1 << 18) +#define SLEWCONTROL (1 << 19) + +/* Active pin states */ +#define PIN_OUTPUT (0 | PULL_DIS) +#define PIN_OUTPUT_PULLUP (PULL_UP) +#define PIN_OUTPUT_PULLDOWN (0) +#define PIN_INPUT (INPUT_EN | PULL_DIS) +#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL) +#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) +#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) + #define M0 0 #define M1 1 #define M2 2 @@ -43,6 +58,28 @@ #define M14 14 #define M15 15 +#define MODE_SELECT (1 << 8) +#define DELAYMODE_SHIFT 4 + +#define MANUAL_MODE MODE_SELECT + +#define VIRTUAL_MODE0 (MODE_SELECT | (0x0 << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE1 (MODE_SELECT | (0x1 << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE2 (MODE_SELECT | (0x2 << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE3 (MODE_SELECT | (0x3 << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE4 (MODE_SELECT | (0x4 << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE5 (MODE_SELECT | (0x5 << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE6 (MODE_SELECT | (0x6 << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE7 (MODE_SELECT | (0x7 << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE8 (MODE_SELECT | (0x8 << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE9 (MODE_SELECT | (0x9 << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE10 (MODE_SELECT | (0xa << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE11 (MODE_SELECT | (0xb << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE12 (MODE_SELECT | (0xc << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE13 (MODE_SELECT | (0xd << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE14 (MODE_SELECT | (0xe << DELAYMODE_SHIFT)) +#define VIRTUAL_MODE15 (MODE_SELECT | (0xf << DELAYMODE_SHIFT)) + #define SAFE_MODE M15 #define GPMC_AD0 0x000 diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index e844bfb884..68c6d6dc0a 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -216,27 +216,6 @@ struct s32ktimer { #define OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK (0x1 << 10) #define OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK (0x1f << 0) -/* IO Delay module defines */ -#define CFG_IO_DELAY_BASE 0x4844A000 -#define CFG_IO_DELAY_LOCK (CFG_IO_DELAY_BASE + 0x02C) - -/* CPSW IO Delay registers*/ -#define CFG_RGMII0_TXCTL (CFG_IO_DELAY_BASE + 0x74C) -#define CFG_RGMII0_TXD0 (CFG_IO_DELAY_BASE + 0x758) -#define CFG_RGMII0_TXD1 (CFG_IO_DELAY_BASE + 0x764) -#define CFG_RGMII0_TXD2 (CFG_IO_DELAY_BASE + 0x770) -#define CFG_RGMII0_TXD3 (CFG_IO_DELAY_BASE + 0x77C) -#define CFG_VIN2A_D13 (CFG_IO_DELAY_BASE + 0xA7C) -#define CFG_VIN2A_D17 (CFG_IO_DELAY_BASE + 0xAAC) -#define CFG_VIN2A_D16 (CFG_IO_DELAY_BASE + 0xAA0) -#define CFG_VIN2A_D15 (CFG_IO_DELAY_BASE + 0xA94) -#define CFG_VIN2A_D14 (CFG_IO_DELAY_BASE + 0xA88) - -#define CFG_IO_DELAY_UNLOCK_KEY 0x0000AAAA -#define CFG_IO_DELAY_LOCK_KEY 0x0000AAAB -#define CFG_IO_DELAY_ACCESS_PATTERN 0x00029000 -#define CFG_IO_DELAY_LOCK_MASK 0x400 - #ifndef __ASSEMBLY__ struct srcomp_params { s8 divide_factor; @@ -255,9 +234,5 @@ struct ctrl_ioregs { u32 ctrl_ddr_ctrl_ext_0; }; -struct io_delay { - u32 addr; - u32 dly; -}; #endif /* __ASSEMBLY__ */ #endif diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h index ea84665f5b..6da8297c72 100644 --- a/arch/arm/include/asm/arch-omap5/sys_proto.h +++ b/arch/arm/include/asm/arch-omap5/sys_proto.h @@ -18,6 +18,18 @@ DECLARE_GLOBAL_DATA_PTR; +/* + * Structure for Iodelay configuration registers. + * Theoretical max for g_delay is 21560 ps. + * Theoretical max for a_delay is 1/3rd of g_delay max. + * So using u16 for both a/g_delay. + */ +struct iodelay_cfg_entry { + u16 offset; + u16 a_delay; + u16 g_delay; +}; + struct pad_conf_entry { u32 offset; u32 val; @@ -32,6 +44,7 @@ void gpmc_init(void); void watchdog_init(void); u32 get_device_type(void); void do_set_mux(u32 base, struct pad_conf_entry const *array, int size); +void do_set_mux32(u32 base, struct pad_conf_entry const *array, int size); void set_muxconf_regs_essential(void); u32 wait_on_value(u32, u32, void *, u32); void sdelay(unsigned long); diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index b628fee3ea..496295d357 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -157,8 +157,6 @@ enum sunxi_gpio_number { #define SUN5I_GPB_UART0 2 #define SUN8I_GPB_UART2 2 -#define SUNXI_GPC_NAND 2 - #define SUNXI_GPC_SDC2 3 #define SUN6I_GPC_SDC3 4 diff --git a/arch/arm/include/asm/arch-sunxi/nand.h b/arch/arm/include/asm/arch-sunxi/nand.h deleted file mode 100644 index 22844d84b8..0000000000 --- a/arch/arm/include/asm/arch-sunxi/nand.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * (C) Copyright 2015 Roy Spliet <rspliet@ultimaker.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _SUNXI_NAND_H -#define _SUNXI_NAND_H - -#include <linux/types.h> - -struct sunxi_nand -{ - u32 ctl; /* 0x000 Configure and control */ - u32 st; /* 0x004 Status information */ - u32 intr; /* 0x008 Interrupt control */ - u32 timing_ctl; /* 0x00C Timing control */ - u32 timing_cfg; /* 0x010 Timing configure */ - u32 addr_low; /* 0x014 Low word address */ - u32 addr_high; /* 0x018 High word address */ - u32 block_num; /* 0x01C Data block number */ - u32 data_cnt; /* 0x020 Data counter for transfer */ - u32 cmd; /* 0x024 NDFC commands */ - u32 rcmd_set; /* 0x028 Read command set for vendor NAND mem */ - u32 wcmd_set; /* 0x02C Write command set */ - u32 io_data; /* 0x030 IO data */ - u32 ecc_ctl; /* 0x034 ECC configure and control */ - u32 ecc_st; /* 0x038 ECC status and operation info */ - u32 efr; /* 0x03C Enhanced feature */ - u32 err_cnt0; /* 0x040 Corrected error bit counter 0 */ - u32 err_cnt1; /* 0x044 Corrected error bit counter 1 */ - u32 user_data[16]; /* 0x050[16] User data field */ - u32 efnand_st; /* 0x090 EFNAND status */ - u32 res0[3]; - u32 spare_area; /* 0x0A0 Spare area configure */ - u32 pat_id; /* 0x0A4 Pattern ID register */ - u32 rdata_sta_ctl; /* 0x0A8 Read data status control */ - u32 rdata_sta_0; /* 0x0AC Read data status 0 */ - u32 rdata_sta_1; /* 0x0B0 Read data status 1 */ - u32 res1[3]; - u32 mdma_addr; /* 0x0C0 MBUS DMA Address */ - u32 mdma_cnt; /* 0x0C4 MBUS DMA data counter */ -}; - -#define SUNXI_NAND_CTL_EN (1 << 0) -#define SUNXI_NAND_CTL_RST (1 << 1) -#define SUNXI_NAND_CTL_PAGE_SIZE(a) ((fls(a) - 11) << 8) -#define SUNXI_NAND_CTL_RAM_METHOD_DMA (1 << 14) - -#define SUNXI_NAND_ST_CMD_INT (1 << 1) -#define SUNXI_NAND_ST_DMA_INT (1 << 2) -#define SUNXI_NAND_ST_FIFO_FULL (1 << 3) - -#define SUNXI_NAND_CMD_ADDR_CYCLES(a) ((a - 1) << 16); -#define SUNXI_NAND_CMD_SEND_CMD1 (1 << 22) -#define SUNXI_NAND_CMD_WAIT_FLAG (1 << 23) -#define SUNXI_NAND_CMD_ORDER_INTERLEAVE 0 -#define SUNXI_NAND_CMD_ORDER_SEQ (1 << 25) - -#define SUNXI_NAND_ECC_CTL_ECC_EN (1 << 0) -#define SUNXI_NAND_ECC_CTL_PIPELINE (1 << 3) -#define SUNXI_NAND_ECC_CTL_BS_512B (1 << 5) -#define SUNXI_NAND_ECC_CTL_RND_EN (1 << 9) -#define SUNXI_NAND_ECC_CTL_MODE(a) ((a) << 12) -#define SUNXI_NAND_ECC_CTL_RND_SEED(a) ((a) << 16) - -#endif /* _SUNXI_NAND_H */ diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h index 04011ae255..f9dd3c817d 100644 --- a/arch/arm/include/asm/arch-tegra/clock.h +++ b/arch/arm/include/asm/arch-tegra/clock.h @@ -336,4 +336,12 @@ void arch_timer_init(void); void tegra30_set_up_pllp(void); +/** + * Enable output clock for external peripherals + * + * @param clk_id Clock ID to output (1, 2 or 3) + * @return 0 if OK. -ve on error + */ +int clock_external_output(int clk_id); + #endif /* _TEGRA_CLOCK_H_ */ diff --git a/arch/arm/include/asm/arch-tegra/sys_proto.h b/arch/arm/include/asm/arch-tegra/sys_proto.h index 83f9f472c9..b64f9d813b 100644 --- a/arch/arm/include/asm/arch-tegra/sys_proto.h +++ b/arch/arm/include/asm/arch-tegra/sys_proto.h @@ -25,4 +25,11 @@ int tegra_board_id(void); */ int tegra_lcd_pmic_init(int board_id); +/** + * nvidia_board_init() - perform any board-specific init + * + * @return 0 if OK, -ve on error + */ +int nvidia_board_init(void); + #endif diff --git a/arch/arm/include/asm/arch-tegra124/clock-tables.h b/arch/arm/include/asm/arch-tegra124/clock-tables.h index 7005855999..3c67e72afe 100644 --- a/arch/arm/include/asm/arch-tegra124/clock-tables.h +++ b/arch/arm/include/asm/arch-tegra124/clock-tables.h @@ -285,12 +285,12 @@ enum periph_id { /* 184 */ PERIPH_ID_GPU, PERIPH_ID_AMX1, - PERIPH_ID_X_RESERVED26, - PERIPH_ID_X_RESERVED27, - PERIPH_ID_X_RESERVED28, - PERIPH_ID_X_RESERVED29, - PERIPH_ID_X_RESERVED30, - PERIPH_ID_X_RESERVED31, + PERIPH_ID_AFC5, + PERIPH_ID_AFC4, + PERIPH_ID_AFC3, + PERIPH_ID_AFC2, + PERIPH_ID_AFC1, + PERIPH_ID_AFC0, PERIPH_ID_COUNT, PERIPH_ID_NONE = -1, diff --git a/arch/arm/include/asm/arch-tegra124/flow.h b/arch/arm/include/asm/arch-tegra124/flow.h index d6f515f1e9..7818b1bd34 100644 --- a/arch/arm/include/asm/arch-tegra124/flow.h +++ b/arch/arm/include/asm/arch-tegra124/flow.h @@ -26,6 +26,12 @@ struct flow_ctlr { u32 cpu_pwr_csr; /* offset 0x38 */ u32 mpid; /* offset 0x3c */ u32 ram_repair; /* offset 0x40 */ + u32 flow_dbg_sel; /* offset 0x44 */ + u32 flow_dbg_cnt0; /* offset 0x48 */ + u32 flow_dbg_cnt1; /* offset 0x4c */ + u32 flow_dbg_qual; /* offset 0x50 */ + u32 flow_ctlr_spare; /* offset 0x54 */ + u32 ram_repair_cluster1;/* offset 0x58 */ }; /* HALT_COP_EVENTS_0, 0x04 */ @@ -43,4 +49,10 @@ struct flow_ctlr { #define CSR_WAIT_WFI_SHIFT 8 #define CSR_PWR_OFF_STS (1 << 16) +/* RAM_REPAIR, 0x40, 0x58 */ +enum { + RAM_REPAIR_REQ = 0x1 << 0, + RAM_REPAIR_STS = 0x1 << 1, +}; + #endif /* _TEGRA124_FLOW_H_ */ diff --git a/arch/arm/include/asm/arch-vf610/clock.h b/arch/arm/include/asm/arch-vf610/clock.h index 535adadd79..e5a5c6d28f 100644 --- a/arch/arm/include/asm/arch-vf610/clock.h +++ b/arch/arm/include/asm/arch-vf610/clock.h @@ -17,6 +17,7 @@ enum mxc_clock { MXC_ESDHC_CLK, MXC_FEC_CLK, MXC_I2C_CLK, + MXC_DSPI_CLK, }; void enable_ocotp_clk(unsigned char enable); diff --git a/arch/arm/include/asm/arch-vf610/crm_regs.h b/arch/arm/include/asm/arch-vf610/crm_regs.h index bc6db2a5a5..fdb45e9954 100644 --- a/arch/arm/include/asm/arch-vf610/crm_regs.h +++ b/arch/arm/include/asm/arch-vf610/crm_regs.h @@ -189,6 +189,8 @@ struct anadig_reg { #define CCM_REG_CTRL_MASK 0xffffffff #define CCM_CCGR0_UART0_CTRL_MASK (0x3 << 14) #define CCM_CCGR0_UART1_CTRL_MASK (0x3 << 16) +#define CCM_CCGR0_DSPI0_CTRL_MASK (0x3 << 24) +#define CCM_CCGR0_DSPI1_CTRL_MASK (0x3 << 26) #define CCM_CCGR1_USBC0_CTRL_MASK (0x3 << 8) #define CCM_CCGR1_PIT_CTRL_MASK (0x3 << 14) #define CCM_CCGR1_WDOGA5_CTRL_MASK (0x3 << 28) @@ -206,6 +208,8 @@ struct anadig_reg { #define CCM_CCGR4_GPC_CTRL_MASK (0x3 << 24) #define CCM_CCGR4_I2C0_CTRL_MASK (0x3 << 12) #define CCM_CCGR6_OCOTP_CTRL_MASK (0x3 << 10) +#define CCM_CCGR6_DSPI2_CTRL_MASK (0x3 << 24) +#define CCM_CCGR6_DSPI3_CTRL_MASK (0x3 << 26) #define CCM_CCGR6_DDRMC_CTRL_MASK (0x3 << 28) #define CCM_CCGR7_SDHC1_CTRL_MASK (0x3 << 4) #define CCM_CCGR7_USBC1_CTRL_MASK (0x3 << 8) diff --git a/arch/arm/include/asm/arch-vf610/gpio.h b/arch/arm/include/asm/arch-vf610/gpio.h new file mode 100644 index 0000000000..622b8f0dea --- /dev/null +++ b/arch/arm/include/asm/arch-vf610/gpio.h @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2015 + * Bhuvanchandra DV, Toradex, Inc. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __ASM_ARCH_VF610_GPIO_H +#define __ASM_ARCH_VF610_GPIO_H + +#define VYBRID_GPIO_COUNT 32 +#define VF610_GPIO_DIRECTION_IN 0x0 +#define VF610_GPIO_DIRECTION_OUT 0x1 + +/* GPIO registers */ +struct vybrid_gpio_regs { + u32 gpio_pdor; + u32 gpio_psor; + u32 gpio_pcor; + u32 gpio_ptor; + u32 gpio_pdir; +}; + +struct vybrid_gpio_platdata { + unsigned int chip; + u32 base; + const char *port_name; +}; +#endif /* __ASM_ARCH_VF610_GPIO_H */ diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h index 202198133c..7df3b1e392 100644 --- a/arch/arm/include/asm/arch-vf610/imx-regs.h +++ b/arch/arm/include/asm/arch-vf610/imx-regs.h @@ -81,6 +81,11 @@ #define VREG_DIG_BASE_ADDR (AIPS0_BASE_ADDR + 0x0006D000) #define SRC_BASE_ADDR (AIPS0_BASE_ADDR + 0x0006E000) #define CMU_BASE_ADDR (AIPS0_BASE_ADDR + 0x0006F000) +#define GPIO0_BASE_ADDR (AIPS0_BASE_ADDR + 0x000FF000) +#define GPIO1_BASE_ADDR (AIPS0_BASE_ADDR + 0x000FF040) +#define GPIO2_BASE_ADDR (AIPS0_BASE_ADDR + 0x000FF080) +#define GPIO3_BASE_ADDR (AIPS0_BASE_ADDR + 0x000FF0C0) +#define GPIO4_BASE_ADDR (AIPS0_BASE_ADDR + 0x000FF100) /* AIPS 1 */ #define OCOTP_BASE_ADDR (AIPS1_BASE_ADDR + 0x00025000) diff --git a/arch/arm/include/asm/arch-vf610/iomux-vf610.h b/arch/arm/include/asm/arch-vf610/iomux-vf610.h index 9226e69fec..019307b2f9 100644 --- a/arch/arm/include/asm/arch-vf610/iomux-vf610.h +++ b/arch/arm/include/asm/arch-vf610/iomux-vf610.h @@ -32,22 +32,61 @@ #define VF610_QSPI_PAD_CTRL (PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_150ohm | \ PAD_CTL_PUS_22K_UP | PAD_CTL_OBE_IBE_ENABLE) +#define VF610_GPIO_PAD_CTRL (PAD_CTL_SPEED_MED | PAD_CTL_DSE_50ohm | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_IBE_ENABLE) + +#define VF610_DSPI_PAD_CTRL (PAD_CTL_OBE_ENABLE | PAD_CTL_DSE_20ohm | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH) +#define VF610_DSPI_SIN_PAD_CTRL (PAD_CTL_IBE_ENABLE | PAD_CTL_DSE_20ohm | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH) + enum { VF610_PAD_PTA6__RMII0_CLKIN = IOMUX_PAD(0x0000, 0x0000, 2, __NA_, 0, VF610_ENET_PAD_CTRL), VF610_PAD_PTA6__RMII0_CLKOUT = IOMUX_PAD(0x0000, 0x0000, 1, __NA_, 0, VF610_ENET_PAD_CTRL), + VF610_PAD_PTA7__GPIO_134 = IOMUX_PAD(0x0218, 0x0218, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTA17__GPIO_7 = IOMUX_PAD(0x001c, 0x001c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTA20__GPIO_10 = IOMUX_PAD(0x0028, 0x0028, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTA21__GPIO_11 = IOMUX_PAD(0x002c, 0x002c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTA30__GPIO_20 = IOMUX_PAD(0x0050, 0x0050, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTA31__GPIO_21 = IOMUX_PAD(0x0054, 0x0054, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB0__GPIO_22 = IOMUX_PAD(0x0058, 0x0058, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB1__GPIO_23 = IOMUX_PAD(0x005C, 0x005C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTB4__UART1_TX = IOMUX_PAD(0x0068, 0x0068, 2, 0x0380, 0, VF610_UART_PAD_CTRL), VF610_PAD_PTB5__UART1_RX = IOMUX_PAD(0x006c, 0x006c, 2, 0x037c, 0, VF610_UART_PAD_CTRL), + VF610_PAD_PTB6__GPIO_28 = IOMUX_PAD(0x0070, 0x0070, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB7__GPIO_29 = IOMUX_PAD(0x0074, 0x0074, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB8__GPIO_30 = IOMUX_PAD(0x0078, 0x0078, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB9__GPIO_31 = IOMUX_PAD(0x007C, 0x007C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTB10__UART0_TX = IOMUX_PAD(0x0080, 0x0080, 1, __NA_, 0, VF610_UART_PAD_CTRL), VF610_PAD_PTB11__UART0_RX = IOMUX_PAD(0x0084, 0x0084, 1, __NA_, 0, VF610_UART_PAD_CTRL), + VF610_PAD_PTB12__GPIO_34 = IOMUX_PAD(0x0088, 0x0088, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB13__GPIO_35 = IOMUX_PAD(0x008c, 0x008c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB16__GPIO_38 = IOMUX_PAD(0x0098, 0x0098, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB17__GPIO_39 = IOMUX_PAD(0x009c, 0x009c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB18__GPIO_40 = IOMUX_PAD(0x00a0, 0x00a0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB21__GPIO_43 = IOMUX_PAD(0x00ac, 0x00ac, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB22__GPIO_44 = IOMUX_PAD(0x00b0, 0x00b0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB23__GPIO_93 = IOMUX_PAD(0x0174, 0x0174, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB26__GPIO_96 = IOMUX_PAD(0x0180, 0x0180, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTB28__GPIO_98 = IOMUX_PAD(0x0188, 0x0188, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTC1__GPIO_46 = IOMUX_PAD(0x00b8, 0x00b8, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTC1__RMII0_MDIO = IOMUX_PAD(0x00b8, 0x00b8, 1, __NA_, 0, VF610_ENET_PAD_CTRL), + VF610_PAD_PTC0__GPIO_45 = IOMUX_PAD(0x00b4, 0x00b4, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTC0__RMII0_MDC = IOMUX_PAD(0x00b4, 0x00b4, 1, __NA_, 0, VF610_ENET_PAD_CTRL), VF610_PAD_PTC2__RMII0_CRS_DV = IOMUX_PAD(0x00bc, 0x00bc, 1, __NA_, 0, VF610_ENET_PAD_CTRL), + VF610_PAD_PTC2__GPIO_47 = IOMUX_PAD(0x00bc, 0x00bc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTC3__RMII0_RD1 = IOMUX_PAD(0x00c0, 0x00c0, 1, __NA_, 0, VF610_ENET_PAD_CTRL), + VF610_PAD_PTC3__GPIO_48 = IOMUX_PAD(0x00c0, 0x00c0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTC4__RMII0_RD0 = IOMUX_PAD(0x00c4, 0x00c4, 1, __NA_, 0, VF610_ENET_PAD_CTRL), + VF610_PAD_PTC4__GPIO_49 = IOMUX_PAD(0x00c4, 0x00c4, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTC5__RMII0_RXER = IOMUX_PAD(0x00c8, 0x00c8, 1, __NA_, 0, VF610_ENET_PAD_CTRL), + VF610_PAD_PTC5__GPIO_50 = IOMUX_PAD(0x00c8, 0x00c8, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTC6__RMII0_TD1 = IOMUX_PAD(0x00cc, 0x00cc, 1, __NA_, 0, VF610_ENET_PAD_CTRL), + VF610_PAD_PTC6__GPIO_51 = IOMUX_PAD(0x00cc, 0x00cc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTC7__RMII0_TD0 = IOMUX_PAD(0x00D0, 0x00D0, 1, __NA_, 0, VF610_ENET_PAD_CTRL), + VF610_PAD_PTC7__GPIO_52 = IOMUX_PAD(0x00D0, 0x00D0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTC8__RMII0_TXEN = IOMUX_PAD(0x00D4, 0x00D4, 1, __NA_, 0, VF610_ENET_PAD_CTRL), + VF610_PAD_PTC8__GPIO_53 = IOMUX_PAD(0x00D4, 0x00D4, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTC10__RMII1_MDIO = IOMUX_PAD(0x00dc, 0x00dc, 1, __NA_, 0, VF610_ENET_PAD_CTRL), VF610_PAD_PTC9__RMII1_MDC = IOMUX_PAD(0x00d8, 0x00d8, 1, __NA_, 0, VF610_ENET_PAD_CTRL), VF610_PAD_PTC11__RMII1_CRS_DV = IOMUX_PAD(0x00e0, 0x00e0, 1, __NA_, 0, VF610_ENET_PAD_CTRL), @@ -57,6 +96,12 @@ enum { VF610_PAD_PTC15__RMII1_TD1 = IOMUX_PAD(0x00f0, 0x00f0, 1, __NA_, 0, VF610_ENET_PAD_CTRL), VF610_PAD_PTC16__RMII1_TD0 = IOMUX_PAD(0x00f4, 0x00f4, 1, __NA_, 0, VF610_ENET_PAD_CTRL), VF610_PAD_PTC17__RMII1_TXEN = IOMUX_PAD(0x00f8, 0x00f8, 1, __NA_, 0, VF610_ENET_PAD_CTRL), + VF610_PAD_PTD5__DSPI1_CS0 = IOMUX_PAD(0x0150, 0x0150, 3, 0x300, 1, VF610_DSPI_PAD_CTRL), + VF610_PAD_PTD6__DSPI1_SIN = IOMUX_PAD(0x0154, 0x0154, 3, 0x2fc, 1, VF610_DSPI_SIN_PAD_CTRL), + VF610_PAD_PTD7__DSPI1_SOUT = IOMUX_PAD(0x0158, 0x0158, 3, __NA_, 0, VF610_DSPI_PAD_CTRL), + VF610_PAD_PTD8__DSPI1_SCK = IOMUX_PAD(0x015c, 0x015c, 3, 0x2f8, 1, VF610_DSPI_PAD_CTRL), + VF610_PAD_PTC29__GPIO_102 = IOMUX_PAD(0x0198, 0x0198, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTC30__GPIO_103 = IOMUX_PAD(0x019c, 0x019c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTA24__ESDHC1_CLK = IOMUX_PAD(0x0038, 0x0038, 5, __NA_, 0, VF610_SDHC_PAD_CTRL), VF610_PAD_PTA25__ESDHC1_CMD = IOMUX_PAD(0x003c, 0x003c, 5, __NA_, 0, VF610_SDHC_PAD_CTRL), VF610_PAD_PTA26__ESDHC1_DAT0 = IOMUX_PAD(0x0040, 0x0040, 5, __NA_, 0, VF610_SDHC_PAD_CTRL), @@ -66,26 +111,40 @@ enum { VF610_PAD_PTB14__I2C0_SCL = IOMUX_PAD(0x0090, 0x0090, 2, 0x033c, 1, VF610_I2C_PAD_CTRL), VF610_PAD_PTB15__I2C0_SDA = IOMUX_PAD(0x0094, 0x0094, 2, 0x0340, 1, VF610_I2C_PAD_CTRL), VF610_PAD_PTD31__NF_IO15 = IOMUX_PAD(0x00fc, 0x00fc, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), + VF610_PAD_PTD31__GPIO_63 = IOMUX_PAD(0x00fc, 0x00fc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD30__NF_IO14 = IOMUX_PAD(0x0100, 0x0100, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), + VF610_PAD_PTD30__GPIO_64 = IOMUX_PAD(0x0100, 0x0100, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD29__NF_IO13 = IOMUX_PAD(0x0104, 0x0104, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), + VF610_PAD_PTD29__GPIO_65 = IOMUX_PAD(0x0104, 0x0104, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD28__NF_IO12 = IOMUX_PAD(0x0108, 0x0108, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), + VF610_PAD_PTD28__GPIO_66 = IOMUX_PAD(0x0108, 0x0108, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD27__NF_IO11 = IOMUX_PAD(0x010c, 0x010c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), + VF610_PAD_PTD27__GPIO_67 = IOMUX_PAD(0x010c, 0x010c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD26__NF_IO10 = IOMUX_PAD(0x0110, 0x0110, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), + VF610_PAD_PTD26__GPIO_68 = IOMUX_PAD(0x0110, 0x0110, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD25__NF_IO9 = IOMUX_PAD(0x0114, 0x0114, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), + VF610_PAD_PTD25__GPIO_69 = IOMUX_PAD(0x0114, 0x0114, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD24__NF_IO8 = IOMUX_PAD(0x0118, 0x0118, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), + VF610_PAD_PTD24__GPIO_70 = IOMUX_PAD(0x0118, 0x0118, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD23__NF_IO7 = IOMUX_PAD(0x011c, 0x011c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), VF610_PAD_PTD0__QSPI0_A_QSCK = IOMUX_PAD(0x013c, 0x013c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), VF610_PAD_PTD1__QSPI0_A_CS0 = IOMUX_PAD(0x0140, 0x0140, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), VF610_PAD_PTD2__QSPI0_A_DATA3 = IOMUX_PAD(0x0144, 0x0144, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), VF610_PAD_PTD3__QSPI0_A_DATA2 = IOMUX_PAD(0x0148, 0x0148, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), + VF610_PAD_PTD4__GPIO_83 = IOMUX_PAD(0x014C, 0x014C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD4__QSPI0_A_DATA1 = IOMUX_PAD(0x014c, 0x014c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), VF610_PAD_PTD5__QSPI0_A_DATA0 = IOMUX_PAD(0x0150, 0x0150, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), VF610_PAD_PTD7__QSPI0_B_QSCK = IOMUX_PAD(0x0158, 0x0158, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), VF610_PAD_PTD8__QSPI0_B_CS0 = IOMUX_PAD(0x015c, 0x015c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), VF610_PAD_PTD9__QSPI0_B_DATA3 = IOMUX_PAD(0x0160, 0x0160, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), + VF610_PAD_PTD9__GPIO_88 = IOMUX_PAD(0x0160, 0x0160, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD10__QSPI0_B_DATA2 = IOMUX_PAD(0x0164, 0x0164, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), + VF610_PAD_PTD10__GPIO_89 = IOMUX_PAD(0x0164, 0x0164, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD11__QSPI0_B_DATA1 = IOMUX_PAD(0x0168, 0x0168, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), + VF610_PAD_PTD11__GPIO_90 = IOMUX_PAD(0x0168, 0x0168, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD12__QSPI0_B_DATA0 = IOMUX_PAD(0x016c, 0x016c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), + VF610_PAD_PTD12__GPIO_91 = IOMUX_PAD(0x016c, 0x016c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTD13__GPIO_92 = IOMUX_PAD(0x0170, 0x0170, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD22__NF_IO6 = IOMUX_PAD(0x0120, 0x0120, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), VF610_PAD_PTD21__NF_IO5 = IOMUX_PAD(0x0124, 0x0124, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), VF610_PAD_PTD20__NF_IO4 = IOMUX_PAD(0x0128, 0x0128, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h index 7a545ea01a..7986e6e794 100644 --- a/arch/arm/include/asm/emif.h +++ b/arch/arm/include/asm/emif.h @@ -44,6 +44,8 @@ #define EMIF_REG_DUAL_CLK_MODE_MASK (1 << 30) #define EMIF_REG_FAST_INIT_SHIFT 29 #define EMIF_REG_FAST_INIT_MASK (1 << 29) +#define EMIF_REG_LEVLING_TO_SHIFT 4 +#define EMIF_REG_LEVELING_TO_MASK (7 << 4) #define EMIF_REG_PHY_DLL_READY_SHIFT 2 #define EMIF_REG_PHY_DLL_READY_MASK (1 << 2) @@ -509,6 +511,13 @@ #define EMIF_REG_RDWRLVLINC_RMP_WIN_SHIFT 0 #define EMIF_REG_RDWRLVLINC_RMP_WIN_MASK (0x1FFF << 0) +/* EMIF_PHY_CTRL_36 */ +#define EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR (1 << 8) + +#define PHY_RDDQS_RATIO_REGS 5 +#define PHY_FIFO_WE_SLAVE_RATIO_REGS 5 +#define PHY_REG_WR_DQ_SLAVE_RATIO_REGS 10 + /*Leveling Fields */ #define DDR3_WR_LVL_INT 0x73 #define DDR3_RD_LVL_INT 0x33 @@ -1200,12 +1209,10 @@ static inline u32 get_emif_rev(u32 base) * which is typically the case. So it is sufficient to get * SDRAM type from EMIF1. */ -static inline u32 emif_sdram_type(void) +static inline u32 emif_sdram_type(u32 sdram_config) { - struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE; - - return (readl(&emif->emif_sdram_config) & - EMIF_REG_SDRAM_TYPE_MASK) >> EMIF_REG_SDRAM_TYPE_SHIFT; + return (sdram_config & EMIF_REG_SDRAM_TYPE_MASK) + >> EMIF_REG_SDRAM_TYPE_SHIFT; } /* assert macros */ @@ -1235,6 +1242,5 @@ extern u32 *const T_den; #endif void config_data_eye_leveling_samples(u32 emif_base); -u32 emif_sdram_type(void); const struct read_write_regs *get_bug_regs(u32 *iterations); #endif diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h b/arch/arm/include/asm/imx-common/iomux-v3.h index e0a49be4ff..258101949a 100644 --- a/arch/arm/include/asm/imx-common/iomux-v3.h +++ b/arch/arm/include/asm/imx-common/iomux-v3.h @@ -187,6 +187,12 @@ void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list, */ void imx_iomux_set_gpr_register(int group, int start_bit, int num_bits, int value); +#ifdef CONFIG_IOMUX_SHARE_CONF_REG +void imx_iomux_gpio_set_direction(unsigned int gpio, + unsigned int direction); +void imx_iomux_gpio_get_function(unsigned int gpio, + u32 *gpio_state); +#endif /* macros for declaring and using pinmux array */ #if defined(CONFIG_MX6QDL) diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index b0296fbae6..5469435cc7 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -313,6 +313,7 @@ struct prcm_regs { u32 prm_rstctrl; u32 prm_rstst; u32 prm_rsttime; + u32 prm_io_pmctrl; u32 prm_vc_val_bypass; u32 prm_vc_cfg_i2c_mode; u32 prm_vc_cfg_i2c_clk; @@ -344,6 +345,10 @@ struct prcm_regs { /* GMAC Clk Ctrl */ u32 cm_gmac_gmac_clkctrl; u32 cm_gmac_clkstctrl; + + /* IPU */ + u32 cm_ipu_clkstctrl; + u32 cm_ipu_i2c5_clkctrl; }; struct omap_sys_ctrl_regs { @@ -455,6 +460,8 @@ struct omap_sys_ctrl_regs { u32 control_efuse_12; u32 control_efuse_13; u32 control_padconf_wkup_base; + u32 iodelay_config_base; + u32 ctrl_core_sma_sw_0; }; struct dpll_params { @@ -583,6 +590,7 @@ s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb); void usb_fake_mac_from_die_id(u32 *id); void usb_set_serial_num_from_die_id(u32 *id); +void recalibrate_iodelay(void); void omap_smc1(u32 service, u32 val); @@ -622,12 +630,19 @@ static inline u8 is_omap54xx(void) } #define DRA7XX 0x07000000 +#define DRA72X 0x07200000 static inline u8 is_dra7xx(void) { extern u32 *const omap_si_rev; return ((*omap_si_rev & 0xFF000000) == DRA7XX); } + +static inline u8 is_dra72x(void) +{ + extern u32 *const omap_si_rev; + return (*omap_si_rev & 0xFFF00000) == DRA72X; +} #endif /* diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig index 99779df728..2315a13438 100644 --- a/arch/arm/mach-bcm283x/Kconfig +++ b/arch/arm/mach-bcm283x/Kconfig @@ -15,9 +15,6 @@ config TARGET_RPI_2 endchoice -config PHYS_TO_BUS - default y - config SYS_BOARD default "rpi" if TARGET_RPI default "rpi_2" if TARGET_RPI_2 diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c index d13fbc1a4b..625907fcda 100644 --- a/arch/arm/mach-keystone/clock.c +++ b/arch/arm/mach-keystone/clock.c @@ -246,18 +246,18 @@ static inline u32 read_efuse_bootrom(void) } #endif -inline int get_max_dev_speed(void) -{ - return get_max_speed(read_efuse_bootrom() & 0xffff, dev_speeds); -} - #ifndef CONFIG_SOC_K2E inline int get_max_arm_speed(void) { - return get_max_speed((read_efuse_bootrom() >> 16) & 0xffff, arm_speeds); + return get_max_speed(read_efuse_bootrom() & 0xffff, arm_speeds); } #endif +inline int get_max_dev_speed(void) +{ + return get_max_speed((read_efuse_bootrom() >> 16) & 0xffff, dev_speeds); +} + void pass_pll_pa_clk_enable(void) { u32 reg; diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 04681fc5a0..0121db8bb5 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -7,6 +7,7 @@ #include <common.h> #include <netdev.h> #include <asm/io.h> +#include <asm/pl310.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -160,10 +161,17 @@ static void update_sdram_window_sizes(void) } #ifdef CONFIG_ARCH_CPU_INIT +static void set_cbar(u32 addr) +{ + asm("mcr p15, 4, %0, c15, c0" : : "r" (addr)); +} + + int arch_cpu_init(void) { /* Linux expects the internal registers to be at 0xf1000000 */ writel(SOC_REGS_PHY_BASE, INTREG_BASE_ADDR_REG); + set_cbar(SOC_REGS_PHY_BASE + 0xC000); /* * We need to call mvebu_mbus_probe() before calling @@ -240,6 +248,13 @@ int cpu_eth_init(bd_t *bis) #ifndef CONFIG_SYS_DCACHE_OFF void enable_caches(void) { + struct pl310_regs *const pl310 = + (struct pl310_regs *)CONFIG_SYS_PL310_BASE; + + /* First disable L2 cache - may still be enable from BootROM */ + if (mvebu_soc_family() == MVEBU_SOC_A38X) + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); + /* Avoid problem with e.g. neta ethernet driver */ invalidate_dcache_all(); diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 9b42871935..54bd648ed7 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -21,12 +21,6 @@ endchoice config SYS_MALLOC_F_LEN default 0x1800 -config USE_PRIVATE_LIBGCC - default y - -config SPL_DM - default y - source "arch/arm/mach-tegra/tegra20/Kconfig" source "arch/arm/mach-tegra/tegra30/Kconfig" source "arch/arm/mach-tegra/tegra114/Kconfig" diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 131802ae62..ce9b6959ef 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -107,6 +107,11 @@ __weak int tegra_lcd_pmic_init(int board_it) return 0; } +__weak int nvidia_board_init(void) +{ + return 0; +} + /* * Routine: board_init * Description: Early hardware init. @@ -156,7 +161,6 @@ int board_init(void) #ifdef CONFIG_USB_EHCI_TEGRA pin_mux_usb(); - usb_process_devicetree(gd->fdt_blob); #endif #ifdef CONFIG_LCD @@ -180,8 +184,7 @@ int board_init(void) /* prepare the WB code to LP0 location */ warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE); #endif - - return 0; + return nvidia_board_init(); } #ifdef CONFIG_BOARD_EARLY_INIT_F diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index cdd54388c5..24047b8c82 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -17,11 +17,13 @@ /* Tegra SoC common clock control functions */ #include <common.h> +#include <errno.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/tegra.h> #include <asm/arch-tegra/ap.h> #include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/pmc.h> #include <asm/arch-tegra/timer.h> #include <div64.h> #include <fdtdec.h> @@ -82,7 +84,7 @@ static struct clk_pll *get_pll(enum clock_id clkid) assert(clock_id_is_pll(clkid)); if (clkid >= (enum clock_id)TEGRA_CLK_PLLS) { - debug("%s: Invalid PLL\n", __func__); + debug("%s: Invalid PLL %d\n", __func__, clkid); return NULL; } return &clkrst->crc_pll[clkid]; @@ -118,9 +120,12 @@ int clock_ll_read_pll(enum clock_id clkid, u32 *divm, u32 *divn, unsigned long clock_start_pll(enum clock_id clkid, u32 divm, u32 divn, u32 divp, u32 cpcon, u32 lfcon) { - struct clk_pll *pll = get_pll(clkid); + struct clk_pll *pll = NULL; u32 misc_data, data; + if (clkid < (enum clock_id)TEGRA_CLK_PLLS) + pll = get_pll(clkid); + /* * We cheat by treating all PLL (except PLLU) in the same fashion. * This works only because: @@ -702,3 +707,18 @@ void tegra30_set_up_pllp(void) set_avp_clock_source(SCLK_SOURCE_PLLP_OUT4); } + +int clock_external_output(int clk_id) +{ + struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + + if (clk_id >= 1 && clk_id <= 3) { + setbits_le32(&pmc->pmc_clk_out_cntrl, + 1 << (2 + (clk_id - 1) * 8)); + } else { + printf("%s: Unknown output clock id %d\n", __func__, clk_id); + return -EINVAL; + } + + return 0; +} diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c index 6331cd40fd..30ae036bff 100644 --- a/arch/arm/mach-tegra/powergate.c +++ b/arch/arm/mach-tegra/powergate.c @@ -9,7 +9,7 @@ #include <asm/io.h> #include <asm/types.h> - +#include <asm/arch/flow.h> #include <asm/arch/powergate.h> #include <asm/arch/tegra.h> @@ -75,11 +75,29 @@ static int tegra_powergate_remove_clamping(enum tegra_powergate id) return 0; } +static void tegra_powergate_ram_repair(void) +{ +#ifdef CONFIG_TEGRA124 + struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; + + /* Request RAM repair for cluster 0 and wait until complete */ + setbits_le32(&flow->ram_repair, RAM_REPAIR_REQ); + while (!(readl(&flow->ram_repair) & RAM_REPAIR_STS)) + ; + + /* Same for cluster 1 */ + setbits_le32(&flow->ram_repair_cluster1, RAM_REPAIR_REQ); + while (!(readl(&flow->ram_repair_cluster1) & RAM_REPAIR_STS)) + ; +#endif +} + int tegra_powergate_sequence_power_up(enum tegra_powergate id, enum periph_id periph) { int err; + tegra_powergate_ram_repair(); reset_set_enable(periph, 1); err = tegra_powergate_power_on(id); diff --git a/arch/arm/mach-tegra/tegra124/Kconfig b/arch/arm/mach-tegra/tegra124/Kconfig index 6579e3f30c..f3324ffaa8 100644 --- a/arch/arm/mach-tegra/tegra124/Kconfig +++ b/arch/arm/mach-tegra/tegra124/Kconfig @@ -10,7 +10,7 @@ config TARGET_JETSON_TK1 select CPU_V7_HAS_VIRT if !SPL_BUILD config TARGET_NYAN_BIG - bool "Google/NVIDIA Nyan-big Chrombook" + bool "Google/NVIDIA Nyan-big Chromebook" help Nyan Big is a Tegra124 clamshell board that is very similar to venice2, but it has a different panel, the sdcard CD and WP diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c index 2d17550f73..b9558484b0 100644 --- a/arch/arm/mach-tegra/tegra124/clock.c +++ b/arch/arm/mach-tegra/tegra124/clock.c @@ -475,7 +475,7 @@ static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = { PERIPHC_ACTMON, /* 120 */ - NONE(EXTPERIPH1), + PERIPHC_EXTPERIPH1, NONE(EXTPERIPH2), NONE(EXTPERIPH3), NONE(OOB), diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index c69654c993..eb3377486f 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -17,35 +17,14 @@ config TARGET_ATNGW100MKII config TARGET_ATSTK1002 bool "Support atstk1002" -config TARGET_ATSTK1003 - bool "Support atstk1003" - -config TARGET_ATSTK1004 - bool "Support atstk1004" - -config TARGET_ATSTK1006 - bool "Support atstk1006" - -config TARGET_FAVR_32_EZKIT - bool "Support favr-32-ezkit" - config TARGET_GRASSHOPPER bool "Support grasshopper" -config TARGET_MIMC200 - bool "Support mimc200" - -config TARGET_HAMMERHEAD - bool "Support hammerhead" - endchoice source "board/atmel/atngw100/Kconfig" source "board/atmel/atngw100mkii/Kconfig" source "board/atmel/atstk1000/Kconfig" -source "board/earthlcd/favr-32-ezkit/Kconfig" source "board/in-circuit/grasshopper/Kconfig" -source "board/mimc/mimc200/Kconfig" -source "board/miromico/hammerhead/Kconfig" endmenu diff --git a/arch/avr32/lib/Makefile b/arch/avr32/lib/Makefile index 6750913630..8108ae5272 100644 --- a/arch/avr32/lib/Makefile +++ b/arch/avr32/lib/Makefile @@ -8,9 +8,6 @@ # obj-y += memset.o -ifndef CONFIG_SYS_GENERIC_BOARD -obj-y += board.o -endif obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-y += interrupts.o obj-y += dram_init.o diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c deleted file mode 100644 index aacfcbf69a..0000000000 --- a/arch/avr32/lib/board.c +++ /dev/null @@ -1,256 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <command.h> -#include <malloc.h> -#include <stdio_dev.h> -#include <version.h> -#include <net.h> - -#ifdef CONFIG_BITBANGMII -#include <miiphy.h> -#endif - -#include <asm/sections.h> -#include <asm/arch/mmu.h> -#include <asm/arch/hardware.h> - -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - -#ifdef CONFIG_GENERIC_ATMEL_MCI -#include <mmc.h> -#endif -DECLARE_GLOBAL_DATA_PTR; - -unsigned long monitor_flash_len; - -__weak void dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = gd->ram_size; -} - -/* Weak aliases for optional board functions */ -static int __do_nothing(void) -{ - return 0; -} -int board_postclk_init(void) __attribute__((weak, alias("__do_nothing"))); -int board_early_init_r(void) __attribute__((weak, alias("__do_nothing"))); - -static int init_baudrate(void) -{ - gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); - return 0; -} - -static int display_banner (void) -{ - printf ("\n\n%s\n\n", version_string); - printf ("U-Boot code: %08lx -> %08lx data: %08lx -> %08lx\n", - (unsigned long)_text, (unsigned long)_etext, - (unsigned long)_data, (unsigned long)(&__bss_end)); - return 0; -} - -static int display_dram_config (void) -{ - int i; - - puts ("DRAM Configuration:\n"); - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - printf ("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); - print_size (gd->bd->bi_dram[i].size, "\n"); - } - - return 0; -} - -static void display_flash_config (void) -{ - puts ("Flash: "); - print_size(gd->bd->bi_flashsize, " "); - printf("at address 0x%08lx\n", gd->bd->bi_flashstart); -} - -void board_init_f(ulong board_type) -{ - gd_t gd_data; - gd_t *new_gd; - bd_t *bd; - unsigned long *new_sp; - unsigned long monitor_len; - unsigned long monitor_addr; - unsigned long addr; - - /* Initialize the global data pointer */ - memset(&gd_data, 0, sizeof(gd_data)); - gd = &gd_data; - - /* Perform initialization sequence */ - board_early_init_f(); - arch_cpu_init(); - board_postclk_init(); - env_init(); - init_baudrate(); - serial_init(); - console_init_f(); - display_banner(); - dram_init(); - - /* If we have no SDRAM, we can't go on */ - if (gd->ram_size <= 0) - panic("No working SDRAM available\n"); - - /* - * Now that we have DRAM mapped and working, we can - * relocate the code and continue running from DRAM. - * - * Reserve memory at end of RAM for (top down in that order): - * - u-boot image - * - heap for malloc() - * - board info struct - * - global data struct - * - stack - */ - addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size; - monitor_len = (char *)(&__bss_end) - _text; - - /* - * Reserve memory for u-boot code, data and bss. - * Round down to next 4 kB limit. - */ - addr -= monitor_len; - addr &= ~(4096UL - 1); - monitor_addr = addr; - - /* Reserve memory for malloc() */ - addr -= CONFIG_SYS_MALLOC_LEN; - -#ifdef CONFIG_LCD -#ifdef CONFIG_FB_ADDR - printf("LCD: Frame buffer allocated at preset 0x%08x\n", - CONFIG_FB_ADDR); - gd->fb_base = CONFIG_FB_ADDR; -#else - addr = lcd_setmem(addr); - printf("LCD: Frame buffer allocated at 0x%08lx\n", addr); - gd->fb_base = addr; -#endif /* CONFIG_FB_ADDR */ -#endif /* CONFIG_LCD */ - - /* Allocate a Board Info struct on a word boundary */ - addr -= sizeof(bd_t); - addr &= ~3UL; - gd->bd = bd = (bd_t *)addr; - - /* Allocate a new global data copy on a 8-byte boundary. */ - addr -= sizeof(gd_t); - addr &= ~7UL; - new_gd = (gd_t *)addr; - - /* And finally, a new, bigger stack. */ - new_sp = (unsigned long *)addr; - gd->start_addr_sp = addr; - *(--new_sp) = 0; - *(--new_sp) = 0; - - dram_init_banksize(); - - memcpy(new_gd, gd, sizeof(gd_t)); - - relocate_code((unsigned long)new_sp, new_gd, monitor_addr); -} - -void board_init_r(gd_t *new_gd, ulong dest_addr) -{ -#ifndef CONFIG_ENV_IS_NOWHERE - extern char * env_name_spec; -#endif - bd_t *bd; - - gd = new_gd; - bd = gd->bd; - - gd->flags |= GD_FLG_RELOC; - gd->reloc_off = dest_addr - CONFIG_SYS_MONITOR_BASE; - - /* Enable the MMU so that we can keep u-boot simple */ - mmu_init_r(dest_addr); - - board_early_init_r(); - - monitor_flash_len = _edata - _text; - -#if defined(CONFIG_NEEDS_MANUAL_RELOC) - /* - * We have to relocate the command table manually - */ - fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd), - ll_entry_count(cmd_tbl_t, cmd)); -#endif /* defined(CONFIG_NEEDS_MANUAL_RELOC) */ - - /* there are some other pointer constants we must deal with */ -#ifndef CONFIG_ENV_IS_NOWHERE - env_name_spec += gd->reloc_off; -#endif - - timer_init(); - - /* The malloc area is right below the monitor image in RAM */ - mem_malloc_init(CONFIG_SYS_MONITOR_BASE + gd->reloc_off - - CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN); - - enable_interrupts(); - - bd->bi_flashstart = 0; - bd->bi_flashsize = 0; - bd->bi_flashoffset = 0; - -#ifndef CONFIG_SYS_NO_FLASH - bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; - bd->bi_flashsize = flash_init(); - bd->bi_flashoffset = (unsigned long)_edata - (unsigned long)_text; - - if (bd->bi_flashsize) - display_flash_config(); -#endif - - if (bd->bi_dram[0].size) - display_dram_config(); - - gd->bd->bi_boot_params = malloc(CONFIG_SYS_BOOTPARAMS_LEN); - if (!gd->bd->bi_boot_params) - puts("WARNING: Cannot allocate space for boot parameters\n"); - - /* initialize environment */ - env_relocate(); - - stdio_init(); - jumptable_init(); - console_init_r(); - - /* Initialize from environment */ - load_addr = getenv_ulong("loadaddr", 16, load_addr); - -#ifdef CONFIG_BITBANGMII - bb_miiphy_init(); -#endif -#if defined(CONFIG_CMD_NET) - puts("Net: "); - eth_initialize(); -#endif - -#ifdef CONFIG_GENERIC_ATMEL_MCI - mmc_initialize(gd->bd); -#endif - for (;;) { - main_loop(); - } -} diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index feb2f68474..7f7e258a80 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -8,9 +8,6 @@ config SYS_CPU default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2 default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2 -config USE_PRIVATE_LIBGCC - default y - choice prompt "Target select" optional diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index b6aae3718a..e6ddb17a14 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -22,6 +22,8 @@ unsigned long map_len; void reset_cpu(ulong ignored) { + /* Do this here while it still has an effect */ + os_fd_restore(); if (state_uninit()) os_exit(2); @@ -50,6 +52,11 @@ int cleanup_before_linux(void) return 0; } +int cleanup_before_linux_select(int flags) +{ + return 0; +} + void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) { #ifdef CONFIG_PCI diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index e6dd17e9ef..8a4d719835 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -107,10 +107,12 @@ void os_exit(int exit_code) static struct termios orig_term; static bool term_setup; -static void os_fd_restore(void) +void os_fd_restore(void) { - if (term_setup) + if (term_setup) { tcsetattr(0, TCSANOW, &orig_term); + term_setup = false; + } } /* Put tty into raw mode so <tab> and <ctrl+c> work */ @@ -120,7 +122,6 @@ void os_tty_raw(int fd, bool allow_sigs) if (term_setup) return; - term_setup = true; /* If not a tty, don't complain */ if (tcgetattr(fd, &orig_term)) @@ -134,6 +135,7 @@ void os_tty_raw(int fd, bool allow_sigs) if (tcsetattr(fd, TCSANOW, &term)) return; + term_setup = true; atexit(os_fd_restore); } diff --git a/arch/sandbox/dts/Makefile b/arch/sandbox/dts/Makefile index 562a078c4b..517b555475 100644 --- a/arch/sandbox/dts/Makefile +++ b/arch/sandbox/dts/Makefile @@ -1,5 +1,5 @@ dtb-$(CONFIG_SANDBOX) += sandbox.dtb -dtb-$(CONFIG_DM_TEST) += test.dtb +dtb-$(CONFIG_UT_DM) += test.dtb targets += $(dtb-y) diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts index a3ebd80dd8..8927527141 100644 --- a/arch/sandbox/dts/sandbox.dts +++ b/arch/sandbox/dts/sandbox.dts @@ -17,30 +17,6 @@ stdout-path = "/serial"; }; - /* Needs to be available prior to relocation */ - uart0: serial { - compatible = "sandbox,serial"; - sandbox,text-colour = "cyan"; - }; - - triangle { - compatible = "demo-shape"; - colour = "cyan"; - sides = <3>; - character = <83>; - light-gpios = <&gpio_a 2>, <&gpio_b 6 0>; - }; - square { - compatible = "demo-shape"; - colour = "blue"; - sides = <4>; - }; - hexagon { - compatible = "demo-simple"; - colour = "white"; - sides = <6>; - }; - cros_ec: cros-ec@0 { reg = <0 0>; compatible = "google,cros-ec-sandbox"; @@ -70,10 +46,22 @@ }; }; - lcd { - compatible = "sandbox,lcd-sdl"; - xres = <1366>; - yres = <768>; + eth@10002000 { + compatible = "sandbox,eth"; + reg = <0x10002000 0x1000>; + fake-host-hwaddr = [00 00 66 44 22 00]; + }; + + eth@80000000 { + compatible = "sandbox,eth-raw"; + reg = <0x80000000 0x1000>; + host-raw-interface = "eth0"; + }; + + eth@90000000 { + compatible = "sandbox,eth-raw"; + reg = <0x90000000 0x1000>; + host-raw-interface = "lo"; }; gpio_a: gpios@0 { @@ -92,6 +80,12 @@ num-gpios = <10>; }; + hexagon { + compatible = "demo-simple"; + colour = "white"; + sides = <6>; + }; + i2c_0: i2c@0 { #address-cells = <1>; #size-cells = <0>; @@ -120,18 +114,10 @@ }; }; - spi@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0 0>; - compatible = "sandbox,spi"; - cs-gpios = <0>, <&gpio_a 0>; - firmware_storage_spi: flash@0 { - reg = <0>; - compatible = "spansion,m25p16", "sandbox,spi-flash"; - spi-max-frequency = <40000000>; - sandbox,filename = "spi.bin"; - }; + lcd { + compatible = "sandbox,lcd-sdl"; + xres = <1366>; + yres = <768>; }; pci: pci-controller { @@ -150,22 +136,38 @@ }; }; - eth@10002000 { - compatible = "sandbox,eth"; - reg = <0x10002000 0x1000>; - fake-host-hwaddr = [00 00 66 44 22 00]; + spi@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0>; + compatible = "sandbox,spi"; + cs-gpios = <0>, <&gpio_a 0>; + firmware_storage_spi: flash@0 { + reg = <0>; + compatible = "spansion,m25p16", "sandbox,spi-flash"; + spi-max-frequency = <40000000>; + sandbox,filename = "spi.bin"; + }; }; - eth@80000000 { - compatible = "sandbox,eth-raw"; - reg = <0x80000000 0x1000>; - host-raw-interface = "eth0"; + square { + compatible = "demo-shape"; + colour = "blue"; + sides = <4>; }; - eth@90000000 { - compatible = "sandbox,eth-raw"; - reg = <0x90000000 0x1000>; - host-raw-interface = "lo"; + triangle { + compatible = "demo-shape"; + colour = "cyan"; + sides = <3>; + character = <83>; + light-gpios = <&gpio_a 2>, <&gpio_b 6 0>; + }; + + /* Needs to be available prior to relocation */ + uart0: serial { + compatible = "sandbox,serial"; + sandbox,text-colour = "cyan"; }; usb@0 { diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 1bc3ca0770..c25614ab88 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -8,9 +8,13 @@ aliases { console = &uart0; + eth0 = "/eth@10002000"; + eth5 = ð_5; i2c0 = "/i2c@0"; - spi0 = "/spi@0"; pci0 = &pci; + rtc0 = &rtc_0; + rtc1 = &rtc_1; + spi0 = "/spi@0"; testfdt6 = "/e-test"; testbus3 = "/some-bus"; testfdt0 = "/some-bus/c-test@0"; @@ -18,18 +22,11 @@ testfdt3 = "/b-test"; testfdt5 = "/some-bus/c-test@5"; testfdt8 = "/a-test"; - eth0 = "/eth@10002000"; - eth5 = ð_5; usb0 = &usb_0; usb1 = &usb_1; usb2 = &usb_2; }; - uart0: serial { - compatible = "sandbox,serial"; - u-boot,dm-pre-reloc; - }; - a-test { reg = <0>; compatible = "denx,u-boot-fdt-test"; @@ -108,6 +105,24 @@ compatible = "denx,u-boot-fdt-test"; }; + eth@10002000 { + compatible = "sandbox,eth"; + reg = <0x10002000 0x1000>; + fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x00>; + }; + + eth_5: eth@10003000 { + compatible = "sandbox,eth"; + reg = <0x10003000 0x1000>; + fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x11>; + }; + + eth@10004000 { + compatible = "sandbox,eth"; + reg = <0x10004000 0x1000>; + fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x22>; + }; + gpio_a: base-gpios { compatible = "sandbox,gpio"; gpio-controller; @@ -140,6 +155,22 @@ }; }; + rtc_0: rtc@43 { + reg = <0x43>; + compatible = "sandbox-rtc"; + emul { + compatible = "sandbox,i2c-rtc"; + }; + }; + + rtc_1: rtc@61 { + reg = <0x61>; + compatible = "sandbox-rtc"; + emul { + compatible = "sandbox,i2c-rtc"; + }; + }; + sandbox_pmic: sandbox_pmic { reg = <0x40>; }; @@ -175,22 +206,9 @@ }; }; - eth@10002000 { - compatible = "sandbox,eth"; - reg = <0x10002000 0x1000>; - fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x00>; - }; - - eth_5: eth@10003000 { - compatible = "sandbox,eth"; - reg = <0x10003000 0x1000>; - fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x11>; - }; - - eth@10004000 { - compatible = "sandbox,eth"; - reg = <0x10004000 0x1000>; - fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x22>; + uart0: serial { + compatible = "sandbox,serial"; + u-boot,dm-pre-reloc; }; usb_0: usb@0 { diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 2f7a2fe073..6ac22af2f1 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -125,9 +125,6 @@ config SYS_CPU default "sh3" if CPU_SH3 default "sh4" if CPU_SH4 -config USE_PRIVATE_LIBGCC - default y - source "board/alphaproject/ap_sh4a_4a/Kconfig" source "board/espt/Kconfig" source "board/mpr2/Kconfig" diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 8e734fdfb4..20083e68c3 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -4,19 +4,16 @@ menu "x86 architecture" config SYS_ARCH default "x86" -config USE_PRIVATE_LIBGCC - default y - -config SYS_VSNPRINTF - default y - choice prompt "Mainboard vendor" - default VENDOR_COREBOOT + default VENDOR_EMULATION config VENDOR_COREBOOT bool "coreboot" +config VENDOR_EMULATION + bool "emulation" + config VENDOR_GOOGLE bool "Google" @@ -27,6 +24,7 @@ endchoice # board-specific options below source "board/coreboot/Kconfig" +source "board/emulation/Kconfig" source "board/google/Kconfig" source "board/intel/Kconfig" @@ -34,6 +32,7 @@ source "board/intel/Kconfig" source "arch/x86/cpu/baytrail/Kconfig" source "arch/x86/cpu/coreboot/Kconfig" source "arch/x86/cpu/ivybridge/Kconfig" +source "arch/x86/cpu/qemu/Kconfig" source "arch/x86/cpu/quark/Kconfig" source "arch/x86/cpu/queensbay/Kconfig" @@ -182,147 +181,6 @@ config MARK_GRAPHICS_MEM_WRCOMB memory is set as write-combining cache type. This option enables marking the graphics memory as write-combining. -menu "Display" - -config FRAMEBUFFER_SET_VESA_MODE - prompt "Set framebuffer graphics resolution" - bool - help - Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console) - -choice - prompt "framebuffer graphics resolution" - default FRAMEBUFFER_VESA_MODE_117 - depends on FRAMEBUFFER_SET_VESA_MODE - help - This option sets the resolution used for the coreboot framebuffer (and - bootsplash screen). - -config FRAMEBUFFER_VESA_MODE_100 - bool "640x400 256-color" - -config FRAMEBUFFER_VESA_MODE_101 - bool "640x480 256-color" - -config FRAMEBUFFER_VESA_MODE_102 - bool "800x600 16-color" - -config FRAMEBUFFER_VESA_MODE_103 - bool "800x600 256-color" - -config FRAMEBUFFER_VESA_MODE_104 - bool "1024x768 16-color" - -config FRAMEBUFFER_VESA_MODE_105 - bool "1024x7686 256-color" - -config FRAMEBUFFER_VESA_MODE_106 - bool "1280x1024 16-color" - -config FRAMEBUFFER_VESA_MODE_107 - bool "1280x1024 256-color" - -config FRAMEBUFFER_VESA_MODE_108 - bool "80x60 text" - -config FRAMEBUFFER_VESA_MODE_109 - bool "132x25 text" - -config FRAMEBUFFER_VESA_MODE_10A - bool "132x43 text" - -config FRAMEBUFFER_VESA_MODE_10B - bool "132x50 text" - -config FRAMEBUFFER_VESA_MODE_10C - bool "132x60 text" - -config FRAMEBUFFER_VESA_MODE_10D - bool "320x200 32k-color (1:5:5:5)" - -config FRAMEBUFFER_VESA_MODE_10E - bool "320x200 64k-color (5:6:5)" - -config FRAMEBUFFER_VESA_MODE_10F - bool "320x200 16.8M-color (8:8:8)" - -config FRAMEBUFFER_VESA_MODE_110 - bool "640x480 32k-color (1:5:5:5)" - -config FRAMEBUFFER_VESA_MODE_111 - bool "640x480 64k-color (5:6:5)" - -config FRAMEBUFFER_VESA_MODE_112 - bool "640x480 16.8M-color (8:8:8)" - -config FRAMEBUFFER_VESA_MODE_113 - bool "800x600 32k-color (1:5:5:5)" - -config FRAMEBUFFER_VESA_MODE_114 - bool "800x600 64k-color (5:6:5)" - -config FRAMEBUFFER_VESA_MODE_115 - bool "800x600 16.8M-color (8:8:8)" - -config FRAMEBUFFER_VESA_MODE_116 - bool "1024x768 32k-color (1:5:5:5)" - -config FRAMEBUFFER_VESA_MODE_117 - bool "1024x768 64k-color (5:6:5)" - -config FRAMEBUFFER_VESA_MODE_118 - bool "1024x768 16.8M-color (8:8:8)" - -config FRAMEBUFFER_VESA_MODE_119 - bool "1280x1024 32k-color (1:5:5:5)" - -config FRAMEBUFFER_VESA_MODE_11A - bool "1280x1024 64k-color (5:6:5)" - -config FRAMEBUFFER_VESA_MODE_11B - bool "1280x1024 16.8M-color (8:8:8)" - -config FRAMEBUFFER_VESA_MODE_USER - bool "Manually select VESA mode" - -endchoice - -# Map the config names to an integer (KB). -config FRAMEBUFFER_VESA_MODE - prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER - hex - default 0x100 if FRAMEBUFFER_VESA_MODE_100 - default 0x101 if FRAMEBUFFER_VESA_MODE_101 - default 0x102 if FRAMEBUFFER_VESA_MODE_102 - default 0x103 if FRAMEBUFFER_VESA_MODE_103 - default 0x104 if FRAMEBUFFER_VESA_MODE_104 - default 0x105 if FRAMEBUFFER_VESA_MODE_105 - default 0x106 if FRAMEBUFFER_VESA_MODE_106 - default 0x107 if FRAMEBUFFER_VESA_MODE_107 - default 0x108 if FRAMEBUFFER_VESA_MODE_108 - default 0x109 if FRAMEBUFFER_VESA_MODE_109 - default 0x10A if FRAMEBUFFER_VESA_MODE_10A - default 0x10B if FRAMEBUFFER_VESA_MODE_10B - default 0x10C if FRAMEBUFFER_VESA_MODE_10C - default 0x10D if FRAMEBUFFER_VESA_MODE_10D - default 0x10E if FRAMEBUFFER_VESA_MODE_10E - default 0x10F if FRAMEBUFFER_VESA_MODE_10F - default 0x110 if FRAMEBUFFER_VESA_MODE_110 - default 0x111 if FRAMEBUFFER_VESA_MODE_111 - default 0x112 if FRAMEBUFFER_VESA_MODE_112 - default 0x113 if FRAMEBUFFER_VESA_MODE_113 - default 0x114 if FRAMEBUFFER_VESA_MODE_114 - default 0x115 if FRAMEBUFFER_VESA_MODE_115 - default 0x116 if FRAMEBUFFER_VESA_MODE_116 - default 0x117 if FRAMEBUFFER_VESA_MODE_117 - default 0x118 if FRAMEBUFFER_VESA_MODE_118 - default 0x119 if FRAMEBUFFER_VESA_MODE_119 - default 0x11A if FRAMEBUFFER_VESA_MODE_11A - default 0x11B if FRAMEBUFFER_VESA_MODE_11B - default 0x117 if FRAMEBUFFER_VESA_MODE_USER - -endmenu - config HAVE_FSP bool "Add an Firmware Support Package binary" help @@ -356,6 +214,7 @@ config FSP_ADDR config FSP_TEMP_RAM_ADDR hex + depends on HAVE_FSP default 0x2000000 help Stack top address which is used in FspInit after DRAM is ready and @@ -470,13 +329,4 @@ config PCIE_ECAM_BASE assigned to PCI devices - i.e. the memory and prefetch regions, as passed to pci_set_region(). -config BOOTSTAGE - default y - -config BOOTSTAGE_REPORT - default y - -config CMD_BOOTSTAGE - default y - endmenu diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 043bea258c..7ff05e6628 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -14,11 +14,12 @@ obj-y += interrupts.o cpu.o call64.o obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/ obj-$(CONFIG_SYS_COREBOOT) += coreboot/ +obj-$(CONFIG_QEMU) += qemu/ obj-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += ivybridge/ obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/ obj-$(CONFIG_INTEL_QUARK) += quark/ obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/ -obj-y += lapic.o +obj-y += irq.o lapic.o obj-$(CONFIG_SMP) += mp_init.o obj-y += mtrr.o obj-$(CONFIG_PCI) += pci.o diff --git a/arch/x86/cpu/baytrail/pci.c b/arch/x86/cpu/baytrail/pci.c index 6c291f9ee9..48409de5c4 100644 --- a/arch/x86/cpu/baytrail/pci.c +++ b/arch/x86/cpu/baytrail/pci.c @@ -39,7 +39,7 @@ void board_pci_setup_hose(struct pci_controller *hose) pci_set_region(hose->regions + 3, 0, 0, - gd->ram_size, + gd->ram_size < 0x80000000 ? gd->ram_size : 0x80000000, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); hose->region_count = 4; diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index 4cdd0d4035..0e9f15fef6 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -7,16 +7,11 @@ */ #include <common.h> -#include <asm/u-boot-x86.h> -#include <flash.h> +#include <fdtdec.h> #include <netdev.h> -#include <ns16550.h> -#include <asm/msr.h> -#include <asm/cache.h> -#include <asm/cpu.h> #include <asm/io.h> +#include <asm/msr.h> #include <asm/mtrr.h> -#include <asm/arch/tables.h> #include <asm/arch/sysinfo.h> #include <asm/arch/timestamp.h> @@ -53,13 +48,6 @@ int last_stage_init(void) return 0; } -#ifndef CONFIG_SYS_NO_FLASH -ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) -{ - return 0; -} -#endif - int board_eth_init(bd_t *bis) { return pci_eth_init(bis); @@ -67,7 +55,8 @@ int board_eth_init(bd_t *bis) void board_final_cleanup(void) { - /* Un-cache the ROM so the kernel has one + /* + * Un-cache the ROM so the kernel has one * more MTRR available. * * Coreboot should have assigned this to the @@ -86,21 +75,22 @@ void board_final_cleanup(void) mtrr_close(&state); } - /* Issue SMI to Coreboot to lock down ME and registers */ - printf("Finalizing Coreboot\n"); - outb(0xcb, 0xb2); + if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) { + /* + * Issue SMI to coreboot to lock down ME and registers + * when allowed via device tree + */ + printf("Finalizing coreboot\n"); + outb(0xcb, 0xb2); + } } -void panic_puts(const char *str) +int misc_init_r(void) { - NS16550_t port = (NS16550_t)0x3f8; - - NS16550_init(port, 1); - while (*str) - NS16550_putc(port, *str++); + return 0; } -int misc_init_r(void) +int arch_misc_init(void) { return 0; } diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c new file mode 100644 index 0000000000..74b89ad2ff --- /dev/null +++ b/arch/x86/cpu/irq.c @@ -0,0 +1,216 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <errno.h> +#include <fdtdec.h> +#include <malloc.h> +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/pci.h> +#include <asm/pirq_routing.h> + +DECLARE_GLOBAL_DATA_PTR; + +static struct irq_router irq_router; +static struct irq_routing_table *pirq_routing_table; + +bool pirq_check_irq_routed(int link, u8 irq) +{ + u8 pirq; + int base = irq_router.link_base; + + if (irq_router.config == PIRQ_VIA_PCI) + pirq = x86_pci_read_config8(irq_router.bdf, + LINK_N2V(link, base)); + else + pirq = readb(irq_router.ibase + LINK_N2V(link, base)); + + pirq &= 0xf; + + /* IRQ# 0/1/2/8/13 are reserved */ + if (pirq < 3 || pirq == 8 || pirq == 13) + return false; + + return pirq == irq ? true : false; +} + +int pirq_translate_link(int link) +{ + return LINK_V2N(link, irq_router.link_base); +} + +void pirq_assign_irq(int link, u8 irq) +{ + int base = irq_router.link_base; + + /* IRQ# 0/1/2/8/13 are reserved */ + if (irq < 3 || irq == 8 || irq == 13) + return; + + if (irq_router.config == PIRQ_VIA_PCI) + x86_pci_write_config8(irq_router.bdf, + LINK_N2V(link, base), irq); + else + writeb(irq, irq_router.ibase + LINK_N2V(link, base)); +} + +static inline void fill_irq_info(struct irq_info **slotp, int *entries, u8 bus, + u8 device, u8 func, u8 pin, u8 pirq) +{ + struct irq_info *slot = *slotp; + + slot->bus = bus; + slot->devfn = (device << 3) | func; + slot->irq[pin - 1].link = LINK_N2V(pirq, irq_router.link_base); + slot->irq[pin - 1].bitmap = irq_router.irq_mask; + (*entries)++; + (*slotp)++; +} + +__weak void cpu_irq_init(void) +{ + return; +} + +static int create_pirq_routing_table(void) +{ + const void *blob = gd->fdt_blob; + struct fdt_pci_addr addr; + int node; + int len, count; + const u32 *cell; + struct irq_routing_table *rt; + struct irq_info *slot; + int irq_entries = 0; + int i; + int ret; + + node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_IRQ_ROUTER); + if (node < 0) { + debug("%s: Cannot find irq router node\n", __func__); + return -EINVAL; + } + + ret = fdtdec_get_pci_addr(blob, node, FDT_PCI_SPACE_CONFIG, + "reg", &addr); + if (ret) + return ret; + + /* extract the bdf from fdt_pci_addr */ + irq_router.bdf = addr.phys_hi & 0xffff00; + + ret = fdt_find_string(blob, node, "intel,pirq-config", "pci"); + if (!ret) { + irq_router.config = PIRQ_VIA_PCI; + } else { + ret = fdt_find_string(blob, node, "intel,pirq-config", "ibase"); + if (!ret) + irq_router.config = PIRQ_VIA_IBASE; + else + return -EINVAL; + } + + ret = fdtdec_get_int_array(blob, node, "intel,pirq-link", + &irq_router.link_base, 1); + if (ret) + return ret; + + irq_router.irq_mask = fdtdec_get_int(blob, node, + "intel,pirq-mask", PIRQ_BITMAP); + + if (irq_router.config == PIRQ_VIA_IBASE) { + int ibase_off; + + ibase_off = fdtdec_get_int(blob, node, "intel,ibase-offset", 0); + if (!ibase_off) + return -EINVAL; + + /* + * Here we assume that the IBASE register has already been + * properly configured by U-Boot before. + * + * By 'valid' we mean: + * 1) a valid memory space carved within system memory space + * assigned to IBASE register block. + * 2) memory range decoding is enabled. + * Hence we don't do any santify test here. + */ + irq_router.ibase = x86_pci_read_config32(irq_router.bdf, + ibase_off); + irq_router.ibase &= ~0xf; + } + + cell = fdt_getprop(blob, node, "intel,pirq-routing", &len); + if (!cell) + return -EINVAL; + + if ((len % sizeof(struct pirq_routing)) == 0) + count = len / sizeof(struct pirq_routing); + else + return -EINVAL; + + rt = malloc(sizeof(struct irq_routing_table)); + if (!rt) + return -ENOMEM; + memset((char *)rt, 0, sizeof(struct irq_routing_table)); + + /* Populate the PIRQ table fields */ + rt->signature = PIRQ_SIGNATURE; + rt->version = PIRQ_VERSION; + rt->rtr_bus = 0; + rt->rtr_devfn = (PCI_DEV(irq_router.bdf) << 3) | + PCI_FUNC(irq_router.bdf); + rt->rtr_vendor = PCI_VENDOR_ID_INTEL; + rt->rtr_device = PCI_DEVICE_ID_INTEL_ICH7_31; + + slot = rt->slots; + + /* Now fill in the irq_info entries in the PIRQ table */ + for (i = 0; i < count; i++) { + struct pirq_routing pr; + + pr.bdf = fdt_addr_to_cpu(cell[0]); + pr.pin = fdt_addr_to_cpu(cell[1]); + pr.pirq = fdt_addr_to_cpu(cell[2]); + + debug("irq_info %d: b.d.f %x.%x.%x INT%c PIRQ%c\n", + i, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf), + PCI_FUNC(pr.bdf), 'A' + pr.pin - 1, + 'A' + pr.pirq); + fill_irq_info(&slot, &irq_entries, PCI_BUS(pr.bdf), + PCI_DEV(pr.bdf), PCI_FUNC(pr.bdf), + pr.pin, pr.pirq); + cell += sizeof(struct pirq_routing) / sizeof(u32); + } + + rt->size = irq_entries * sizeof(struct irq_info) + 32; + + pirq_routing_table = rt; + + return 0; +} + +void pirq_init(void) +{ + cpu_irq_init(); + + if (create_pirq_routing_table()) { + debug("Failed to create pirq routing table\n"); + } else { + /* Route PIRQ */ + pirq_route_irqs(pirq_routing_table->slots, + get_irq_slot_count(pirq_routing_table)); + } +} + +u32 write_pirq_routing_table(u32 addr) +{ + if (!pirq_routing_table) + return addr; + + return copy_pirq_routing_table(addr, pirq_routing_table); +} diff --git a/arch/x86/cpu/qemu/Kconfig b/arch/x86/cpu/qemu/Kconfig new file mode 100644 index 0000000000..fb775d7d28 --- /dev/null +++ b/arch/x86/cpu/qemu/Kconfig @@ -0,0 +1,21 @@ +# +# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +config QEMU + bool + select TSC_CALIBRATION_BYPASS + +if QEMU + +config SYS_CAR_ADDR + hex + default 0xd0000 + +config SYS_CAR_SIZE + hex + default 0x10000 + +endif diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile new file mode 100644 index 0000000000..be79723a67 --- /dev/null +++ b/arch/x86/cpu/qemu/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += car.o dram.o qemu.o +obj-$(CONFIG_PCI) += pci.o diff --git a/arch/x86/cpu/qemu/car.S b/arch/x86/cpu/qemu/car.S new file mode 100644 index 0000000000..13b3aea3ff --- /dev/null +++ b/arch/x86/cpu/qemu/car.S @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <asm/post.h> + +.globl car_init +car_init: + /* Save the BIST result */ + movl %eax, %ebp + + post_code(POST_CAR_START) + + /* + * Since we know we are running inside emulator, + * we can do nothing here for CAR initialization. + */ + + /* Restore the BIST result */ + movl %ebp, %eax + + post_code(POST_CAR_CPU_CACHE) + jmp car_init_ret diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c new file mode 100644 index 0000000000..a88d0d2654 --- /dev/null +++ b/arch/x86/cpu/qemu/dram.c @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/post.h> +#include <asm/arch/qemu.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + u32 ram; + + outb(HIGH_RAM_ADDR, CMOS_ADDR_PORT); + ram = ((u32)inb(CMOS_DATA_PORT)) << 14; + outb(LOW_RAM_ADDR, CMOS_ADDR_PORT); + ram |= ((u32)inb(CMOS_DATA_PORT)) << 6; + ram += 16 * 1024; + + gd->ram_size = ram * 1024; + post_code(POST_DRAM); + + return 0; +} + +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = 0; + gd->bd->bi_dram[0].size = gd->ram_size; +} + +/* + * This function looks for the highest region of memory lower than 4GB which + * has enough space for U-Boot where U-Boot is aligned on a page boundary. + * It overrides the default implementation found elsewhere which simply + * picks the end of ram, wherever that may be. The location of the stack, + * the relocation address, and how far U-Boot is moved by relocation are + * set in the global data structure. + */ +ulong board_get_usable_ram_top(ulong total_size) +{ + return gd->ram_size; +} diff --git a/arch/x86/cpu/qemu/pci.c b/arch/x86/cpu/qemu/pci.c new file mode 100644 index 0000000000..1a9140b46e --- /dev/null +++ b/arch/x86/cpu/qemu/pci.c @@ -0,0 +1,101 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <pci.h> +#include <pci_rom.h> +#include <asm/pci.h> +#include <asm/arch/device.h> +#include <asm/arch/qemu.h> + +DECLARE_GLOBAL_DATA_PTR; + +void board_pci_setup_hose(struct pci_controller *hose) +{ + hose->first_busno = 0; + hose->last_busno = 0; + + /* PCI memory space */ + pci_set_region(hose->regions + 0, + CONFIG_PCI_MEM_BUS, + CONFIG_PCI_MEM_PHYS, + CONFIG_PCI_MEM_SIZE, + PCI_REGION_MEM); + + /* PCI IO space */ + pci_set_region(hose->regions + 1, + CONFIG_PCI_IO_BUS, + CONFIG_PCI_IO_PHYS, + CONFIG_PCI_IO_SIZE, + PCI_REGION_IO); + + pci_set_region(hose->regions + 2, + CONFIG_PCI_PREF_BUS, + CONFIG_PCI_PREF_PHYS, + CONFIG_PCI_PREF_SIZE, + PCI_REGION_PREFETCH); + + pci_set_region(hose->regions + 3, + 0, + 0, + gd->ram_size, + PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); + + hose->region_count = 4; +} + +int board_pci_post_scan(struct pci_controller *hose) +{ + int ret = 0; + u16 device; + int pam, i; + pci_dev_t vga; + ulong start; + + /* + * i440FX and Q35 chipset have different PAM register offset, but with + * the same bitfield layout. Here we determine the offset based on its + * PCI device ID. + */ + device = x86_pci_read_config16(PCI_BDF(0, 0, 0), PCI_DEVICE_ID); + pam = (device == PCI_DEVICE_ID_INTEL_82441) ? I440FX_PAM : Q35_PAM; + + /* + * Initialize Programmable Attribute Map (PAM) Registers + * + * Configure legacy segments C/D/E/F to system RAM + */ + for (i = 0; i < PAM_NUM; i++) + x86_pci_write_config8(PCI_BDF(0, 0, 0), pam + i, PAM_RW); + + if (device == PCI_DEVICE_ID_INTEL_82441) { + /* + * Enable legacy IDE I/O ports decode + * + * Note: QEMU always decode legacy IDE I/O port on PIIX chipset. + * However Linux ata_piix driver does sanity check on these two + * registers to see whether legacy ports decode is turned on. + * This is to make Linux ata_piix driver happy. + */ + x86_pci_write_config16(PIIX_IDE, IDE0_TIM, IDE_DECODE_EN); + x86_pci_write_config16(PIIX_IDE, IDE1_TIM, IDE_DECODE_EN); + } + + /* + * QEMU emulated graphic card shows in the PCI configuration space with + * PCI vendor id and device id as an artificial pair 0x1234:0x1111. + * It is on PCI bus 0, function 0, but device number is not consistent + * for the two x86 targets it supports. For i440FX and PIIX chipset + * board, it shows as device 2, while for Q35 and ICH9 chipset board, + * it shows as device 1. + */ + vga = (device == PCI_DEVICE_ID_INTEL_82441) ? I440FX_VGA : Q35_VGA; + start = get_timer(0); + ret = pci_run_vga_bios(vga, NULL, PCI_ROM_USE_NATIVE); + debug("BIOS ran in %lums\n", get_timer(start)); + + return ret; +} diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c new file mode 100644 index 0000000000..930d2b6c9d --- /dev/null +++ b/arch/x86/cpu/qemu/qemu.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/irq.h> +#include <asm/post.h> +#include <asm/processor.h> + +int arch_cpu_init(void) +{ + int ret; + + post_code(POST_CPU_INIT); +#ifdef CONFIG_SYS_X86_TSC_TIMER + timer_set_base(rdtsc()); +#endif + + ret = x86_cpu_init_f(); + if (ret) + return ret; + + return 0; +} + +int print_cpuinfo(void) +{ + post_code(POST_CPU_INFO); + return default_print_cpuinfo(); +} + +void reset_cpu(ulong addr) +{ + /* cold reset */ + x86_full_reset(); +} + +int arch_misc_init(void) +{ + pirq_init(); + + return 0; +} diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index e78a271c50..20cc09e113 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -9,6 +9,7 @@ #include <netdev.h> #include <phy.h> #include <asm/io.h> +#include <asm/irq.h> #include <asm/pci.h> #include <asm/post.h> #include <asm/processor.h> @@ -147,3 +148,33 @@ int cpu_eth_init(bd_t *bis) else return 0; } + +void cpu_irq_init(void) +{ + struct quark_rcba *rcba; + u32 base; + + base = x86_pci_read_config32(QUARK_LEGACY_BRIDGE, LB_RCBA); + base &= ~MEM_BAR_EN; + rcba = (struct quark_rcba *)base; + + /* + * Route Quark PCI device interrupt pin to PIRQ + * + * Route device#23's INTA/B/C/D to PIRQA/B/C/D + * Route device#20,21's INTA/B/C/D to PIRQE/F/G/H + */ + writew(PIRQC, &rcba->rmu_ir); + writew(PIRQA | (PIRQB << 4) | (PIRQC << 8) | (PIRQD << 12), + &rcba->d23_ir); + writew(PIRQD, &rcba->core_ir); + writew(PIRQE | (PIRQF << 4) | (PIRQG << 8) | (PIRQH << 12), + &rcba->d20d21_ir); +} + +int arch_misc_init(void) +{ + pirq_init(); + + return 0; +} diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile index 4599a4896d..d8761fdfbd 100644 --- a/arch/x86/cpu/queensbay/Makefile +++ b/arch/x86/cpu/queensbay/Makefile @@ -5,5 +5,5 @@ # obj-y += fsp_configs.o -obj-y += irq.o tnc.o topcliff.o +obj-y += tnc.o topcliff.o obj-$(CONFIG_PCI) += tnc_pci.o diff --git a/arch/x86/cpu/queensbay/irq.c b/arch/x86/cpu/queensbay/irq.c deleted file mode 100644 index faf951544f..0000000000 --- a/arch/x86/cpu/queensbay/irq.c +++ /dev/null @@ -1,242 +0,0 @@ -/* - * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <errno.h> -#include <malloc.h> -#include <asm/io.h> -#include <asm/pci.h> -#include <asm/post.h> -#include <asm/processor.h> -#include <asm/pirq_routing.h> -#include <asm/arch/device.h> -#include <asm/arch/tnc.h> -#include <asm/arch/irq.h> - -static struct irq_routing_table *pirq_routing_table; - -bool pirq_check_irq_routed(int link, u8 irq) -{ - u8 pirq; - - pirq = x86_pci_read_config8(TNC_LPC, LINK_N2V(link)); - pirq &= 0xf; - - /* IRQ# 0/1/2/8/13 are reserved */ - if (pirq < 3 || pirq == 8 || pirq == 13) - return false; - - return pirq == irq ? true : false; -} - -int pirq_translate_link(int link) -{ - return LINK_V2N(link); -} - -void pirq_assign_irq(int link, u8 irq) -{ - /* IRQ# 0/1/2/8/13 are reserved */ - if (irq < 3 || irq == 8 || irq == 13) - return; - - x86_pci_write_config8(TNC_LPC, LINK_N2V(link), irq); -} - -static inline void fill_irq_info(struct irq_info **slotp, int *entries, u8 bus, - u8 device, u8 func, u8 pin, u8 pirq) -{ - struct irq_info *slot = *slotp; - - slot->bus = bus; - slot->devfn = (device << 3) | func; - slot->irq[pin - 1].link = LINK_N2V(pirq); - slot->irq[pin - 1].bitmap = PIRQ_BITMAP; - (*entries)++; - (*slotp)++; -} - -/* PCIe port downstream INTx swizzle */ -static inline u8 pin_swizzle(u8 pin, int port) -{ - return (pin + port) % 4; -} - -__weak int board_fill_irq_info(struct irq_info *slot) -{ - return 0; -} - -static int create_pirq_routing_table(void) -{ - struct irq_routing_table *rt; - struct irq_info *slot; - int irq_entries = 0; - pci_dev_t tcf_bdf; - u8 tcf_bus, bus; - int i; - - rt = malloc(sizeof(struct irq_routing_table)); - if (!rt) - return -ENOMEM; - memset((char *)rt, 0, sizeof(struct irq_routing_table)); - - /* Populate the PIRQ table fields */ - rt->signature = PIRQ_SIGNATURE; - rt->version = PIRQ_VERSION; - rt->rtr_bus = 0; - rt->rtr_devfn = (TNC_LPC_DEV << 3) | TNC_LPC_FUNC; - rt->rtr_vendor = PCI_VENDOR_ID_INTEL; - rt->rtr_device = PCI_DEVICE_ID_INTEL_ICH7_31; - - slot = rt->slots; - - /* - * Now fill in the irq_info entries in the PIRQ table - * - * We start from internal TunnelCreek PCI devices first, then - * followed by all the 4 PCIe ports downstream devices, including - * the Queensbay platform Topcliff chipset devices. - */ - fill_irq_info(&slot, &irq_entries, 0, TNC_IGD_DEV, - TNC_IGD_FUNC, INTA, PIRQE); - fill_irq_info(&slot, &irq_entries, 0, TNC_SDVO_DEV, - TNC_SDVO_FUNC, INTA, PIRQF); - fill_irq_info(&slot, &irq_entries, 0, TNC_HDA_DEV, - TNC_HDA_FUNC, INTA, PIRQG); - fill_irq_info(&slot, &irq_entries, 0, TNC_PCIE0_DEV, - TNC_PCIE0_FUNC, INTA, PIRQE); - fill_irq_info(&slot, &irq_entries, 0, TNC_PCIE1_DEV, - TNC_PCIE1_FUNC, INTA, PIRQF); - fill_irq_info(&slot, &irq_entries, 0, TNC_PCIE2_DEV, - TNC_PCIE2_FUNC, INTA, PIRQG); - fill_irq_info(&slot, &irq_entries, 0, TNC_PCIE3_DEV, - TNC_PCIE3_FUNC, INTA, PIRQH); - - /* Check which PCIe port the Topcliff chipset is connected to */ - tcf_bdf = pci_find_device(PCI_VENDOR_ID_INTEL, 0x8800, 0); - tcf_bus = PCI_BUS(tcf_bdf); - for (i = 0; i < 4; i++) { - bus = x86_pci_read_config8(PCI_BDF(0, TNC_PCIE0_DEV + i, 0), - PCI_SECONDARY_BUS); - if (bus == tcf_bus) - break; - } - - /* Fill in the Topcliff chipset devices' irq info */ - if (i < 4) { - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_PCIE_PORT_DEV, - TCF_PCIE_PORT_FUNC, INTA, pin_swizzle(PIRQA, i)); - - tcf_bus++; - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_0, - TCF_GBE_FUNC, INTA, pin_swizzle(PIRQA, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_0, - TCF_GPIO_FUNC, INTA, pin_swizzle(PIRQA, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_2, - TCF_USB1_OHCI0_FUNC, INTB, pin_swizzle(PIRQB, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_2, - TCF_USB1_OHCI1_FUNC, INTB, pin_swizzle(PIRQB, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_2, - TCF_USB1_OHCI2_FUNC, INTB, pin_swizzle(PIRQB, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_2, - TCF_USB1_EHCI_FUNC, INTB, pin_swizzle(PIRQB, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_2, - TCF_USB_DEVICE_FUNC, INTB, pin_swizzle(PIRQB, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_4, - TCF_SDIO0_FUNC, INTC, pin_swizzle(PIRQC, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_4, - TCF_SDIO1_FUNC, INTC, pin_swizzle(PIRQC, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_6, - TCF_SATA_FUNC, INTD, pin_swizzle(PIRQD, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_8, - TCF_USB2_OHCI0_FUNC, INTA, pin_swizzle(PIRQA, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_8, - TCF_USB2_OHCI1_FUNC, INTA, pin_swizzle(PIRQA, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_8, - TCF_USB2_OHCI2_FUNC, INTA, pin_swizzle(PIRQA, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_8, - TCF_USB2_EHCI_FUNC, INTA, pin_swizzle(PIRQA, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_10, - TCF_DMA1_FUNC, INTB, pin_swizzle(PIRQB, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_10, - TCF_UART0_FUNC, INTB, pin_swizzle(PIRQB, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_10, - TCF_UART1_FUNC, INTB, pin_swizzle(PIRQB, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_10, - TCF_UART2_FUNC, INTB, pin_swizzle(PIRQB, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_10, - TCF_UART3_FUNC, INTB, pin_swizzle(PIRQB, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_12, - TCF_DMA2_FUNC, INTC, pin_swizzle(PIRQC, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_12, - TCF_SPI_FUNC, INTC, pin_swizzle(PIRQC, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_12, - TCF_I2C_FUNC, INTC, pin_swizzle(PIRQC, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_12, - TCF_CAN_FUNC, INTC, pin_swizzle(PIRQC, i)); - fill_irq_info(&slot, &irq_entries, tcf_bus, TCF_DEV_12, - TCF_1588_FUNC, INTC, pin_swizzle(PIRQC, i)); - } - - /* Call board-specific routine to fill in add-in card's irq info */ - irq_entries += board_fill_irq_info(slot); - - rt->size = irq_entries * sizeof(struct irq_info) + 32; - - pirq_routing_table = rt; - - return 0; -} - -void pirq_init(void) -{ - struct tnc_rcba *rcba; - u32 base; - - base = x86_pci_read_config32(TNC_LPC, LPC_RCBA); - base &= ~MEM_BAR_EN; - rcba = (struct tnc_rcba *)base; - - /* Make sure all internal PCI devices are using INTA */ - writel(INTA, &rcba->d02ip); - writel(INTA, &rcba->d03ip); - writel(INTA, &rcba->d27ip); - writel(INTA, &rcba->d31ip); - writel(INTA, &rcba->d23ip); - writel(INTA, &rcba->d24ip); - writel(INTA, &rcba->d25ip); - writel(INTA, &rcba->d26ip); - - /* - * Route TunnelCreek PCI device interrupt pin to PIRQ - * - * Since PCIe downstream ports received INTx are routed to PIRQ - * A/B/C/D directly and not configurable, we route internal PCI - * device's INTx to PIRQ E/F/G/H. - */ - writew(PIRQE, &rcba->d02ir); - writew(PIRQF, &rcba->d03ir); - writew(PIRQG, &rcba->d27ir); - writew(PIRQH, &rcba->d31ir); - writew(PIRQE, &rcba->d23ir); - writew(PIRQF, &rcba->d24ir); - writew(PIRQG, &rcba->d25ir); - writew(PIRQH, &rcba->d26ir); - - if (create_pirq_routing_table()) { - debug("Failed to create pirq routing table\n"); - } else { - /* Route PIRQ */ - pirq_route_irqs(pirq_routing_table->slots, - get_irq_slot_count(pirq_routing_table)); - } -} - -u32 write_pirq_routing_table(u32 addr) -{ - return copy_pirq_routing_table(addr, pirq_routing_table); -} diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c index b46a7e996f..873de7be9d 100644 --- a/arch/x86/cpu/queensbay/tnc.c +++ b/arch/x86/cpu/queensbay/tnc.c @@ -6,10 +6,11 @@ #include <common.h> #include <asm/io.h> +#include <asm/irq.h> #include <asm/pci.h> #include <asm/post.h> #include <asm/arch/device.h> -#include <asm/arch/irq.h> +#include <asm/arch/tnc.h> #include <asm/fsp/fsp_support.h> #include <asm/processor.h> @@ -45,6 +46,42 @@ int arch_cpu_init(void) return 0; } +void cpu_irq_init(void) +{ + struct tnc_rcba *rcba; + u32 base; + + base = x86_pci_read_config32(TNC_LPC, LPC_RCBA); + base &= ~MEM_BAR_EN; + rcba = (struct tnc_rcba *)base; + + /* Make sure all internal PCI devices are using INTA */ + writel(INTA, &rcba->d02ip); + writel(INTA, &rcba->d03ip); + writel(INTA, &rcba->d27ip); + writel(INTA, &rcba->d31ip); + writel(INTA, &rcba->d23ip); + writel(INTA, &rcba->d24ip); + writel(INTA, &rcba->d25ip); + writel(INTA, &rcba->d26ip); + + /* + * Route TunnelCreek PCI device interrupt pin to PIRQ + * + * Since PCIe downstream ports received INTx are routed to PIRQ + * A/B/C/D directly and not configurable, we route internal PCI + * device's INTx to PIRQ E/F/G/H. + */ + writew(PIRQE, &rcba->d02ir); + writew(PIRQF, &rcba->d03ir); + writew(PIRQG, &rcba->d27ir); + writew(PIRQH, &rcba->d31ir); + writew(PIRQE, &rcba->d23ir); + writew(PIRQF, &rcba->d24ir); + writew(PIRQG, &rcba->d25ir); + writew(PIRQH, &rcba->d26ir); +} + int arch_misc_init(void) { pirq_init(); diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile index 431bbd8a0d..f86514ce83 100644 --- a/arch/x86/dts/Makefile +++ b/arch/x86/dts/Makefile @@ -2,7 +2,9 @@ dtb-y += chromebook_link.dtb \ chromebox_panther.dtb \ crownbay.dtb \ galileo.dtb \ - minnowmax.dtb + minnowmax.dtb \ + qemu-x86_i440fx.dtb \ + qemu-x86_q35.dtb targets += $(dtb-y) diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index fbdeade047..d68efda8df 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -6,6 +6,8 @@ /dts-v1/; +#include <dt-bindings/interrupt-router/intel-irq.h> + /include/ "skeleton.dtsi" /include/ "serial.dtsi" @@ -135,6 +137,58 @@ }; }; }; + + irq-router@1f,0 { + reg = <0x0000f800 0 0 0 0>; + compatible = "intel,irq-router"; + intel,pirq-config = "pci"; + intel,pirq-link = <0x60 8>; + intel,pirq-mask = <0xdee0>; + intel,pirq-routing = < + /* TunnelCreek PCI devices */ + PCI_BDF(0, 2, 0) INTA PIRQE + PCI_BDF(0, 3, 0) INTA PIRQF + PCI_BDF(0, 23, 0) INTA PIRQE + PCI_BDF(0, 24, 0) INTA PIRQF + PCI_BDF(0, 25, 0) INTA PIRQG + PCI_BDF(0, 26, 0) INTA PIRQH + PCI_BDF(0, 27, 0) INTA PIRQG + /* + * Topcliff PCI devices + * + * Note on the Crown Bay board, Topcliff chipset + * is connected to TunnelCreek PCIe port 0, so + * its bus number is 1 for its PCIe port and 2 + * for its PCI devices per U-Boot currnet PCI + * bus enumeration algorithm. + */ + PCI_BDF(1, 0, 0) INTA PIRQA + PCI_BDF(2, 0, 1) INTA PIRQA + PCI_BDF(2, 0, 2) INTA PIRQA + PCI_BDF(2, 2, 0) INTB PIRQB + PCI_BDF(2, 2, 1) INTB PIRQB + PCI_BDF(2, 2, 2) INTB PIRQB + PCI_BDF(2, 2, 3) INTB PIRQB + PCI_BDF(2, 2, 4) INTB PIRQB + PCI_BDF(2, 4, 0) INTC PIRQC + PCI_BDF(2, 4, 1) INTC PIRQC + PCI_BDF(2, 6, 0) INTD PIRQD + PCI_BDF(2, 8, 0) INTA PIRQA + PCI_BDF(2, 8, 1) INTA PIRQA + PCI_BDF(2, 8, 2) INTA PIRQA + PCI_BDF(2, 8, 3) INTA PIRQA + PCI_BDF(2, 10, 0) INTB PIRQB + PCI_BDF(2, 10, 1) INTB PIRQB + PCI_BDF(2, 10, 2) INTB PIRQB + PCI_BDF(2, 10, 3) INTB PIRQB + PCI_BDF(2, 10, 4) INTB PIRQB + PCI_BDF(2, 12, 0) INTC PIRQC + PCI_BDF(2, 12, 1) INTC PIRQC + PCI_BDF(2, 12, 2) INTC PIRQC + PCI_BDF(2, 12, 3) INTC PIRQC + PCI_BDF(2, 12, 4) INTC PIRQC + >; + }; }; }; diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts index 60dbc5f8a3..2ba081e9dc 100644 --- a/arch/x86/dts/galileo.dts +++ b/arch/x86/dts/galileo.dts @@ -7,6 +7,7 @@ /dts-v1/; #include <dt-bindings/mrc/quark.h> +#include <dt-bindings/interrupt-router/intel-irq.h> /include/ "skeleton.dtsi" @@ -67,6 +68,27 @@ clock-frequency = <44236800>; current-speed = <115200>; }; + + irq-router@1f,0 { + reg = <0x0000f800 0 0 0 0>; + compatible = "intel,irq-router"; + intel,pirq-config = "pci"; + intel,pirq-link = <0x60 8>; + intel,pirq-mask = <0xdef8>; + intel,pirq-routing = < + PCI_BDF(0, 20, 0) INTA PIRQE + PCI_BDF(0, 20, 1) INTB PIRQF + PCI_BDF(0, 20, 2) INTC PIRQG + PCI_BDF(0, 20, 3) INTD PIRQH + PCI_BDF(0, 20, 4) INTA PIRQE + PCI_BDF(0, 20, 5) INTB PIRQF + PCI_BDF(0, 20, 6) INTC PIRQG + PCI_BDF(0, 20, 7) INTD PIRQH + PCI_BDF(0, 21, 0) INTA PIRQE + PCI_BDF(0, 21, 1) INTB PIRQF + PCI_BDF(0, 21, 2) INTC PIRQG + >; + }; }; gpioa { diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 7103bc5077..bd21bfb0b4 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -6,6 +6,8 @@ /dts-v1/; +#include <dt-bindings/gpio/x86-gpio.h> + /include/ "skeleton.dtsi" /include/ "serial.dtsi" @@ -22,6 +24,27 @@ silent_console = <0>; }; + pch_pinctrl { + compatible = "intel,x86-pinctrl"; + io-base = <0x4c>; + + pin_usb_host_en0@0 { + gpio-offset = <0x80 8>; + pad-offset = <0x260>; + mode-gpio; + output-value = <1>; + direction = <PIN_OUTPUT>; + }; + + pin_usb_host_en1@0 { + gpio-offset = <0x80 9>; + pad-offset = <0x258>; + mode-gpio; + output-value = <1>; + direction = <PIN_OUTPUT>; + }; + }; + gpioa { compatible = "intel,ich6-gpio"; u-boot,dm-pre-reloc; diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts new file mode 100644 index 0000000000..557428a459 --- /dev/null +++ b/arch/x86/dts/qemu-x86_i440fx.dts @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +#include <dt-bindings/interrupt-router/intel-irq.h> + +/include/ "skeleton.dtsi" +/include/ "serial.dtsi" + +/ { + model = "QEMU x86 (I440FX)"; + compatible = "qemu,x86"; + + config { + silent_console = <0>; + }; + + chosen { + stdout-path = "/serial"; + }; + + pci { + compatible = "pci-x86"; + #address-cells = <3>; + #size-cells = <2>; + u-boot,dm-pre-reloc; + ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 + 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 + 0x01000000 0x0 0x2000 0x2000 0 0xe000>; + + irq-router@1,0 { + reg = <0x00000800 0 0 0 0>; + compatible = "intel,irq-router"; + intel,pirq-config = "pci"; + intel,pirq-link = <0x60 4>; + intel,pirq-mask = <0x0e40>; + intel,pirq-routing = < + /* PIIX UHCI */ + PCI_BDF(0, 1, 2) INTD PIRQD + /* e1000 NIC */ + PCI_BDF(0, 3, 0) INTA PIRQC + >; + }; + }; + +}; diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts new file mode 100644 index 0000000000..c259f2a3d2 --- /dev/null +++ b/arch/x86/dts/qemu-x86_q35.dts @@ -0,0 +1,67 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +#include <dt-bindings/interrupt-router/intel-irq.h> + +/* ICH9 IRQ router has discrete PIRQ control registers */ +#undef PIRQE +#undef PIRQF +#undef PIRQG +#undef PIRQH +#define PIRQE 8 +#define PIRQF 9 +#define PIRQG 10 +#define PIRQH 11 + +/include/ "skeleton.dtsi" +/include/ "serial.dtsi" + +/ { + model = "QEMU x86 (Q35)"; + compatible = "qemu,x86"; + + config { + silent_console = <0>; + u-boot,no-apm-finalize; + }; + + chosen { + stdout-path = "/serial"; + }; + + pci { + compatible = "pci-x86"; + #address-cells = <3>; + #size-cells = <2>; + u-boot,dm-pre-reloc; + ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 + 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 + 0x01000000 0x0 0x2000 0x2000 0 0xe000>; + + irq-router@1f,0 { + reg = <0x0000f800 0 0 0 0>; + compatible = "intel,irq-router"; + intel,pirq-config = "pci"; + intel,pirq-link = <0x60 8>; + intel,pirq-mask = <0x0e40>; + intel,pirq-routing = < + /* e1000 NIC */ + PCI_BDF(0, 2, 0) INTA PIRQG + /* ICH9 UHCI */ + PCI_BDF(0, 29, 0) INTA PIRQA + PCI_BDF(0, 29, 1) INTB PIRQB + PCI_BDF(0, 29, 2) INTC PIRQC + /* ICH9 EHCI */ + PCI_BDF(0, 29, 7) INTD PIRQD + /* ICH9 SATA */ + PCI_BDF(0, 31, 2) INTA PIRQA + >; + }; + }; + +}; diff --git a/arch/x86/include/asm/arch-qemu/device.h b/arch/x86/include/asm/arch-qemu/device.h new file mode 100644 index 0000000000..75a435e67b --- /dev/null +++ b/arch/x86/include/asm/arch-qemu/device.h @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _QEMU_DEVICE_H_ +#define _QEMU_DEVICE_H_ + +#include <pci.h> + +#define QEMU_I440FX PCI_BDF(0, 0, 0) +#define PIIX_ISA PCI_BDF(0, 1, 0) +#define PIIX_IDE PCI_BDF(0, 1, 1) +#define PIIX_USB PCI_BDF(0, 1, 2) +#define I440FX_VGA PCI_BDF(0, 2, 0) + +#define QEMU_Q35 PCI_BDF(0, 0, 0) +#define Q35_VGA PCI_BDF(0, 1, 0) + +#endif /* _QEMU_DEVICE_H_ */ diff --git a/arch/x86/include/asm/arch-qemu/gpio.h b/arch/x86/include/asm/arch-qemu/gpio.h new file mode 100644 index 0000000000..ca8cba4f97 --- /dev/null +++ b/arch/x86/include/asm/arch-qemu/gpio.h @@ -0,0 +1,13 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _X86_ARCH_GPIO_H_ +#define _X86_ARCH_GPIO_H_ + +/* Where in config space is the register that points to the GPIO registers? */ +#define PCI_CFG_GPIOBASE 0x44 + +#endif /* _X86_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/arch-qemu/qemu.h b/arch/x86/include/asm/arch-qemu/qemu.h new file mode 100644 index 0000000000..5cbfffffee --- /dev/null +++ b/arch/x86/include/asm/arch-qemu/qemu.h @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ARCH_QEMU_H_ +#define _ARCH_QEMU_H_ + +/* Programmable Attribute Map (PAM) Registers */ +#define I440FX_PAM 0x59 +#define Q35_PAM 0x90 +#define PAM_NUM 7 +#define PAM_RW 0x33 + +/* IDE Timing Register */ +#define IDE0_TIM 0x40 +#define IDE1_TIM 0x42 +#define IDE_DECODE_EN 0x8000 + +/* I/O Ports */ +#define CMOS_ADDR_PORT 0x70 +#define CMOS_DATA_PORT 0x71 + +#define LOW_RAM_ADDR 0x34 +#define HIGH_RAM_ADDR 0x35 + +#endif /* _ARCH_QEMU_H_ */ diff --git a/arch/x86/include/asm/arch-quark/device.h b/arch/x86/include/asm/arch-quark/device.h index 4af3dedc95..7882f339f0 100644 --- a/arch/x86/include/asm/arch-quark/device.h +++ b/arch/x86/include/asm/arch-quark/device.h @@ -9,20 +9,60 @@ #include <pci.h> -#define QUARK_HOST_BRIDGE PCI_BDF(0, 0, 0) -#define QUARK_MMC_SDIO PCI_BDF(0, 20, 0) -#define QUARK_UART0 PCI_BDF(0, 20, 1) -#define QUARK_USB_DEVICE PCI_BDF(0, 20, 2) -#define QUARK_USB_EHCI PCI_BDF(0, 20, 3) -#define QUARK_USB_OHCI PCI_BDF(0, 20, 4) -#define QUARK_UART1 PCI_BDF(0, 20, 5) -#define QUARK_EMAC0 PCI_BDF(0, 20, 6) -#define QUARK_EMAC1 PCI_BDF(0, 20, 7) -#define QUARK_SPI0 PCI_BDF(0, 21, 0) -#define QUARK_SPI1 PCI_BDF(0, 21, 1) -#define QUARK_I2C_GPIO PCI_BDF(0, 21, 2) -#define QUARK_PCIE0 PCI_BDF(0, 23, 0) -#define QUARK_PCIE1 PCI_BDF(0, 23, 1) -#define QUARK_LEGACY_BRIDGE PCI_BDF(0, 31, 0) +#define QUARK_HOST_BRIDGE_DEV 0 +#define QUARK_HOST_BRIDGE_FUNC 0 + +#define QUARK_DEV_20 20 +#define QUARK_MMC_SDIO_FUNC 0 +#define QUARK_UART0_FUNC 1 +#define QUARK_USB_DEVICE_FUNC 2 +#define QUARK_USB_EHCI_FUNC 3 +#define QUARK_USB_OHCI_FUNC 4 +#define QUARK_UART1_FUNC 5 +#define QUARK_EMAC0_FUNC 6 +#define QUARK_EMAC1_FUNC 7 + +#define QUARK_DEV_21 21 +#define QUARK_SPI0_FUNC 0 +#define QUARK_SPI1_FUNC 1 +#define QUARK_I2C_GPIO_FUNC 2 + +#define QUARK_DEV_23 23 +#define QUARK_PCIE0_FUNC 0 +#define QUARK_PCIE1_FUNC 1 + +#define QUARK_LGC_BRIDGE_DEV 31 +#define QUARK_LGC_BRIDGE_FUNC 0 + +#define QUARK_HOST_BRIDGE \ + PCI_BDF(0, QUARK_HOST_BRIDGE_DEV, QUARK_HOST_BRIDGE_FUNC) +#define QUARK_MMC_SDIO \ + PCI_BDF(0, QUARK_DEV_20, QUARK_MMC_SDIO_FUNC) +#define QUARK_UART0 \ + PCI_BDF(0, QUARK_DEV_20, QUARK_UART0_FUNC) +#define QUARK_USB_DEVICE \ + PCI_BDF(0, QUARK_DEV_20, QUARK_USB_DEVICE_FUNC) +#define QUARK_USB_EHCI \ + PCI_BDF(0, QUARK_DEV_20, QUARK_USB_EHCI_FUNC) +#define QUARK_USB_OHCI \ + PCI_BDF(0, QUARK_DEV_20, QUARK_USB_OHCI_FUNC) +#define QUARK_UART1 \ + PCI_BDF(0, QUARK_DEV_20, QUARK_UART1_FUNC) +#define QUARK_EMAC0 \ + PCI_BDF(0, QUARK_DEV_20, QUARK_EMAC0_FUNC) +#define QUARK_EMAC1 \ + PCI_BDF(0, QUARK_DEV_20, QUARK_EMAC1_FUNC) +#define QUARK_SPI0 \ + PCI_BDF(0, QUARK_DEV_21, QUARK_SPI0_FUNC) +#define QUARK_SPI1 \ + PCI_BDF(0, QUARK_DEV_21, QUARK_SPI1_FUNC) +#define QUARK_I2C_GPIO \ + PCI_BDF(0, QUARK_DEV_21, QUARK_I2C_GPIO_FUNC) +#define QUARK_PCIE0 \ + PCI_BDF(0, QUARK_DEV_23, QUARK_PCIE0_FUNC) +#define QUARK_PCIE1 \ + PCI_BDF(0, QUARK_DEV_23, QUARK_PCIE1_FUNC) +#define QUARK_LEGACY_BRIDGE \ + PCI_BDF(0, QUARK_LGC_BRIDGE_DEV, QUARK_LGC_BRIDGE_FUNC) #endif /* _QUARK_DEVICE_H_ */ diff --git a/arch/x86/include/asm/arch-quark/quark.h b/arch/x86/include/asm/arch-quark/quark.h index 6dd02fd31e..c9979280b6 100644 --- a/arch/x86/include/asm/arch-quark/quark.h +++ b/arch/x86/include/asm/arch-quark/quark.h @@ -76,4 +76,19 @@ #define LB_BC 0xd8 #define LB_RCBA 0xf0 +#ifndef __ASSEMBLY__ + +/* Root Complex Register Block */ +struct quark_rcba { + u32 rctl; + u32 esd; + u32 rsvd1[3150]; + u16 rmu_ir; + u16 d23_ir; + u16 core_ir; + u16 d20d21_ir; +}; + +#endif /* __ASSEMBLY__ */ + #endif /* _QUARK_H_ */ diff --git a/arch/x86/include/asm/arch-queensbay/irq.h b/arch/x86/include/asm/arch-queensbay/irq.h deleted file mode 100644 index e7f861623e..0000000000 --- a/arch/x86/include/asm/arch-queensbay/irq.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _ARCH_IRQ_H_ -#define _ARCH_IRQ_H_ - -enum pci_int_pin { - INTX, - INTA, - INTB, - INTC, - INTD -}; - -enum pirq_pin { - PIRQA, - PIRQB, - PIRQC, - PIRQD, - PIRQE, - PIRQF, - PIRQG, - PIRQH -}; - -/* PIRQ link number and value conversion */ -#define LINK_V2N(link) (link - 0x60) -#define LINK_N2V(link) (link + 0x60) - -#define PIRQ_BITMAP 0xdee0 - -struct irq_info; - -/** - * board_fill_irq_info() - Board-specific irq_info fill routine - * - * This fills the irq_info table for any board-specific add-in cards. - * - * @slot: pointer to the struct irq_info that is to be filled in - * @return: number of entries were written to the struct irq_info - */ -int board_fill_irq_info(struct irq_info *slot); - -/** - * pirq_init() - Initialize platform PIRQ routing - * - * This initializes the PIRQ routing on the platform and configures all PCI - * devices' interrupt line register to a working IRQ number on the 8259 PIC. - */ -void pirq_init(void); - -#endif /* _ARCH_IRQ_H_ */ diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h index 1099427388..ed85b08ce7 100644 --- a/arch/x86/include/asm/gpio.h +++ b/arch/x86/include/asm/gpio.h @@ -147,6 +147,7 @@ struct pch_gpio_map { } set3; }; +int gpio_ich6_pinctrl_init(void); void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio); void ich_gpio_set_gpio_map(const struct pch_gpio_map *map); diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h new file mode 100644 index 0000000000..4de5512ce1 --- /dev/null +++ b/arch/x86/include/asm/irq.h @@ -0,0 +1,76 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ARCH_IRQ_H_ +#define _ARCH_IRQ_H_ + +#include <dt-bindings/interrupt-router/intel-irq.h> + +/** + * Intel interrupt router configuration mechanism + * + * There are two known ways of Intel interrupt router configuration mechanism + * so far. On most cases, the IRQ routing configuraiton is controlled by PCI + * configuraiton registers on the legacy bridge, normally PCI BDF(0, 31, 0). + * On some newer platforms like BayTrail and Braswell, the IRQ routing is now + * in the IBASE register block where IBASE is memory-mapped. + */ +enum pirq_config { + PIRQ_VIA_PCI, + PIRQ_VIA_IBASE +}; + +/** + * Intel interrupt router control block + * + * Its members' value will be filled in based on device tree's input. + * + * @config: PIRQ_VIA_PCI or PIRQ_VIA_IBASE + * @link_base: link value base number + * @irq_mask: IRQ mask reprenting the 16 IRQs in 8259, bit N is 1 means + * IRQ N is available to be routed + * @lb_bdf: irq router's PCI bus/device/function number encoding + * @ibase: IBASE register block base address + */ +struct irq_router { + int config; + u32 link_base; + u16 irq_mask; + u32 bdf; + u32 ibase; +}; + +struct pirq_routing { + int bdf; + int pin; + int pirq; +}; + +/* PIRQ link number and value conversion */ +#define LINK_V2N(link, base) (link - base) +#define LINK_N2V(link, base) (link + base) + +#define PIRQ_BITMAP 0xdef8 + +/** + * cpu_irq_init() - Initialize CPU IRQ routing + * + * This initializes some platform-specific registers related to IRQ routing, + * like configuring internal PCI devices to use which PCI interrupt pin, + * and which PCI interrupt pin is mapped to which PIRQ line. Note on some + * platforms, such IRQ routing might be hard-coded thus cannot configure. + */ +void cpu_irq_init(void); + +/** + * pirq_init() - Initialize platform PIRQ routing + * + * This initializes the PIRQ routing on the platform and configures all PCI + * devices' interrupt line register to a working IRQ number on the 8259 PIC. + */ +void pirq_init(void); + +#endif /* _ARCH_IRQ_H_ */ diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index be103c055c..d1d21ed660 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -16,7 +16,6 @@ void init_gd(gd_t *id, u64 *gdt_addr); void setup_gdt(gd_t *id, u64 *gdt_addr); int init_cache(void); int cleanup_before_linux(void); -void panic_puts(const char *str); /* cpu/.../timer.c */ void timer_isr(void *); diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c index 5f96da120e..5809235b10 100644 --- a/arch/x86/lib/fsp/fsp_support.c +++ b/arch/x86/lib/fsp/fsp_support.c @@ -279,7 +279,7 @@ u64 fsp_get_usable_highmem_top(const void *hob_list) res_desc = (struct hob_res_desc *)hdr; if (res_desc->type == RES_SYS_MEM) { phys_start = res_desc->phys_start; - /* Need memory above 1MB to be collected here */ + /* Need memory above 4GB to be collected here */ if (phys_start >= (phys_addr_t)FSP_HIGHMEM_BASE) top += (u32)(res_desc->len); } diff --git a/board/Arcturus/ucp1020/Kconfig b/board/Arcturus/ucp1020/Kconfig index feca03aeef..fe2c3be1b7 100644 --- a/board/Arcturus/ucp1020/Kconfig +++ b/board/Arcturus/ucp1020/Kconfig @@ -12,14 +12,6 @@ config SYS_CONFIG_NAME string default "UCP1020" -config SPI_FLASH - bool - default y - -config SPI_PCI - bool - default y - choice prompt "Target image select" diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c index 7830d1a200..441465c005 100644 --- a/board/BuR/common/common.c +++ b/board/BuR/common/common.c @@ -64,8 +64,7 @@ void lcdbacklight(int on) unsigned int pwmfrq = getenv_ulong("ds1_pwmfreq", 10, ~0UL); #endif unsigned int tmp; - - struct gptimer *const timerhw = (struct gptimer *)DM_TIMER6_BASE; + struct gptimer *timerhw; if (on) bright = bright != ~0UL ? bright : 50; @@ -73,6 +72,14 @@ void lcdbacklight(int on) bright = 0; switch (driver) { + case 2: + timerhw = (struct gptimer *)DM_TIMER5_BASE; + break; + default: + timerhw = (struct gptimer *)DM_TIMER6_BASE; + } + + switch (driver) { case 0: /* PMIC LED-Driver */ /* brightness level */ tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, @@ -83,7 +90,8 @@ void lcdbacklight(int on) bright != 0 ? 0x0A : 0x02, 0xFF); break; - case 1: /* PWM using timer6 */ + case 1: + case 2: /* PWM using timer */ if (pwmfrq != ~0UL) { timerhw->tiocp_cfg = TCFG_RESET; udelay(10); diff --git a/board/atmel/atstk1000/Kconfig b/board/atmel/atstk1000/Kconfig index 6d4151453f..b4fa9a2b38 100644 --- a/board/atmel/atstk1000/Kconfig +++ b/board/atmel/atstk1000/Kconfig @@ -13,51 +13,3 @@ config SYS_CONFIG_NAME default "atstk1002" endif - -if TARGET_ATSTK1003 - -config SYS_BOARD - default "atstk1000" - -config SYS_VENDOR - default "atmel" - -config SYS_SOC - default "at32ap700x" - -config SYS_CONFIG_NAME - default "atstk1003" - -endif - -if TARGET_ATSTK1004 - -config SYS_BOARD - default "atstk1000" - -config SYS_VENDOR - default "atmel" - -config SYS_SOC - default "at32ap700x" - -config SYS_CONFIG_NAME - default "atstk1004" - -endif - -if TARGET_ATSTK1006 - -config SYS_BOARD - default "atstk1000" - -config SYS_VENDOR - default "atmel" - -config SYS_SOC - default "at32ap700x" - -config SYS_CONFIG_NAME - default "atstk1006" - -endif diff --git a/board/atmel/atstk1000/MAINTAINERS b/board/atmel/atstk1000/MAINTAINERS index 378e1b3dbc..1070f98e53 100644 --- a/board/atmel/atstk1000/MAINTAINERS +++ b/board/atmel/atstk1000/MAINTAINERS @@ -1,12 +1,6 @@ ATSTK1000 BOARD -#M: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> -S: Orphan (since 2014-06) +M: Andreas Bießmann <andreas.biessmann@corscience.de> +S: Maintained F: board/atmel/atstk1000/ F: include/configs/atstk1002.h F: configs/atstk1002_defconfig -F: include/configs/atstk1003.h -F: configs/atstk1003_defconfig -F: include/configs/atstk1004.h -F: configs/atstk1004_defconfig -F: include/configs/atstk1006.h -F: configs/atstk1006_defconfig diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c index fd4363bece..679b67432c 100644 --- a/board/atmel/atstk1000/atstk1000.c +++ b/board/atmel/atstk1000/atstk1000.c @@ -30,32 +30,12 @@ struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { }; static const struct sdram_config sdram_config = { -#if defined(CONFIG_ATSTK1006) - /* Dual MT48LC16M16A2-7E (64 MB) on daughterboard */ .data_bits = SDRAM_DATA_32BIT, - .row_bits = 13, - .col_bits = 9, - .bank_bits = 2, - .cas = 2, - .twr = 2, - .trc = 7, - .trp = 2, - .trcd = 2, - .tras = 4, - .txsr = 7, - /* 7.81 us */ - .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, -#else - /* MT48LC2M32B2P-5 (8 MB) on motherboard */ -#ifdef CONFIG_ATSTK1004 - .data_bits = SDRAM_DATA_16BIT, -#else - .data_bits = SDRAM_DATA_32BIT, -#endif #ifdef CONFIG_ATSTK1000_16MB_SDRAM /* MT48LC4M32B2P-6 (16 MB) on mod'ed motherboard */ .row_bits = 12, #else + /* MT48LC2M32B2P-5 (8 MB) on motherboard */ .row_bits = 11, #endif .col_bits = 8, @@ -69,7 +49,6 @@ static const struct sdram_config sdram_config = { .txsr = 5, /* 15.6 us */ .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, -#endif }; int board_early_init_f(void) diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c index e434ed9b87..2237b7aa1f 100644 --- a/board/bachmann/ot1200/ot1200.c +++ b/board/bachmann/ot1200/ot1200.c @@ -120,6 +120,42 @@ static void setup_iomux_features(void) ARRAY_SIZE(feature_pads)); } +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C2 - EEPROM */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC, + .gp = IMX_GPIO_NR(2, 30) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D16__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC, + .gp = IMX_GPIO_NR(3, 16) + } +}; + +/* I2C3 - IO expander */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC, + .gp = IMX_GPIO_NR(3, 17) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC, + .gp = IMX_GPIO_NR(3, 18) + } +}; + +static void setup_iomux_i2c(void) +{ + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); +} + static void ccgr_init(void) { struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; @@ -151,6 +187,7 @@ int board_early_init_f(void) setup_iomux_uart(); setup_iomux_spi(); + setup_iomux_i2c(); setup_iomux_features(); return 0; @@ -236,22 +273,6 @@ int board_mmc_init(bd_t *bis) return 0; } -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) - -/* I2C3 - IO expander */ -static struct i2c_pads_info i2c_pad_info2 = { - .scl = { - .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC, - .gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC, - .gp = IMX_GPIO_NR(3, 17) - }, - .sda = { - .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC, - .gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC, - .gp = IMX_GPIO_NR(3, 18) - } -}; - static iomux_v3_cfg_t const pwm_pad[] = { MX6_PAD_SD1_CMD__PWM4_OUT | MUX_PAD_CTRL(OUTPUT_40OHM), }; @@ -315,8 +336,6 @@ int board_init(void) backlight_lcd_off(); - setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); - leds_on(); #ifdef CONFIG_CMD_SATA diff --git a/board/coreboot/coreboot/Kconfig b/board/coreboot/coreboot/Kconfig index 6a04158f16..3ff64f4084 100644 --- a/board/coreboot/coreboot/Kconfig +++ b/board/coreboot/coreboot/Kconfig @@ -16,21 +16,21 @@ comment "coreboot-specific options" config SYS_CONFIG_NAME string "Board configuration file" - default "chromebook_link" + default "qemu-x86" help This option selects the board configuration file in include/configs/ directory to be used to build U-Boot for coreboot. config DEFAULT_DEVICE_TREE string "Board Device Tree Source (dts) file" - default "chromebook_link" + default "qemu-x86_i440fx" help This option selects the board Device Tree Source (dts) file in arch/x86/dts/ directory to be used to build U-Boot for coreboot. config SYS_CAR_ADDR hex "Board specific Cache-As-RAM (CAR) address" - default 0x19200000 + default 0x01920000 help This option specifies the board specific Cache-As-RAM (CAR) address. diff --git a/board/earthlcd/favr-32-ezkit/Kconfig b/board/earthlcd/favr-32-ezkit/Kconfig deleted file mode 100644 index 50e29ec241..0000000000 --- a/board/earthlcd/favr-32-ezkit/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_FAVR_32_EZKIT - -config SYS_BOARD - default "favr-32-ezkit" - -config SYS_VENDOR - default "earthlcd" - -config SYS_SOC - default "at32ap700x" - -config SYS_CONFIG_NAME - default "favr-32-ezkit" - -endif diff --git a/board/earthlcd/favr-32-ezkit/MAINTAINERS b/board/earthlcd/favr-32-ezkit/MAINTAINERS deleted file mode 100644 index 89ba862149..0000000000 --- a/board/earthlcd/favr-32-ezkit/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -FAVR-32-EZKIT BOARD -#M: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> -S: Orphan (since 2014-06) -F: board/earthlcd/favr-32-ezkit/ -F: include/configs/favr-32-ezkit.h -F: configs/favr-32-ezkit_defconfig diff --git a/board/earthlcd/favr-32-ezkit/Makefile b/board/earthlcd/favr-32-ezkit/Makefile deleted file mode 100644 index f712ab9c7a..0000000000 --- a/board/earthlcd/favr-32-ezkit/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2001-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2008 Atmel Corporation -# -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := favr-32-ezkit.o flash.o diff --git a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c deleted file mode 100644 index f9ac330c33..0000000000 --- a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (C) 2008 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <netdev.h> - -#include <asm/io.h> -#include <asm/sdram.h> -#include <asm/arch/clk.h> -#include <asm/arch/hmatrix.h> -#include <asm/arch/mmu.h> -#include <asm/arch/portmux.h> - -DECLARE_GLOBAL_DATA_PTR; - -struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { - { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_NONE, - }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_WRBACK, - }, -}; - -static const struct sdram_config sdram_config = { - /* MT48LC4M32B2P-6 (16 MB) */ - .data_bits = SDRAM_DATA_32BIT, - .row_bits = 12, - .col_bits = 8, - .bank_bits = 2, - .cas = 3, - .twr = 2, - .trc = 7, - .trp = 2, - .trcd = 2, - .tras = 5, - .txsr = 5, - /* 15.6 us */ - .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, -}; - -int board_early_init_f(void) -{ - /* Enable SDRAM in the EBI mux */ - hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); - - portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH); - - sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); - - portmux_enable_usart3(PORTMUX_DRIVE_MIN); -#if defined(CONFIG_MACB) - portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH); -#endif -#if defined(CONFIG_MMC) - portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW); -#endif - - return 0; -} - -int board_early_init_r(void) -{ - gd->bd->bi_phy_id[0] = 0x01; - return 0; -} - -#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET) -int board_eth_init(bd_t *bi) -{ - return macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, - bi->bi_phy_id[0]); -} -#endif diff --git a/board/earthlcd/favr-32-ezkit/flash.c b/board/earthlcd/favr-32-ezkit/flash.c deleted file mode 100644 index e45c6f4d01..0000000000 --- a/board/earthlcd/favr-32-ezkit/flash.c +++ /dev/null @@ -1,216 +0,0 @@ -/* - * Copyright (C) 2008 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> - -#ifdef CONFIG_FAVR32_EZKIT_EXT_FLASH -#include <asm/arch/cacheflush.h> -#include <asm/io.h> -#include <asm/sections.h> - -DECLARE_GLOBAL_DATA_PTR; - -flash_info_t flash_info[1]; - -static void flash_identify(uint16_t *flash, flash_info_t *info) -{ - unsigned long flags; - - flags = disable_interrupts(); - - dcache_flush_unlocked(); - - writew(0xaa, flash + 0x555); - writew(0x55, flash + 0xaaa); - writew(0x90, flash + 0x555); - info->flash_id = readl(flash); - writew(0xff, flash); - - readw(flash); - - if (flags) - enable_interrupts(); -} - -unsigned long flash_init(void) -{ - unsigned long addr; - unsigned int i; - - flash_info[0].size = CONFIG_SYS_FLASH_SIZE; - flash_info[0].sector_count = 135; - - flash_identify(uncached((void *)CONFIG_SYS_FLASH_BASE), &flash_info[0]); - - for (i = 0, addr = 0; i < 8; i++, addr += 0x2000) - flash_info[0].start[i] = addr; - for (; i < flash_info[0].sector_count; i++, addr += 0x10000) - flash_info[0].start[i] = addr; - - return CONFIG_SYS_FLASH_SIZE; -} - -void flash_print_info(flash_info_t *info) -{ - printf("Flash: Vendor ID: 0x%02lx, Product ID: 0x%02lx\n", - info->flash_id >> 16, info->flash_id & 0xffff); - printf("Size: %ld MB in %d sectors\n", - info->size >> 10, info->sector_count); -} - -int flash_erase(flash_info_t *info, int s_first, int s_last) -{ - unsigned long flags; - unsigned long start_time; - uint16_t *fb, *sb; - unsigned int i; - int ret; - uint16_t status; - - if ((s_first < 0) || (s_first > s_last) - || (s_last >= info->sector_count)) { - puts("Error: first and/or last sector out of range\n"); - return ERR_INVAL; - } - - for (i = s_first; i < s_last; i++) - if (info->protect[i]) { - printf("Error: sector %d is protected\n", i); - return ERR_PROTECTED; - } - - fb = (uint16_t *)uncached(info->start[0]); - - dcache_flush_unlocked(); - - for (i = s_first; (i <= s_last) && !ctrlc(); i++) { - printf("Erasing sector %3d...", i); - - sb = (uint16_t *)uncached(info->start[i]); - - flags = disable_interrupts(); - - start_time = get_timer(0); - - /* Unlock sector */ - writew(0xaa, fb + 0x555); - writew(0x70, sb); - - /* Erase sector */ - writew(0xaa, fb + 0x555); - writew(0x55, fb + 0xaaa); - writew(0x80, fb + 0x555); - writew(0xaa, fb + 0x555); - writew(0x55, fb + 0xaaa); - writew(0x30, sb); - - /* Wait for completion */ - ret = ERR_OK; - do { - /* TODO: Timeout */ - status = readw(sb); - } while ((status != 0xffff) && !(status & 0x28)); - - writew(0xf0, fb); - - /* - * Make sure the command actually makes it to the bus - * before we re-enable interrupts. - */ - readw(fb); - - if (flags) - enable_interrupts(); - - if (status != 0xffff) { - printf("Flash erase error at address 0x%p: 0x%02x\n", - sb, status); - ret = ERR_PROG_ERROR; - break; - } - } - - if (ctrlc()) - printf("User interrupt!\n"); - - return ERR_OK; -} - -int write_buff(flash_info_t *info, uchar *src, - ulong addr, ulong count) -{ - unsigned long flags; - uint16_t *base, *p, *s, *end; - uint16_t word, status, status1; - int ret = ERR_OK; - - if (addr < info->start[0] - || (addr + count) > (info->start[0] + info->size) - || (addr + count) < addr) { - puts("Error: invalid address range\n"); - return ERR_INVAL; - } - - if (addr & 1 || count & 1 || (unsigned int)src & 1) { - puts("Error: misaligned source, destination or count\n"); - return ERR_ALIGN; - } - - base = (uint16_t *)uncached(info->start[0]); - end = (uint16_t *)uncached(addr + count); - - flags = disable_interrupts(); - - dcache_flush_unlocked(); - sync_write_buffer(); - - for (p = (uint16_t *)uncached(addr), s = (uint16_t *)src; - p < end && !ctrlc(); p++, s++) { - word = *s; - - writew(0xaa, base + 0x555); - writew(0x55, base + 0xaaa); - writew(0xa0, base + 0x555); - writew(word, p); - - sync_write_buffer(); - - /* Wait for completion */ - status1 = readw(p); - do { - /* TODO: Timeout */ - status = status1; - status1 = readw(p); - } while (((status ^ status1) & 0x40) /* toggled */ - && !(status1 & 0x28)); /* error bits */ - - /* - * We'll need to check once again for toggle bit - * because the toggle bit may stop toggling as I/O5 - * changes to "1" (ref at49bv642.pdf p9) - */ - status1 = readw(p); - status = readw(p); - if ((status ^ status1) & 0x40) { - printf("Flash write error at address 0x%p: " - "0x%02x != 0x%02x\n", - p, status,word); - ret = ERR_PROG_ERROR; - writew(0xf0, base); - readw(base); - break; - } - - writew(0xf0, base); - readw(base); - } - - if (flags) - enable_interrupts(); - - return ret; -} - -#endif /* CONFIG_FAVR32_EZKIT_EXT_FLASH */ diff --git a/board/emulation/Kconfig b/board/emulation/Kconfig new file mode 100644 index 0000000000..36809fd376 --- /dev/null +++ b/board/emulation/Kconfig @@ -0,0 +1,25 @@ +# +# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +if VENDOR_EMULATION + +choice + prompt "Mainboard model" + +config TARGET_QEMU_X86 + bool "QEMU x86" + help + This is the QEMU emulated x86 board. U-Boot supports running + as a coreboot payload as well as bare boot without coreboot. + There are two types of x86 boards supported by QEMU which are + supported by U-Boot. They are via QEMU '-M pc', an i440FX/PIIX + chipset platform and '-M q35', a Q35/ICH9 chipset platform. + +endchoice + +source "board/emulation/qemu-x86/Kconfig" + +endif diff --git a/board/emulation/qemu-x86/Kconfig b/board/emulation/qemu-x86/Kconfig new file mode 100644 index 0000000000..e777ef4409 --- /dev/null +++ b/board/emulation/qemu-x86/Kconfig @@ -0,0 +1,24 @@ +if TARGET_QEMU_X86 + +config SYS_BOARD + default "qemu-x86" + +config SYS_VENDOR + default "emulation" + +config SYS_SOC + default "qemu" + +config SYS_CONFIG_NAME + default "qemu-x86" + +config SYS_TEXT_BASE + default 0xfff00000 + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select X86_RESET_VECTOR + select QEMU + select BOARD_ROMSIZE_KB_1024 + +endif diff --git a/board/emulation/qemu-x86/MAINTAINERS b/board/emulation/qemu-x86/MAINTAINERS new file mode 100644 index 0000000000..ea4dd19354 --- /dev/null +++ b/board/emulation/qemu-x86/MAINTAINERS @@ -0,0 +1,6 @@ +QEMU X86 BOARD +M: Bin Meng <bmeng.cn@gmail.com> +S: Maintained +F: board/emulation/qemu-x86/ +F: include/configs/qemu-x86.h +F: configs/qemu-x86_defconfig diff --git a/board/emulation/qemu-x86/Makefile b/board/emulation/qemu-x86/Makefile new file mode 100644 index 0000000000..ad2bbb94a2 --- /dev/null +++ b/board/emulation/qemu-x86/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += qemu-x86.o start.o diff --git a/board/emulation/qemu-x86/qemu-x86.c b/board/emulation/qemu-x86/qemu-x86.c new file mode 100644 index 0000000000..fedea81abc --- /dev/null +++ b/board/emulation/qemu-x86/qemu-x86.c @@ -0,0 +1,13 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <netdev.h> + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/emulation/qemu-x86/start.S b/board/emulation/qemu-x86/start.S new file mode 100644 index 0000000000..a71db69be9 --- /dev/null +++ b/board/emulation/qemu-x86/start.S @@ -0,0 +1,9 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +.globl early_board_init +early_board_init: + jmp early_board_init_ret diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 5fa5d6a4de..d406c83481 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -191,7 +191,8 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = { IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), /* IOEXP_IRQ# */ IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), - + /* CAN_STBY */ + IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG), /* MX6_LOCLED# */ IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), /* GPS_SHDN */ @@ -204,11 +205,17 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = { IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), /* PCI_RST# (GW522x) */ IOMUX_PADS(PAD_EIM_D23__GPIO3_IO23 | DIO_PAD_CFG), + /* RS485_EN */ + IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG), /* PCIESKT_WDIS# */ IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG), }; static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { + /* CAN_STBY */ + IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG), + /* USB_HUBRST# */ + IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG), /* PANLEDG# */ IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */ @@ -227,36 +234,46 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), /* PCI_RST# */ IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), + /* RS485_EN */ + IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG), /* PCIESKT_WDIS# */ IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG), }; static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { + /* CAN_STBY */ + IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG), /* PANLEDG# */ IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */ - IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG), + IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), /* MX6_LOCLED# */ IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), + /* USB_HUBRST# */ + IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16 | DIO_PAD_CFG), /* MIPI_DIO */ IOMUX_PADS(PAD_SD1_DAT3__GPIO1_IO21 | DIO_PAD_CFG), /* RS485_EN */ IOMUX_PADS(PAD_EIM_D24__GPIO3_IO24 | DIO_PAD_CFG), /* IOEXP_PWREN# */ - IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), + IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), /* IOEXP_IRQ# */ - IOMUX_PADS(PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), /* DIOI2C_DIS# */ IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG), /* PCI_RST# */ IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), /* VID_EN */ IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), + /* RS485_EN */ + IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG), /* PCIESKT_WDIS# */ IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG), }; static iomux_v3_cfg_t const gw551x_gpio_pads[] = { + /* CAN_STBY */ + IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG), /* PANLED# */ IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), /* PCI_RST# */ @@ -266,6 +283,10 @@ static iomux_v3_cfg_t const gw551x_gpio_pads[] = { }; static iomux_v3_cfg_t const gw552x_gpio_pads[] = { + /* USBOTG_SEL */ + IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG), + /* USB_HUBRST# */ + IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG), /* PANLEDG# */ IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */ @@ -522,12 +543,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = { .num_pads = ARRAY_SIZE(gw551x_gpio_pads)/2, .dio_cfg = { { - { IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) }, - IMX_GPIO_NR(1, 16), - { 0, 0 }, - 0 - }, - { { IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) }, IMX_GPIO_NR(1, 19), { IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) }, @@ -539,12 +554,6 @@ struct ventana gpio_cfg[GW_UNKNOWN] = { { IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) }, 3 }, - { - { IOMUX_PADS(PAD_SD1_CMD__GPIO1_IO18) }, - IMX_GPIO_NR(1, 18), - { IOMUX_PADS(PAD_SD1_CMD__PWM4_OUT) }, - 4 - }, }, .num_gpios = 2, .leds = { @@ -560,6 +569,12 @@ struct ventana gpio_cfg[GW_UNKNOWN] = { .num_pads = ARRAY_SIZE(gw552x_gpio_pads)/2, .dio_cfg = { { + { IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) }, + IMX_GPIO_NR(1, 16), + { 0, 0 }, + 0 + }, + { { IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) }, IMX_GPIO_NR(1, 19), { IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) }, @@ -571,6 +586,12 @@ struct ventana gpio_cfg[GW_UNKNOWN] = { { IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) }, 3 }, + { + {IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) }, + IMX_GPIO_NR(1, 20), + { 0, 0 }, + 0 + }, }, .num_gpios = 4, .leds = { @@ -579,6 +600,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = { IMX_GPIO_NR(4, 15), }, .pcie_rst = IMX_GPIO_NR(1, 29), + .usb_sel = IMX_GPIO_NR(1, 7), .wdis = IMX_GPIO_NR(7, 12), }, }; @@ -712,7 +734,7 @@ void setup_board_gpio(int board, struct ventana_board_info *info) * Configure DIO pinmux/padctl registers * see IMX6DQRM/IMX6SDLRM IOMUXC_SW_PAD_CTL_PAD_* register definitions */ - for (i = 0; i < 4; i++) { + for (i = 0; i < gpio_cfg[board].num_gpios; i++) { struct dio_cfg *cfg = &gpio_cfg[board].dio_cfg[i]; iomux_v3_cfg_t ctrl = DIO_PAD_CFG; unsigned cputype = is_cpu_type(MXC_CPU_MX6Q) ? 0 : 1; diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index b7c0e96f2d..28f58160de 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -34,10 +34,6 @@ PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) -#define DIO_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST) - #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ PAD_CTL_ODE | PAD_CTL_SRE_FAST) @@ -46,7 +42,7 @@ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST) -#define DIO_PAD_CFG (MUX_PAD_CTRL(DIO_PAD_CTRL) | MUX_MODE_SION) +#define DIO_PAD_CFG (MUX_PAD_CTRL(IRQ_PAD_CTRL) | MUX_MODE_SION) #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 22f3b3860b..3b7c82b1dc 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -157,20 +157,18 @@ static iomux_v3_cfg_t const usb_pads[] = { int board_ehci_hcd_init(int port) { - struct ventana_board_info *info = &ventana_info; int gpio; SETUP_IOMUX_PADS(usb_pads); - /* Reset USB HUB (present on GW54xx/GW53xx) */ - switch (info->model[3]) { - case '3': /* GW53xx */ - case '5': /* GW552x */ - SETUP_IOMUX_PAD(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG); + /* Reset USB HUB */ + switch (board_type) { + case GW53xx: + case GW552x: gpio = (IMX_GPIO_NR(1, 9)); break; - case '4': /* GW54xx */ - SETUP_IOMUX_PAD(PAD_SD1_DAT0__GPIO1_IO16 | DIO_PAD_CFG); + case GW54proto: + case GW54xx: gpio = (IMX_GPIO_NR(1, 16)); break; default: @@ -687,8 +685,7 @@ int misc_init_r(void) memset(str, 0, sizeof(str)); for (i = 0; i < (sizeof(str)-1) && info->model[i]; i++) str[i] = tolower(info->model[i]); - if (!getenv("model")) - setenv("model", str); + setenv("model", str); if (!getenv("fdt_file")) { sprintf(fdt, "%s-%s.dtb", cputype, str); setenv("fdt_file", fdt); @@ -698,18 +695,14 @@ int misc_init_r(void) *p++ = 0; setenv("model_base", str); - if (!getenv("fdt_file1")) { - sprintf(fdt, "%s-%s.dtb", cputype, str); - setenv("fdt_file1", fdt); - } + sprintf(fdt, "%s-%s.dtb", cputype, str); + setenv("fdt_file1", fdt); if (board_type != GW551x && board_type != GW552x) str[4] = 'x'; str[5] = 'x'; str[6] = 0; - if (!getenv("fdt_file2")) { - sprintf(fdt, "%s-%s.dtb", cputype, str); - setenv("fdt_file2", fdt); - } + sprintf(fdt, "%s-%s.dtb", cputype, str); + setenv("fdt_file2", fdt); } /* initialize env from EEPROM */ @@ -818,9 +811,11 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; } - /* Update partition nodes using info from mtdparts env var */ - puts(" Updating MTD partitions...\n"); - fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); + if (test_bit(EECONFIG_NAND, info->config)) { + /* Update partition nodes using info from mtdparts env var */ + puts(" Updating MTD partitions...\n"); + fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); + } /* Update display timings from display env var */ if (display) { @@ -829,10 +824,6 @@ int ft_board_setup(void *blob, bd_t *bd) printf(" Set display timings for %s...\n", display); } - if (!model) { - puts("invalid board info: Leaving FDT fully enabled\n"); - return 0; - } printf(" Adjusting FDT per EEPROM for %s...\n", model); /* board serial number */ diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index 9f5d2b17cd..d4418e554c 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -515,10 +515,8 @@ void board_init_f(ulong dummy) setup_iomux_gpio(board_model, &ventana_info); /* provide some some default: 32bit 128MB */ - if (GW_UNKNOWN == board_model) { - ventana_info.sdram_width = 2; - ventana_info.sdram_size = 3; - } + if (GW_UNKNOWN == board_model) + hang(); /* configure MMDC for SDRAM width/size and per-model calibration */ spl_dram_init(8 << ventana_info.sdram_width, diff --git a/board/gumstix/pepper/board.c b/board/gumstix/pepper/board.c index beb2fac374..d76c28bd3c 100644 --- a/board/gumstix/pepper/board.c +++ b/board/gumstix/pepper/board.c @@ -33,6 +33,46 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_SPL_BUILD +#define OSC (V_OSCK/1000000) + +static const struct ddr_data ddr3_data = { + .datardsratio0 = MT41K256M16HA125E_RD_DQS, + .datawdsratio0 = MT41K256M16HA125E_WR_DQS, + .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, + .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, +}; + +static const struct cmd_control ddr3_cmd_ctrl_data = { + .cmd0csratio = MT41K256M16HA125E_RATIO, + .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd1csratio = MT41K256M16HA125E_RATIO, + .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd2csratio = MT41K256M16HA125E_RATIO, + .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT, +}; + +static struct emif_regs ddr3_emif_reg_data = { + .sdram_config = MT41K256M16HA125E_EMIF_SDCFG, + .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF, + .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1, + .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2, + .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3, + .zq_config = MT41K256M16HA125E_ZQ_CFG, + .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY, +}; + +const struct dpll_params dpll_ddr3 = {400, OSC-1, 1, -1, -1, -1, -1}; + +const struct ctrl_ioregs ioregs_ddr3 = { + .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, +}; + static const struct ddr_data ddr2_data = { .datardsratio0 = MT47H128M16RT25E_RD_DQS, .datafwsratio0 = MT47H128M16RT25E_PHY_FIFO_WE, @@ -56,6 +96,70 @@ static const struct emif_regs ddr2_emif_reg_data = { .emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY, }; +const struct dpll_params dpll_ddr2 = {266, OSC-1, 1, -1, -1, -1, -1}; + +const struct ctrl_ioregs ioregs_ddr2 = { + .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, +}; + +static int read_eeprom(struct pepper_board_id *header) +{ + if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) { + return -ENODEV; + } + + if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1, (uchar *)header, + sizeof(struct pepper_board_id))) { + return -EIO; + } + + return 0; +} + +const struct dpll_params *get_dpll_ddr_params(void) +{ + struct pepper_board_id header; + + enable_i2c0_pin_mux(); + i2c_set_bus_num(0); + + if (read_eeprom(&header) < 0) + return &dpll_ddr3; + + switch (header.device_vendor) { + case GUMSTIX_PEPPER: + return &dpll_ddr2; + case GUMSTIX_PEPPER_DVI: + return &dpll_ddr3; + default: + return &dpll_ddr3; + } +} + +void sdram_init(void) +{ + const struct dpll_params *dpll = get_dpll_ddr_params(); + + /* + * Here we are assuming PLL clock reveals the type of RAM. + * DDR2 = 266 + * DDR3 = 400 + * Note that DDR3 is the default. + */ + if (dpll->m == 266) { + config_ddr(dpll->m, &ioregs_ddr2, &ddr2_data, + &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); + } + else if (dpll->m == 400) { + config_ddr(dpll->m, &ioregs_ddr3, &ddr3_data, + &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); + } +} + #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { @@ -64,14 +168,6 @@ int spl_start_uboot(void) } #endif -#define OSC (V_OSCK/1000000) -const struct dpll_params dpll_ddr = {266, OSC-1, 1, -1, -1, -1, -1}; - -const struct dpll_params *get_dpll_ddr_params(void) -{ - return &dpll_ddr; -} - void set_uart_mux_conf(void) { enable_uart0_pin_mux(); @@ -82,19 +178,7 @@ void set_mux_conf_regs(void) enable_board_pin_mux(); } -const struct ctrl_ioregs ioregs = { - .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, - .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, - .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE, - .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, - .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, -}; -void sdram_init(void) -{ - config_ddr(266, &ioregs, &ddr2_data, - &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); -} #endif int board_init(void) diff --git a/board/gumstix/pepper/board.h b/board/gumstix/pepper/board.h index 0512735a7b..a6df3196f4 100644 --- a/board/gumstix/pepper/board.h +++ b/board/gumstix/pepper/board.h @@ -9,6 +9,18 @@ #ifndef _BOARD_H_ #define _BOARD_H_ +#define GUMSTIX_PEPPER 0x30000200 +#define GUMSTIX_PEPPER_DVI 0x31000200 + +struct pepper_board_id { + unsigned int device_vendor; + unsigned char revision; + unsigned char content; + char fab_revision[8]; + char env_var[16]; + char en_setting[64]; +}; + /* * We must be able to enable uart0, for initial output. We then have a * main pinmux function that can be overridden to enable all other pinmux that @@ -16,4 +28,5 @@ */ void enable_uart0_pin_mux(void); void enable_board_pin_mux(void); +void enable_i2c0_pin_mux(void); #endif diff --git a/board/gumstix/pepper/mux.c b/board/gumstix/pepper/mux.c index 50b12666d6..92c73f8df8 100644 --- a/board/gumstix/pepper/mux.c +++ b/board/gumstix/pepper/mux.c @@ -64,6 +64,11 @@ void enable_uart0_pin_mux(void) configure_module_pin_mux(uart0_pin_mux); } +void enable_i2c0_pin_mux(void) +{ + configure_module_pin_mux(i2c0_pin_mux); +} + /* * Do board-specific muxes. */ diff --git a/board/highbank/Makefile b/board/highbank/Makefile index d3eb23220b..ce7ee68d4a 100644 --- a/board/highbank/Makefile +++ b/board/highbank/Makefile @@ -5,4 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y := highbank.o +obj-y := highbank.o ahci.o diff --git a/board/highbank/ahci.c b/board/highbank/ahci.c new file mode 100644 index 0000000000..00153232f6 --- /dev/null +++ b/board/highbank/ahci.c @@ -0,0 +1,218 @@ +/* + * Copyright 2012 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <common.h> +#include <ahci.h> +#include <asm/io.h> + +#define CPHY_MAP(dev, addr) ((((dev) & 0x1f) << 7) | (((addr) >> 9) & 0x7f)) +#define CPHY_ADDR(base, dev, addr) ((base) | (((addr) & 0x1ff) << 2)) +#define CPHY_BASE 0xfff58000 +#define CPHY_WIDTH 0x1000 +#define CPHY_DTE_XS 5 +#define CPHY_MII 31 +#define SERDES_CR_CTL 0x80a0 +#define SERDES_CR_ADDR 0x80a1 +#define SERDES_CR_DATA 0x80a2 +#define CR_BUSY 0x0001 +#define CR_START 0x0001 +#define CR_WR_RDN 0x0002 +#define CPHY_TX_INPUT_STS 0x2001 +#define CPHY_RX_INPUT_STS 0x2002 +#define CPHY_SATA_TX_OVERRIDE_BIT 0x8000 +#define CPHY_SATA_RX_OVERRIDE_BIT 0x4000 +#define CPHY_TX_INPUT_OVERRIDE 0x2004 +#define CPHY_RX_INPUT_OVERRIDE 0x2005 +#define SPHY_LANE 0x100 +#define SPHY_HALF_RATE 0x0001 +#define CPHY_SATA_DPLL_MODE 0x0700 +#define CPHY_SATA_DPLL_SHIFT 8 +#define CPHY_SATA_TX_ATTEN 0x1c00 +#define CPHY_SATA_TX_ATTEN_SHIFT 10 + +#define HB_SREG_SATA_ATTEN 0xfff3cf24 + +#define SATA_PORT_BASE 0xffe08000 +#define SATA_VERSIONR 0xf8 +#define SATA_HB_VERSION 0x3332302a + +static u32 __combo_phy_reg_read(u8 phy, u8 dev, u32 addr) +{ + u32 data; + writel(CPHY_MAP(dev, addr), CPHY_BASE + 0x800 + CPHY_WIDTH * phy); + data = readl(CPHY_ADDR(CPHY_BASE + CPHY_WIDTH * phy, dev, addr)); + return data; +} + +static void __combo_phy_reg_write(u8 phy, u8 dev, u32 addr, u32 data) +{ + writel(CPHY_MAP(dev, addr), CPHY_BASE + 0x800 + CPHY_WIDTH * phy); + writel(data, CPHY_ADDR(CPHY_BASE + CPHY_WIDTH * phy, dev, addr)); +} + +static u32 combo_phy_read(u8 phy, u32 addr) +{ + u8 dev = CPHY_DTE_XS; + if (phy == 5) + dev = CPHY_MII; + while (__combo_phy_reg_read(phy, dev, SERDES_CR_CTL) & CR_BUSY) + udelay(5); + __combo_phy_reg_write(phy, dev, SERDES_CR_ADDR, addr); + __combo_phy_reg_write(phy, dev, SERDES_CR_CTL, CR_START); + while (__combo_phy_reg_read(phy, dev, SERDES_CR_CTL) & CR_BUSY) + udelay(5); + return __combo_phy_reg_read(phy, dev, SERDES_CR_DATA); +} + +static void combo_phy_write(u8 phy, u32 addr, u32 data) +{ + u8 dev = CPHY_DTE_XS; + if (phy == 5) + dev = CPHY_MII; + while (__combo_phy_reg_read(phy, dev, SERDES_CR_CTL) & CR_BUSY) + udelay(5); + __combo_phy_reg_write(phy, dev, SERDES_CR_ADDR, addr); + __combo_phy_reg_write(phy, dev, SERDES_CR_DATA, data); + __combo_phy_reg_write(phy, dev, SERDES_CR_CTL, CR_WR_RDN | CR_START); +} + +static void cphy_spread_spectrum_override(u8 phy, u8 lane, u32 val) +{ + u32 tmp; + tmp = combo_phy_read(phy, CPHY_RX_INPUT_STS + lane * SPHY_LANE); + tmp &= ~CPHY_SATA_RX_OVERRIDE_BIT; + combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); + + tmp |= CPHY_SATA_RX_OVERRIDE_BIT; + combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); + + tmp &= ~CPHY_SATA_DPLL_MODE; + tmp |= (val << CPHY_SATA_DPLL_SHIFT) & CPHY_SATA_DPLL_MODE; + combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); +} + +static void cphy_tx_attenuation_override(u8 phy, u8 lane) +{ + u32 val; + u32 tmp; + u8 shift; + + shift = ((phy == 5) ? 4 : lane) * 4; + + val = (readl(HB_SREG_SATA_ATTEN) >> shift) & 0xf; + + if (val & 0x8) + return; + + tmp = combo_phy_read(phy, CPHY_TX_INPUT_STS + lane * SPHY_LANE); + tmp &= ~CPHY_SATA_TX_OVERRIDE_BIT; + combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); + + tmp |= CPHY_SATA_TX_OVERRIDE_BIT; + combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); + + tmp |= (val << CPHY_SATA_TX_ATTEN_SHIFT) & CPHY_SATA_TX_ATTEN; + combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); +} + +static void cphy_disable_port_overrides(u8 port) +{ + u32 tmp; + u8 lane = 0, phy = 0; + + if (port == 0) + phy = 5; + else if (port < 5) + lane = port - 1; + else + return; + tmp = combo_phy_read(phy, CPHY_RX_INPUT_STS + lane * SPHY_LANE); + tmp &= ~CPHY_SATA_RX_OVERRIDE_BIT; + combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); + + tmp = combo_phy_read(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE); + tmp &= ~CPHY_SATA_TX_OVERRIDE_BIT; + combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); +} + +void cphy_disable_overrides(void) +{ + int i; + u32 port_map; + + port_map = readl(0xffe08000 + HOST_PORTS_IMPL); + for (i = 0; i < 5; i++) { + if (port_map & (1 << i)) + cphy_disable_port_overrides(i); + } +} + +static void cphy_override_lane(u8 port) +{ + u32 tmp, k = 0; + u8 lane = 0, phy = 0; + + if (port == 0) + phy = 5; + else if (port < 5) + lane = port - 1; + else + return; + + do { + tmp = combo_phy_read(0, CPHY_RX_INPUT_STS + + lane * SPHY_LANE); + } while ((tmp & SPHY_HALF_RATE) && (k++ < 1000)); + cphy_spread_spectrum_override(phy, lane, 3); + cphy_tx_attenuation_override(phy, lane); +} + +#define WAIT_MS_LINKUP 4 + +int ahci_link_up(struct ahci_probe_ent *probe_ent, int port) +{ + u32 tmp; + int j = 0; + u8 *port_mmio = (u8 *)probe_ent->port[port].port_mmio; + u32 is_highbank = readl(SATA_PORT_BASE + SATA_VERSIONR) == + SATA_HB_VERSION ? 1 : 0; + + /* Bring up SATA link. + * SATA link bringup time is usually less than 1 ms; only very + * rarely has it taken between 1-2 ms. Never seen it above 2 ms. + */ + while (j < WAIT_MS_LINKUP) { + if (is_highbank && (j == 0)) { + cphy_disable_port_overrides(port); + writel(0x301, port_mmio + PORT_SCR_CTL); + udelay(1000); + writel(0x300, port_mmio + PORT_SCR_CTL); + udelay(1000); + cphy_override_lane(port); + } + + tmp = readl(port_mmio + PORT_SCR_STAT); + if ((tmp & 0xf) == 0x3) + return 0; + udelay(1000); + j++; + + if ((j == WAIT_MS_LINKUP) && (tmp & 0xf)) + j = 0; /* retry phy reset */ + } + return 1; +} diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c index ba1beb5bbc..469ee8e114 100644 --- a/board/highbank/highbank.c +++ b/board/highbank/highbank.c @@ -14,9 +14,11 @@ #define HB_AHCI_BASE 0xffe08000 +#define HB_SCU_A9_PWR_STATUS 0xfff10008 #define HB_SREG_A9_PWR_REQ 0xfff3cf00 #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04 #define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20 +#define HB_SREG_A15_PWR_CTRL 0xfff3c200 #define HB_PWR_SUSPEND 0 #define HB_PWR_SOFT_RESET 1 @@ -27,8 +29,14 @@ #define PWRDOM_STAT_PCI 0x40000000 #define PWRDOM_STAT_EMMC 0x20000000 +#define HB_SCU_A9_PWR_NORMAL 0 +#define HB_SCU_A9_PWR_DORMANT 2 +#define HB_SCU_A9_PWR_OFF 3 + DECLARE_GLOBAL_DATA_PTR; +void cphy_disable_overrides(void); + /* * Miscellaneous platform dependent initialisations */ @@ -56,6 +64,7 @@ void scsi_init(void) { u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); + cphy_disable_overrides(); if (reg & PWRDOM_STAT_SATA) { ahci_init((void __iomem *)HB_AHCI_BASE); scsi_scan(1); @@ -111,9 +120,31 @@ int ft_board_setup(void *fdt, bd_t *bd) } #endif +static int is_highbank(void) +{ + uint32_t midr; + + asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr)); + + return (midr & 0xfff0) == 0xc090; +} + void reset_cpu(ulong addr) { writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ); + if (is_highbank()) + writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS); + else + writel(0x1, HB_SREG_A15_PWR_CTRL); wfi(); } + +/* + * turn off the override before transferring control to Linux, since Linux + * may not support spread spectrum. + */ +void arch_preboot_os(void) +{ + cphy_disable_overrides(); +} diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c index 31bb320213..ad2d5b69d6 100644 --- a/board/intel/crownbay/crownbay.c +++ b/board/intel/crownbay/crownbay.c @@ -12,8 +12,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, 4) -DECLARE_GLOBAL_DATA_PTR; - int board_early_init_f(void) { lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ); diff --git a/board/intel/galileo/galileo.c b/board/intel/galileo/galileo.c index f2e74687ed..746ab277cb 100644 --- a/board/intel/galileo/galileo.c +++ b/board/intel/galileo/galileo.c @@ -6,8 +6,6 @@ #include <common.h> -DECLARE_GLOBAL_DATA_PTR; - int board_early_init_f(void) { return 0; diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c index fd2070afb2..383cae068b 100644 --- a/board/intel/minnowmax/minnowmax.c +++ b/board/intel/minnowmax/minnowmax.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <asm/gpio.h> #include <asm/ibmpc.h> #include <asm/pnp_def.h> #include <netdev.h> @@ -12,7 +13,13 @@ #define SERIAL_DEV PNP_DEV(0x2e, 4) -DECLARE_GLOBAL_DATA_PTR; +int arch_early_init_r(void) +{ + /* do the pin-muxing */ + gpio_ich6_pinctrl_init(); + + return 0; +} int board_early_init_f(void) { diff --git a/board/mimc/mimc200/Kconfig b/board/mimc/mimc200/Kconfig deleted file mode 100644 index 18736d7f96..0000000000 --- a/board/mimc/mimc200/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_MIMC200 - -config SYS_BOARD - default "mimc200" - -config SYS_VENDOR - default "mimc" - -config SYS_SOC - default "at32ap700x" - -config SYS_CONFIG_NAME - default "mimc200" - -endif diff --git a/board/mimc/mimc200/MAINTAINERS b/board/mimc/mimc200/MAINTAINERS deleted file mode 100644 index 6cb51dd3cb..0000000000 --- a/board/mimc/mimc200/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -MIMC200 BOARD -M: Mark Jackson <mpfj@mimc.co.uk> -S: Maintained -F: board/mimc/mimc200/ -F: include/configs/mimc200.h -F: configs/mimc200_defconfig diff --git a/board/mimc/mimc200/Makefile b/board/mimc/mimc200/Makefile deleted file mode 100644 index 5c30c0dbca..0000000000 --- a/board/mimc/mimc200/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# -# Copyright (C) 2005-2006 Atmel Corporation -# -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := mimc200.o diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c deleted file mode 100644 index f078295508..0000000000 --- a/board/mimc/mimc200/mimc200.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <netdev.h> - -#include <asm/io.h> -#include <asm/sdram.h> -#include <asm/arch/clk.h> -#include <asm/arch/gpio.h> -#include <asm/arch/hmatrix.h> -#include <asm/arch/mmu.h> -#include <asm/arch/portmux.h> -#include <atmel_lcdc.h> -#include <lcd.h> - -#include "../../../arch/avr32/cpu/hsmc3.h" - -struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { - { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_NONE, - }, { - .virt_pgno = EBI_SRAM_CS2_BASE >> MMU_PAGE_SHIFT, - .nr_pages = EBI_SRAM_CS2_SIZE >> MMU_PAGE_SHIFT, - .phys = (EBI_SRAM_CS2_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_NONE, - }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_WRBACK, - }, -}; - -#if defined(CONFIG_LCD) -/* 480x272x16 @ 72 Hz */ -vidinfo_t panel_info = { - .vl_col = 480, /* Number of columns */ - .vl_row = 272, /* Number of rows */ - .vl_clk = 5000000, /* pixel clock in ps */ - .vl_sync = ATMEL_LCDC_INVCLK_INVERTED | - ATMEL_LCDC_INVLINE_INVERTED | - ATMEL_LCDC_INVFRAME_INVERTED, - .vl_bpix = LCD_COLOR16, /* Bits per pixel, BPP = 2^n */ - .vl_tft = 1, /* 0 = passive, 1 = TFT */ - .vl_hsync_len = 42, /* Length of horizontal sync */ - .vl_left_margin = 1, /* Time from sync to picture */ - .vl_right_margin = 1, /* Time from picture to sync */ - .vl_vsync_len = 1, /* Length of vertical sync */ - .vl_upper_margin = 12, /* Time from sync to picture */ - .vl_lower_margin = 1, /* Time from picture to sync */ - .mmio = LCDC_BASE, /* Memory mapped registers */ -}; - -void lcd_enable(void) -{ -} - -void lcd_disable(void) -{ -} -#endif - -DECLARE_GLOBAL_DATA_PTR; - -static const struct sdram_config sdram_config = { - .data_bits = SDRAM_DATA_16BIT, - .row_bits = 13, - .col_bits = 9, - .bank_bits = 2, - .cas = 3, - .twr = 2, - .trc = 6, - .trp = 2, - .trcd = 2, - .tras = 6, - .txsr = 6, - /* 15.6 us */ - .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, -}; - -int board_early_init_f(void) -{ - /* Enable SDRAM in the EBI mux */ - hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); - - /* Enable 26 address bits and NCS2 */ - portmux_enable_ebi(16, 26, PORTMUX_EBI_CS(2), PORTMUX_DRIVE_HIGH); - sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); - - portmux_enable_usart1(PORTMUX_DRIVE_MIN); - - /* de-assert "force sys reset" pin */ - portmux_select_gpio(PORTMUX_PORT_D, 1 << 15, - PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH); - - /* init custom i/o */ - /* cpu type inputs */ - portmux_select_gpio(PORTMUX_PORT_E, (1 << 19) | (1 << 20) | (1 << 23), - PORTMUX_DIR_INPUT); - /* main board type inputs */ - portmux_select_gpio(PORTMUX_PORT_B, (1 << 19) | (1 << 29), - PORTMUX_DIR_INPUT); - /* DEBUG input (use weak pullup) */ - portmux_select_gpio(PORTMUX_PORT_E, 1 << 21, - PORTMUX_DIR_INPUT | PORTMUX_PULL_UP); - - /* are we suppressing the console ? */ - if (gpio_get_value(GPIO_PIN_PE(21)) == 1) - gd->flags |= (GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE); - - /* reset phys */ - portmux_select_gpio(PORTMUX_PORT_E, 1 << 24, PORTMUX_DIR_INPUT); - portmux_select_gpio(PORTMUX_PORT_C, 1 << 18, - PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH); - - udelay(5000); - - /* release phys reset */ - gpio_set_value(GPIO_PIN_PC(18), 0); /* PHY RESET (Release) */ - - /* setup Data Flash chip select (NCS2) */ - hsmc3_writel(MODE2, 0x20121003); - hsmc3_writel(CYCLE2, 0x000a0009); - hsmc3_writel(PULSE2, 0x0a060806); - hsmc3_writel(SETUP2, 0x00030102); - - /* setup FRAM chip select (NCS3) */ - hsmc3_writel(MODE3, 0x10120001); - hsmc3_writel(CYCLE3, 0x001e001d); - hsmc3_writel(PULSE3, 0x08040704); - hsmc3_writel(SETUP3, 0x02050204); - -#if defined(CONFIG_MACB) - /* init macb0 pins */ - portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH); - portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH); -#endif - -#if defined(CONFIG_MMC) - portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW); -#endif - -#if defined(CONFIG_LCD) - portmux_enable_lcdc(1); -#endif - - return 0; -} - -int board_early_init_r(void) -{ - gd->bd->bi_phy_id[0] = 0x01; - gd->bd->bi_phy_id[1] = 0x03; - return 0; -} - -int board_postclk_init(void) -{ - /* Use GCLK0 as 10MHz output */ - gclk_enable_output(0, PORTMUX_DRIVE_LOW); - gclk_set_rate(0, GCLK_PARENT_OSC0, 10000000); - return 0; -} - -/* SPI chip select control */ -#ifdef CONFIG_ATMEL_SPI -#include <spi.h> - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return (bus == 0) && (cs == 0); -} - -void spi_cs_activate(struct spi_slave *slave) -{ -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ -} -#endif /* CONFIG_ATMEL_SPI */ - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bi) -{ - macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]); - macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]); - - return 0; -} -#endif diff --git a/board/miromico/hammerhead/Kconfig b/board/miromico/hammerhead/Kconfig deleted file mode 100644 index 1f09ef782e..0000000000 --- a/board/miromico/hammerhead/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_HAMMERHEAD - -config SYS_BOARD - default "hammerhead" - -config SYS_VENDOR - default "miromico" - -config SYS_SOC - default "at32ap700x" - -config SYS_CONFIG_NAME - default "hammerhead" - -endif diff --git a/board/miromico/hammerhead/MAINTAINERS b/board/miromico/hammerhead/MAINTAINERS deleted file mode 100644 index a87ceeeb73..0000000000 --- a/board/miromico/hammerhead/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -HAMMERHEAD BOARD -M: Alex Raimondi <alex.raimondi@miromico.ch> -S: Maintained -F: board/miromico/hammerhead/ -F: include/configs/hammerhead.h -F: configs/hammerhead_defconfig diff --git a/board/miromico/hammerhead/Makefile b/board/miromico/hammerhead/Makefile deleted file mode 100644 index 638a9df930..0000000000 --- a/board/miromico/hammerhead/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# -# Copyright (C) 2008 Miromico AG -# -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := hammerhead.o diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c deleted file mode 100644 index a0c7d3b323..0000000000 --- a/board/miromico/hammerhead/hammerhead.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2008 Miromico AG - * - * Mostly copied form atmel ATNGW100 sources - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <netdev.h> - -#include <asm/io.h> -#include <asm/sdram.h> -#include <asm/arch/clk.h> -#include <asm/arch/hmatrix.h> -#include <asm/arch/hardware.h> -#include <asm/arch/mmu.h> -#include <asm/arch/portmux.h> - -DECLARE_GLOBAL_DATA_PTR; - -struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { - { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_NONE, - }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_WRBACK, - }, -}; - -static const struct sdram_config sdram_config = { - .data_bits = SDRAM_DATA_32BIT, - .row_bits = 13, - .col_bits = 9, - .bank_bits = 2, - .cas = 3, - .twr = 2, - .trc = 7, - .trp = 2, - .trcd = 2, - .tras = 5, - .txsr = 5, - /* 7.81 us */ - .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, -}; - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - return macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, - bis->bi_phy_id[0]); -} -#endif - -int board_early_init_f(void) -{ - /* Enable SDRAM in the EBI mux */ - hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); - - portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH); - sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); - - portmux_enable_usart1(PORTMUX_DRIVE_MIN); - -#if defined(CONFIG_MACB) - portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH); -#endif -#if defined(CONFIG_MMC) - portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW); -#endif - return 0; -} - -int board_early_init_r(void) -{ - gd->bd->bi_phy_id[0] = 0x01; - return 0; -} - -int board_postclk_init(void) -{ - /* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */ - gclk_enable_output(3, PORTMUX_DRIVE_LOW); - gclk_set_rate(3, GCLK_PARENT_OSC0, 25000000); - return 0; -} diff --git a/board/nokia/rx51/lowlevel_init.S b/board/nokia/rx51/lowlevel_init.S index 9d4ea1b3f9..420ad13a12 100644 --- a/board/nokia/rx51/lowlevel_init.S +++ b/board/nokia/rx51/lowlevel_init.S @@ -105,10 +105,6 @@ fix_start: /* r6 - maximal u-boot size */ ldr r6, imagesize - /* fix return address */ - subhi lr, lr, r5 - addlo lr, lr, r5 - /* r1 - start of u-boot after */ ldr r1, startaddr diff --git a/board/nvidia/nyan-big/MAINTAINERS b/board/nvidia/nyan-big/MAINTAINERS index ff74627af2..779077729c 100644 --- a/board/nvidia/nyan-big/MAINTAINERS +++ b/board/nvidia/nyan-big/MAINTAINERS @@ -1,4 +1,4 @@ -NORRIN BOARD +NYAN-BIG BOARD M: Allen Martin <amartin@nvidia.com> S: Maintained F: board/nvidia/nyan-big/ diff --git a/board/nvidia/nyan-big/nyan-big.c b/board/nvidia/nyan-big/nyan-big.c index ae8874bbd2..ba96401890 100644 --- a/board/nvidia/nyan-big/nyan-big.c +++ b/board/nvidia/nyan-big/nyan-big.c @@ -8,7 +8,12 @@ #include <common.h> #include <errno.h> #include <asm/gpio.h> +#include <asm/io.h> #include <asm/arch/pinmux.h> +#include <asm/arch/clock.h> +#include <asm/arch/mc.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/pmc.h> #include <power/as3722.h> #include <power/pmic.h> #include "pinmux-config-nyan-big.h" @@ -57,3 +62,67 @@ int tegra_lcd_pmic_init(int board_id) return 0; } + +/* Setup required information for Linux kernel */ +static void setup_kernel_info(void) +{ + struct mc_ctlr *mc = (void *)NV_PA_MC_BASE; + + /* The kernel graphics driver needs this region locked down */ + writel(0, &mc->mc_video_protect_bom); + writel(0, &mc->mc_video_protect_size_mb); + writel(1, &mc->mc_video_protect_reg_ctrl); +} + +/* + * We need to take ALL audio devices conntected to AHUB (AUDIO, APBIF, + * I2S, DAM, AMX, ADX, SPDIF, AFC) out of reset and enable the clocks. + * Otherwise reading AHUB devices will hang when the kernel boots. + */ +static void enable_required_clocks(void) +{ + static enum periph_id ids[] = { + PERIPH_ID_I2S0, + PERIPH_ID_I2S1, + PERIPH_ID_I2S2, + PERIPH_ID_I2S3, + PERIPH_ID_I2S4, + PERIPH_ID_AUDIO, + PERIPH_ID_APBIF, + PERIPH_ID_DAM0, + PERIPH_ID_DAM1, + PERIPH_ID_DAM2, + PERIPH_ID_AMX0, + PERIPH_ID_AMX1, + PERIPH_ID_ADX0, + PERIPH_ID_ADX1, + PERIPH_ID_SPDIF, + PERIPH_ID_AFC0, + PERIPH_ID_AFC1, + PERIPH_ID_AFC2, + PERIPH_ID_AFC3, + PERIPH_ID_AFC4, + PERIPH_ID_AFC5, + PERIPH_ID_EXTPERIPH1 + }; + int i; + + for (i = 0; i < ARRAY_SIZE(ids); i++) + clock_enable(ids[i]); + udelay(2); + for (i = 0; i < ARRAY_SIZE(ids); i++) + reset_set_enable(ids[i], 0); +} + +int nvidia_board_init(void) +{ + clock_start_periph_pll(PERIPH_ID_EXTPERIPH1, CLOCK_ID_OSC, 12000000); + clock_start_periph_pll(PERIPH_ID_I2S1, CLOCK_ID_OSC, 1500000); + + /* For external MAX98090 audio codec */ + clock_external_output(1); + setup_kernel_info(); + enable_required_clocks(); + + return 0; +} diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index 20dd75c22e..1a4e8c9c99 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -24,8 +24,9 @@ #include <asm/arch/sromc.h> #include <lcd.h> #include <i2c.h> -#include <samsung/misc.h> #include <usb.h> +#include <dwc3-uboot.h> +#include <samsung/misc.h> DECLARE_GLOBAL_DATA_PTR; @@ -378,5 +379,8 @@ void reset_misc(void) int board_usb_cleanup(int index, enum usb_init_type init) { +#ifdef CONFIG_USB_DWC3 + dwc3_uboot_exit(index); +#endif return 0; } diff --git a/board/samsung/common/bootscripts/autoboot.cmd b/board/samsung/common/bootscripts/autoboot.cmd new file mode 100644 index 0000000000..1faed8ba0c --- /dev/null +++ b/board/samsung/common/bootscripts/autoboot.cmd @@ -0,0 +1,92 @@ +# This is an example file to generate boot.scr - a boot script for U-Boot +# Generate boot.scr: +# ./tools/mkimage -c none -A arm -T script -d autoboot.cmd boot.scr +# +# It requires a list of environment variables to be defined before load: +# platform dependent: boardname, fdtfile, console +# system dependent: mmcbootdev, mmcbootpart, mmcrootdev, mmcrootpart, rootfstype +# +setenv fdtaddr "40800000" +setenv initrdname "uInitrd" +setenv initrdaddr "42000000" +setenv loaddtb "load mmc ${mmcbootdev}:${mmcbootpart} ${fdtaddr} ${fdtfile}" +setenv loadinitrd "load mmc ${mmcbootdev}:${mmcbootpart} ${initrdaddr} ${initrdname}" +setenv loadkernel "load mmc ${mmcbootdev}:${mmcbootpart} '${kerneladdr}' '${kernelname}'" +setenv kernel_args "setenv bootargs ${console} root=/dev/mmcblk${mmcrootdev}p${mmcrootpart} rootfstype=${rootfstype} rootwait ${opts}" + +#### Routine: check_dtb - check that target.dtb exists on boot partition +setenv check_dtb " +if test -e mmc '${mmcbootdev}':'${mmcbootpart}' '${fdtfile}'; then + run loaddtb; + setenv fdt_addr ${fdtaddr}; +else + echo Warning! Booting without DTB: '${fdtfile}'!; + setenv fdt_addr; +fi;" + +#### Routine: check_ramdisk - check that uInitrd exists on boot partition +setenv check_ramdisk " +if test -e mmc '${mmcbootdev}':'${mmcbootpart}' '${initrdname}'; then + echo "Found ramdisk image."; + run loadinitrd; + setenv initrd_addr ${initrdaddr}; +else + echo Warning! Booting without RAMDISK: '${initrdname}'!; + setenv initrd_addr -; +fi;" + +#### Routine: boot_fit - check that env $boardname is set and boot proper config of ITB image +setenv setboot_fit " +if test -e '${boardname}'; then + setenv fdt_addr ; + setenv initrd_addr ; + setenv kerneladdr 0x42000000; + setenv kernelname Image.itb; + setenv itbcfg "\"#${boardname}\""; + setenv imgbootcmd bootm; +else + echo Warning! Variable: \$boardname is undefined!; +fi" + +#### Routine: setboot_uimg - prepare env to boot uImage +setenv setboot_uimg " + setenv kerneladdr 0x40007FC0; + setenv kernelname uImage; + setenv itbcfg ; + setenv imgbootcmd bootm; + run check_dtb; + run check_ramdisk;" + +#### Routine: setboot_zimg - prepare env to boot zImage +setenv setboot_zimg " + setenv kerneladdr 0x40007FC0; + setenv kernelname zImage; + setenv itbcfg ; + setenv imgbootcmd bootz; + run check_dtb; + run check_ramdisk;" + +#### Routine: boot_img - boot the kernel after env setup +setenv boot_img " + run loadkernel; + run kernel_args; + '${imgbootcmd}' '${kerneladdr}${itbcfg}' '${initrd_addr}' '${fdt_addr}';" + +#### Routine: autoboot - choose proper boot path +setenv autoboot " +if test -e mmc 0:${mmcbootpart} Image.itb; then + echo Found kernel image: Image.itb; + run setboot_fit; + run boot_img; +elif test -e mmc 0:${mmcbootpart} zImage; then + echo Found kernel image: zImage; + run setboot_zimg; + run boot_img; +elif test -e mmc 0:${mmcbootpart} uImage; then + echo Found kernel image: uImage; + run setboot_uimg; + run boot_img; +fi;" + +#### Execute the defined autoboot macro +run autoboot diff --git a/board/samsung/common/bootscripts/bootzimg.cmd b/board/samsung/common/bootscripts/bootzimg.cmd new file mode 100644 index 0000000000..2fb4c163a7 --- /dev/null +++ b/board/samsung/common/bootscripts/bootzimg.cmd @@ -0,0 +1,10 @@ +setenv kernelname zImage; +setenv boot_kernel "setenv bootargs \"${console} root=/dev/mmcblk${mmcrootdev}p${mmcrootpart} rootfstype=${rootfstype} rootwait ${opts}\"; +load mmc ${mmcbootdev}:${mmcbootpart} 0x40007FC0 '${kernelname}'; +if load mmc ${mmcbootdev}:${mmcbootpart} 40800000 ${fdtfile}; then + bootz 0x40007FC0 - 40800000; +else + echo Warning! Booting without DTB: '${fdtfile}'!; + bootz 0x40007FC0 -; +fi;" +run boot_kernel;
\ No newline at end of file diff --git a/board/samsung/smdk5420/smdk5420.c b/board/samsung/smdk5420/smdk5420.c index 82f607b24d..88f4044d63 100644 --- a/board/samsung/smdk5420/smdk5420.c +++ b/board/samsung/smdk5420/smdk5420.c @@ -6,19 +6,25 @@ #include <common.h> #include <fdtdec.h> -#include <asm/io.h> -#include <i2c.h> -#include <lcd.h> -#include <parade.h> -#include <spi.h> #include <errno.h> +#include <asm/io.h> #include <asm/gpio.h> -#include <asm/arch/board.h> #include <asm/arch/cpu.h> -#include <asm/arch/pinmux.h> +#include <asm/arch/board.h> +#include <asm/arch/power.h> #include <asm/arch/system.h> +#include <asm/arch/pinmux.h> #include <asm/arch/dp_info.h> +#include <asm/arch/xhci-exynos.h> #include <power/tps65090_pmic.h> +#include <i2c.h> +#include <lcd.h> +#include <mmc.h> +#include <parade.h> +#include <spi.h> +#include <usb.h> +#include <dwc3-uboot.h> +#include <samsung-usb-phy-uboot.h> DECLARE_GLOBAL_DATA_PTR; @@ -75,3 +81,63 @@ int board_get_revision(void) { return 0; } + +#ifdef CONFIG_USB_DWC3 +static struct dwc3_device dwc3_device_data = { + .maximum_speed = USB_SPEED_SUPER, + .base = 0x12400000, + .dr_mode = USB_DR_MODE_PERIPHERAL, + .index = 0, +}; + +int usb_gadget_handle_interrupts(void) +{ + dwc3_uboot_handle_interrupt(0); + return 0; +} + +int board_usb_init(int index, enum usb_init_type init) +{ + struct exynos_usb3_phy *phy = (struct exynos_usb3_phy *) + samsung_get_base_usb3_phy(); + + if (!phy) { + error("usb3 phy not supported"); + return -ENODEV; + } + + set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN); + exynos5_usb3_phy_init(phy); + + return dwc3_uboot_init(&dwc3_device_data); +} +#endif +#ifdef CONFIG_SET_DFU_ALT_INFO +char *get_dfu_alt_system(char *interface, char *devstr) +{ + return getenv("dfu_alt_system"); +} + +char *get_dfu_alt_boot(char *interface, char *devstr) +{ + struct mmc *mmc; + char *alt_boot; + int dev_num; + + dev_num = simple_strtoul(devstr, NULL, 10); + + mmc = find_mmc_device(dev_num); + if (!mmc) + return NULL; + + if (mmc_init(mmc)) + return NULL; + + if (IS_SD(mmc)) + alt_boot = CONFIG_DFU_ALT_BOOT_SD; + else + alt_boot = CONFIG_DFU_ALT_BOOT_EMMC; + + return alt_boot; +} +#endif diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c index fb2de48fbc..c127f6ca27 100644 --- a/board/siemens/common/board.c +++ b/board/siemens/common/board.c @@ -75,8 +75,9 @@ int board_init(void) i2c_set_bus_num(0); if (read_eeprom() < 0) puts("Could not get board ID.\n"); - +#ifdef CONFIG_MACH_TYPE gd->bd->bi_arch_number = CONFIG_MACH_TYPE; +#endif gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; #ifdef CONFIG_FACTORYSET @@ -102,21 +103,29 @@ const struct dpll_params *get_dpll_ddr_params(void) } #ifndef CONFIG_SPL_BUILD + +#define MAX_NR_LEDS 10 +#define MAX_PIN_NUMBER 128 +#define STARTUP 0 + #if defined(BOARD_DFU_BUTTON_GPIO) -/* - * This command returns the status of the user button on - * Input - none - * Returns - 1 if button is held down - * 0 if button is not held down - */ -static int -do_userbutton(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +unsigned char get_button_state(char * const envname, unsigned char def) { int button = 0; int gpio; + char *ptr_env; - gpio = BOARD_DFU_BUTTON_GPIO; - gpio_request(gpio, "DFU"); + /* If button is not found we take default */ + ptr_env = getenv(envname); + if (NULL == ptr_env) { + gpio = def; + } else { + gpio = (unsigned char)simple_strtoul(ptr_env, NULL, 0); + if (gpio > MAX_PIN_NUMBER) + gpio = def; + } + + gpio_request(gpio, ""); gpio_direction_input(gpio); if (gpio_get_value(gpio)) button = 1; @@ -127,53 +136,27 @@ do_userbutton(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return button; } - -U_BOOT_CMD( - dfubutton, CONFIG_SYS_MAXARGS, 1, do_userbutton, - "Return the status of the DFU button", - "" -); -#endif -/* - * This command sets led - * Input - name of led - * value of led - * Returns - 1 if input does not match - * 0 if led was set +/** + * This command returns the status of the user button on + * Input - none + * Returns - 1 if button is held down + * 0 if button is not held down */ static int -do_setled(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +do_userbutton(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - int gpio = 0; - if (argc != 3) - goto exit; -#if defined(BOARD_STATUS_LED) - if (!strcmp(argv[1], "stat")) - gpio = BOARD_STATUS_LED; -#endif -#if defined(BOARD_DFU_BUTTON_LED) - if (!strcmp(argv[1], "dfu")) - gpio = BOARD_DFU_BUTTON_LED; -#endif - /* If argument does not mach exit */ - if (gpio == 0) - goto exit; - gpio_request(gpio, ""); - gpio_direction_output(gpio, 1); - if (!strcmp(argv[2], "1")) - gpio_set_value(gpio, 1); - else - gpio_set_value(gpio, 0); - return 0; -exit: - return 1; + int button = 0; + button = get_button_state("button_dfu0", BOARD_DFU_BUTTON_GPIO); + button |= get_button_state("button_dfu1", BOARD_DFU_BUTTON_GPIO); + return button; } U_BOOT_CMD( - led, CONFIG_SYS_MAXARGS, 2, do_setled, - "Set led on or off", - "dfu val - set dfu led\nled stat val - set status led" + dfubutton, CONFIG_SYS_MAXARGS, 1, do_userbutton, + "Return the status of the DFU button", + "" ); +#endif static int do_usertestwdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) @@ -189,4 +172,95 @@ U_BOOT_CMD( "Sends U-Boot into infinite loop", "" ); + +/** + * Get led gpios from env and set them. + * The led define in environment need to need to be of the form ledN=NN,S0,S1 + * where N is an unsigned integer from 0 to 9 and S0 and S1 is 0 or 1. S0 + * defines the startup state of the led, S1 the special state of the led when + * it enters e.g. dfu mode. + */ +void set_env_gpios(unsigned char state) +{ + char *ptr_env; + char str_tmp[5]; /* must contain "ledX"*/ + char num[1]; + unsigned char i, idx, pos1, pos2, ccount; + unsigned char gpio_n, gpio_s0, gpio_s1; + + for (i = 0; i < MAX_NR_LEDS; i++) { + strcpy(str_tmp, "led"); + sprintf(num, "%d", i); + strcat(str_tmp, num); + + /* If env var is not found we stop */ + ptr_env = getenv(str_tmp); + if (NULL == ptr_env) + break; + + /* Find sperators position */ + pos1 = 0; + pos2 = 0; + ccount = 0; + for (idx = 0; ptr_env[idx] != '\0'; idx++) { + if (ptr_env[idx] == ',') { + if (ccount++ < 1) + pos1 = idx; + else + pos2 = idx; + } + } + /* Bad led description skip this definition */ + if (pos2 <= pos1 || ccount > 2) + continue; + + /* Get pin number and request gpio */ + memset(str_tmp, 0, sizeof(str_tmp)); + strncpy(str_tmp, ptr_env, pos1*sizeof(char)); + gpio_n = (unsigned char)simple_strtoul(str_tmp, NULL, 0); + + /* Invalid gpio number skip definition */ + if (gpio_n > MAX_PIN_NUMBER) + continue; + + gpio_request(gpio_n, ""); + + if (state == STARTUP) { + /* get pin state 0 and set */ + memset(str_tmp, 0, sizeof(str_tmp)); + strncpy(str_tmp, ptr_env+pos1+1, + (pos2-pos1-1)*sizeof(char)); + gpio_s0 = (unsigned char)simple_strtoul(str_tmp, NULL, + 0); + + gpio_direction_output(gpio_n, gpio_s0); + + } else { + /* get pin state 1 and set */ + memset(str_tmp, 0, sizeof(str_tmp)); + strcpy(str_tmp, ptr_env+pos2+1); + gpio_s1 = (unsigned char)simple_strtoul(str_tmp, NULL, + 0); + gpio_direction_output(gpio_n, gpio_s1); + } + } /* loop through defined led in environment */ +} + +static int do_board_led(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + if (argc != 2) + return CMD_RET_USAGE; + if ((unsigned char)simple_strtoul(argv[1], NULL, 0) == STARTUP) + set_env_gpios(0); + else + set_env_gpios(1); + return 0; +}; + +U_BOOT_CMD( + draco_led, CONFIG_SYS_MAXARGS, 2, do_board_led, + "Set LEDs defined in environment", + "<0|1>" +); #endif /* !CONFIG_SPL_BUILD */ diff --git a/board/siemens/draco/Kconfig b/board/siemens/draco/Kconfig index d138ecea9d..819d187087 100644 --- a/board/siemens/draco/Kconfig +++ b/board/siemens/draco/Kconfig @@ -14,7 +14,7 @@ config SYS_CONFIG_NAME endif -if TARGET_DXR2 +if TARGET_THUBAN config SYS_BOARD default "draco" @@ -26,6 +26,22 @@ config SYS_SOC default "am33xx" config SYS_CONFIG_NAME - default "dxr2" + default "thuban" + +endif + +if TARGET_RASTABAN + +config SYS_BOARD + default "draco" + +config SYS_VENDOR + default "siemens" + +config SYS_SOC + default "am33xx" + +config SYS_CONFIG_NAME + default "rastaban" endif diff --git a/board/siemens/draco/MAINTAINERS b/board/siemens/draco/MAINTAINERS index f6b68ca400..484dd739c1 100644 --- a/board/siemens/draco/MAINTAINERS +++ b/board/siemens/draco/MAINTAINERS @@ -4,5 +4,7 @@ S: Maintained F: board/siemens/draco/ F: include/configs/draco.h F: configs/draco_defconfig -F: include/configs/dxr2.h -F: configs/dxr2_defconfig +F: include/configs/thuban.h +F: configs/thuban_defconfig +F: include/configs/rastaban.h +F: configs/rastaban_defconfig diff --git a/board/siemens/draco/board.c b/board/siemens/draco/board.c index ede73baf3e..2697762076 100644 --- a/board/siemens/draco/board.c +++ b/board/siemens/draco/board.c @@ -43,7 +43,7 @@ static struct draco_baseboard_id __attribute__((section(".data"))) settings; /* Default@303MHz-i0 */ const struct ddr3_data ddr3_default = { 0x33524444, 0x56312e35, 0x0080, 0x0000, 0x003A, 0x003F, 0x009F, - 0x0079, 0x0888A39B, 0x26247FDA, 0x501F821F, 0x00100206, 0x61A44A32, + 0x0079, 0x0888A39B, 0x26517FDA, 0x501F84EF, 0x00100206, 0x61A44A32, 0x0000093B, 0x0000014A, "default name @303MHz \0", "default marking \0", @@ -71,8 +71,8 @@ static void print_ddr3_timings(void) printf("clock:\t\t%d MHz\n", DDR_PLL_FREQ); printf("device:\t\t%s\n", settings.ddr3.manu_name); printf("marking:\t%s\n", settings.ddr3.manu_marking); - printf("timing parameters\n"); - printf("diff\teeprom\tdefault\n"); + printf("%-20s, %-8s, %-8s, %-4s\n", "timing parameters", "eeprom", + "default", "diff"); PRINTARGS(magic); PRINTARGS(version); PRINTARGS(ddr3_sratio); @@ -96,9 +96,12 @@ static void print_ddr3_timings(void) static void print_chip_data(void) { + struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; + dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); printf("\nCPU BOARD\n"); printf("device: \t'%s'\n", settings.chip.sdevname); printf("hw version: \t'%s'\n", settings.chip.shwver); + printf("max freq: \t%d MHz\n", dpll_mpu_opp100.m); } #endif /* CONFIG_SPL_BUILD */ @@ -193,6 +196,11 @@ struct ctrl_ioregs draco_ddr3_ioregs = { config_ddr(DDR_PLL_FREQ, &draco_ddr3_ioregs, &draco_ddr3_data, &draco_ddr3_cmd_ctrl_data, &draco_ddr3_emif_reg_data, 0); + + /* For Samsung 2Gbit RAM we need this delay otherwise config fails after + * soft reset. + */ + udelay(2000); } static void spl_siemens_board_init(void) @@ -201,6 +209,26 @@ static void spl_siemens_board_init(void) } #endif /* if def CONFIG_SPL_BUILD */ +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ + omap_nand_switch_ecc(1, 8); +#ifdef CONFIG_FACTORYSET + /* Set ASN in environment*/ + if (factory_dat.asn[0] != 0) { + setenv("dtb_name", (char *)factory_dat.asn); + } else { + /* dtb suffix gets added in load script */ + setenv("dtb_name", "am335x-draco"); + } +#else + setenv("dtb_name", "am335x-draco"); +#endif + + return 0; +} +#endif + #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) static void cpsw_control(int enabled) @@ -280,13 +308,4 @@ U_BOOT_CMD( #endif /* #if defined(CONFIG_DRIVER_TI_CPSW) */ #endif /* #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) */ -#ifdef CONFIG_BOARD_LATE_INIT -int board_late_init(void) -{ - omap_nand_switch_ecc(1, 8); - - return 0; -} -#endif - #include "../common/board.c" diff --git a/board/siemens/draco/board.h b/board/siemens/draco/board.h index ff8ab764c5..8856fd0f86 100644 --- a/board/siemens/draco/board.h +++ b/board/siemens/draco/board.h @@ -16,9 +16,13 @@ #ifndef _BOARD_H_ #define _BOARD_H_ -#define PARGS3(x) settings.ddr3.x-ddr3_default.x, \ - settings.ddr3.x, ddr3_default.x -#define PRINTARGS(y) printf("%x, %8x, %8x : "#y"\n", PARGS3(y)) +#define PARGS(x) #x , /* Parameter Name */ \ + settings.ddr3.x, /* EEPROM Value */ \ + ddr3_default.x, /* Default Value */ \ + settings.ddr3.x-ddr3_default.x /* Difference */ + +#define PRINTARGS(y) printf("%-20s, %8x, %8x, %4d\n", PARGS(y)) + #define MAGIC_CHIP 0x50494843 /* Automatic generated definition */ @@ -69,4 +73,7 @@ void enable_uart4_pin_mux(void); void enable_uart5_pin_mux(void); void enable_i2c0_pin_mux(void); void enable_board_pin_mux(void); + +/* Forwared declaration, defined in common board.c */ +void set_env_gpios(unsigned char state); #endif diff --git a/board/siemens/draco/mux.c b/board/siemens/draco/mux.c index eaa3c70798..dbcc80b61f 100644 --- a/board/siemens/draco/mux.c +++ b/board/siemens/draco/mux.c @@ -60,7 +60,7 @@ static struct module_pin_mux nand_pin_mux[] = { static struct module_pin_mux gpios_pin_mux[] = { /* DFU button GPIO0_27*/ - {OFFSET(gpmc_ad11), (MODE(7) | PULLUDEN | RXACTIVE)}, + {OFFSET(gpmc_ad11), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_csn3), MODE(7) }, /* LED0 GPIO2_0 */ {OFFSET(emu0), MODE(7)}, /* LED1 GPIO3_7 */ /* Triacs in HW Rev 2 */ @@ -222,7 +222,7 @@ static struct module_pin_mux gpios_pin_mux[] = { {OFFSET(vrefp), MODE(7) | RXACTIVE | PULLUDDIS}, {OFFSET(vrefn), MODE(7) | RXACTIVE | PULLUDDIS}, /* nRST for SMSC LAN9303 switch - GPIO2_24 */ - {OFFSET(lcd_pclk), MODE(7) }, /* LAN9303 nRST */ + {OFFSET(lcd_pclk), MODE(7) | PULLUDEN | PULLUP_EN }, /* LAN9303 nRST */ {-1}, }; diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index e744d4af4e..2a1cd3cf3b 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -280,18 +280,6 @@ config MMC_SUNXI_SLOT_EXTRA slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable support for this. -config SPL_NAND_SUPPORT - bool "SPL/NAND mode support" - depends on SPL - default n - ---help--- - This enables support for booting from NAND internal - memory. U-Boot SPL doesn't detect where is it load from, - therefore this option is needed to properly load image from - flash. Option also disables MMC functionality on U-Boot due to - initialization errors encountered, when both controllers are - enabled. - config USB0_VBUS_PIN string "Vbus enable pin for usb0 (otg)" default "" @@ -566,19 +554,4 @@ config GMAC_TX_DELAY ---help--- Set the GMAC Transmit Clock Delay Chain value. -config SYS_MALLOC_CLEAR_ON_INIT - default n - -config NETDEVICES - default y - -config DM_ETH - default y - -config DM_SERIAL - default y - -config DM_USB - default y if !USB_MUSB_SUNXI - endif diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 22d560a233..7a42055559 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -10,6 +10,7 @@ F: configs/Cubieboard_defconfig F: configs/Hyundai_A7HD_defconfig F: configs/jesurun_q5_defconfig F: configs/Mele_A1000_defconfig +F: configs/Mele_A1000G_quad_defconfig F: configs/Mele_M3_defconfig F: configs/Mini-X_defconfig F: configs/mk802_defconfig @@ -63,11 +64,6 @@ M: Paul Kocialkowski <contact@paulk.fr> S: Maintained F: configs/Ampe_A76_defconfig -Astar MID756 BOARD -M: VishnuPatekar <vishnupatekar0510@gmail.com> -S: Maintained -F: configs/Astar_MID756_defconfig - COLOMBUS BOARD M: Maxime Ripard <maxime.ripard@free-electrons.com> S: Maintained @@ -81,6 +77,11 @@ F: include/configs/sun7i.h F: configs/Cubieboard2_defconfig F: configs/Cubietruck_defconfig +ET Q8 V1.6 Tablet BOARD +M: VishnuPatekar <vishnupatekar0510@gmail.com> +S: Maintained +F: configs/Et_q8_v1_6_defconfig + FORFUN-Q88DB TABLET M: Jens Lucius <info@jenslucius.com> S: Maintained diff --git a/board/sunxi/board.c b/board/sunxi/board.c index f27967bbf4..ed60e74808 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -22,9 +22,6 @@ #ifdef CONFIG_AXP221_POWER #include <axp221.h> #endif -#ifdef CONFIG_NAND_SUNXI -#include <nand.h> -#endif #include <asm/arch/clock.h> #include <asm/arch/cpu.h> #include <asm/arch/display.h> @@ -318,21 +315,6 @@ int board_mmc_init(bd_t *bis) } #endif -#ifdef CONFIG_NAND -void board_nand_init(void) -{ - unsigned int pin; - static u8 ports[] = CONFIG_NAND_SUNXI_GPC_PORTS; - - /* Configure AHB muxes to connect output pins with NAND controller */ - for (pin = 0; pin < 16; pin++) - sunxi_gpio_set_cfgpin(SUNXI_GPC(pin), SUNXI_GPC_NAND); - - for (pin = 0; pin < ARRAY_SIZE(ports); pin++) - sunxi_gpio_set_cfgpin(SUNXI_GPC(ports[pin]), SUNXI_GPC_NAND); -} -#endif - void i2c_init_board(void) { #ifdef CONFIG_I2C0_ENABLE diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c index 4aae230608..d7b9e5af88 100644 --- a/board/ti/am43xx/board.c +++ b/board/ti/am43xx/board.c @@ -148,6 +148,29 @@ static const struct dpll_params idk_dpll_ddr = { 400, 23, 1, -1, 2, -1, -1 }; +static const u32 ext_phy_ctrl_const_base_lpddr2[] = { + 0x00500050, + 0x00350035, + 0x00350035, + 0x00350035, + 0x00350035, + 0x00350035, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x40001000, + 0x08102040 +}; + const struct ctrl_ioregs ioregs_lpddr2 = { .cm0ioctl = LPDDR2_ADDRCTRL_IOCTRL_VALUE, .cm1ioctl = LPDDR2_ADDRCTRL_WD0_IOCTRL_VALUE, @@ -318,6 +341,16 @@ static const struct emif_regs ddr3_idk_emif_regs_400Mhz = { .emif_cos_config = 0x00ffffff }; +void emif_get_ext_phy_ctrl_const_regs(const u32 **regs, u32 *size) +{ + if (board_is_eposevm()) { + *regs = ext_phy_ctrl_const_base_lpddr2; + *size = ARRAY_SIZE(ext_phy_ctrl_const_base_lpddr2); + } + + return; +} + /* * get_sys_clk_index : returns the index of the sys_clk read from * ctrl status register. This value is either diff --git a/board/ti/beagle_x15/board.c b/board/ti/beagle_x15/board.c index ffcd53185b..c7f19c7924 100644 --- a/board/ti/beagle_x15/board.c +++ b/board/ti/beagle_x15/board.c @@ -14,7 +14,10 @@ #include <usb.h> #include <asm/omap_common.h> #include <asm/emif.h> +#include <asm/gpio.h> +#include <asm/arch/gpio.h> #include <asm/arch/clock.h> +#include <asm/arch/dra7xx_iodelay.h> #include <asm/arch/sys_proto.h> #include <asm/arch/mmc_host_def.h> #include <asm/arch/sata.h> @@ -29,6 +32,9 @@ DECLARE_GLOBAL_DATA_PTR; +/* GPIO 7_11 */ +#define GPIO_DDR_VTT_EN 203 + const struct omap_sysinfo sysinfo = { "Board: BeagleBoard x15\n" }; @@ -52,23 +58,29 @@ static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = { .sdram_tim1 = 0xceef266b, .sdram_tim2 = 0x328f7fda, .sdram_tim3 = 0x027f88a8, - .read_idle_ctrl = 0x00050001, + .read_idle_ctrl = 0x00050000, .zq_config = 0x0007190b, .temp_alert_config = 0x00000000, - .emif_ddr_phy_ctlr_1_init = 0x0e24400a, - .emif_ddr_phy_ctlr_1 = 0x0e24400a, + .emif_ddr_phy_ctlr_1_init = 0x0024400b, + .emif_ddr_phy_ctlr_1 = 0x0e24400b, .emif_ddr_ext_phy_ctrl_1 = 0x10040100, .emif_ddr_ext_phy_ctrl_2 = 0x00740074, .emif_ddr_ext_phy_ctrl_3 = 0x00780078, .emif_ddr_ext_phy_ctrl_4 = 0x007c007c, .emif_ddr_ext_phy_ctrl_5 = 0x007b007b, .emif_rd_wr_lvl_rmp_win = 0x00000000, - .emif_rd_wr_lvl_rmp_ctl = 0x00000000, + .emif_rd_wr_lvl_rmp_ctl = 0x80000000, .emif_rd_wr_lvl_ctl = 0x00000000, .emif_rd_wr_exec_thresh = 0x00000305 }; +/* Ext phy ctrl regs 1-35 */ static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = { + 0x10040100, + 0x00740074, + 0x00780078, + 0x007c007c, + 0x007b007b, 0x00800080, 0x00360036, 0x00340034, @@ -90,14 +102,19 @@ static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = { 0x00000000, 0x00600020, - 0x40010080, + 0x40011080, 0x08102040, 0x00400040, 0x00400040, 0x00400040, 0x00400040, - 0x00400040 + 0x00400040, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0 }; static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = { @@ -109,23 +126,28 @@ static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = { .sdram_tim1 = 0xceef266b, .sdram_tim2 = 0x328f7fda, .sdram_tim3 = 0x027f88a8, - .read_idle_ctrl = 0x00050001, + .read_idle_ctrl = 0x00050000, .zq_config = 0x0007190b, .temp_alert_config = 0x00000000, - .emif_ddr_phy_ctlr_1_init = 0x0e24400a, - .emif_ddr_phy_ctlr_1 = 0x0e24400a, + .emif_ddr_phy_ctlr_1_init = 0x0024400b, + .emif_ddr_phy_ctlr_1 = 0x0e24400b, .emif_ddr_ext_phy_ctrl_1 = 0x10040100, .emif_ddr_ext_phy_ctrl_2 = 0x00820082, .emif_ddr_ext_phy_ctrl_3 = 0x008b008b, .emif_ddr_ext_phy_ctrl_4 = 0x00800080, .emif_ddr_ext_phy_ctrl_5 = 0x007e007e, .emif_rd_wr_lvl_rmp_win = 0x00000000, - .emif_rd_wr_lvl_rmp_ctl = 0x00000000, + .emif_rd_wr_lvl_rmp_ctl = 0x80000000, .emif_rd_wr_lvl_ctl = 0x00000000, .emif_rd_wr_exec_thresh = 0x00000305 }; static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = { + 0x10040100, + 0x00820082, + 0x008b008b, + 0x00800080, + 0x007e007e, 0x00800080, 0x00370037, 0x00390039, @@ -145,14 +167,19 @@ static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = { 0x00000000, 0x00600020, - 0x40010080, + 0x40011080, 0x08102040, 0x00400040, 0x00400040, 0x00400040, 0x00400040, - 0x00400040 + 0x00400040, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0 }; void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) @@ -240,23 +267,20 @@ int board_late_init(void) return 0; } -static void do_set_mux32(u32 base, - struct pad_conf_entry const *array, int size) +void set_muxconf_regs_essential(void) { - int i; - struct pad_conf_entry *pad = (struct pad_conf_entry *)array; - - for (i = 0; i < size; i++, pad++) - writel(pad->val, base + pad->offset); + do_set_mux32((*ctrl)->control_padconf_core_base, + early_padconf, ARRAY_SIZE(early_padconf)); } -void set_muxconf_regs_essential(void) +#ifdef CONFIG_IODELAY_RECALIBRATION +void recalibrate_iodelay(void) { - do_set_mux32((*ctrl)->control_padconf_core_base, - core_padconf_array_essential, - sizeof(core_padconf_array_essential) / - sizeof(struct pad_conf_entry)); + __recalibrate_iodelay(core_padconf_array_essential, + ARRAY_SIZE(core_padconf_array_essential), + iodelay_cfg_array, ARRAY_SIZE(iodelay_cfg_array)); } +#endif #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) int board_mmc_init(bd_t *bis) @@ -385,3 +409,21 @@ int board_eth_init(bd_t *bis) return ret; } #endif + +#ifdef CONFIG_BOARD_EARLY_INIT_F +/* VTT regulator enable */ +static inline void vtt_regulator_enable(void) +{ + if (omap_hw_init_context() == OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL) + return; + + gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en"); + gpio_direction_output(GPIO_DDR_VTT_EN, 1); +} + +int board_early_init_f(void) +{ + vtt_regulator_enable(); + return 0; +} +#endif diff --git a/board/ti/beagle_x15/mux_data.h b/board/ti/beagle_x15/mux_data.h index df658c5211..09d3650983 100644 --- a/board/ti/beagle_x15/mux_data.h +++ b/board/ti/beagle_x15/mux_data.h @@ -13,43 +13,318 @@ #include <asm/arch/mux_dra7xx.h> const struct pad_conf_entry core_padconf_array_essential[] = { - {MMC1_CLK, (IEN | PTU | PDIS | M0)}, /* MMC1_CLK */ - {MMC1_CMD, (IEN | PTU | PDIS | M0)}, /* MMC1_CMD */ - {MMC1_DAT0, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT0 */ - {MMC1_DAT1, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT1 */ - {MMC1_DAT2, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT2 */ - {MMC1_DAT3, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT3 */ - {MMC1_SDCD, (FSC | IEN | PTU | PDIS | M0)}, /* MMC1_SDCD */ - {MMC1_SDWP, (FSC | IEN | PTD | PEN | M14)}, /* MMC1_SDWP */ - {GPMC_A19, (IEN | PTU | PDIS | M1)}, /* mmc2_dat4 */ - {GPMC_A20, (IEN | PTU | PDIS | M1)}, /* mmc2_dat5 */ - {GPMC_A21, (IEN | PTU | PDIS | M1)}, /* mmc2_dat6 */ - {GPMC_A22, (IEN | PTU | PDIS | M1)}, /* mmc2_dat7 */ - {GPMC_A23, (IEN | PTU | PDIS | M1)}, /* mmc2_clk */ - {GPMC_A24, (IEN | PTU | PDIS | M1)}, /* mmc2_dat0 */ - {GPMC_A25, (IEN | PTU | PDIS | M1)}, /* mmc2_dat1 */ - {GPMC_A26, (IEN | PTU | PDIS | M1)}, /* mmc2_dat2 */ - {GPMC_A27, (IEN | PTU | PDIS | M1)}, /* mmc2_dat3 */ - {GPMC_CS1, (IEN | PTU | PDIS | M1)}, /* mmm2_cmd */ - {UART2_CTSN, (FSC | IEN | PTU | PDIS | M2)}, /* uart2_ctsn.uart3_rxd */ - {UART2_RTSN, (FSC | IEN | PTU | PDIS | M1)}, /* uart2_rtsn.uart3_txd */ - {I2C1_SDA, (IEN | PTU | PDIS | M0)}, /* I2C1_SDA */ - {I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */ - {MDIO_MCLK, (PTU | PEN | M0)}, /* MDIO_MCLK */ - {MDIO_D, (IEN | PTU | PEN | M0)}, /* MDIO_D */ - {RGMII0_TXC, (M0) }, - {RGMII0_TXCTL, (M0) }, - {RGMII0_TXD3, (M0) }, - {RGMII0_TXD2, (M0) }, - {RGMII0_TXD1, (M0) }, - {RGMII0_TXD0, (M0) }, - {RGMII0_RXC, (IEN | M0) }, - {RGMII0_RXCTL, (IEN | M0) }, - {RGMII0_RXD3, (IEN | M0) }, - {RGMII0_RXD2, (IEN | M0) }, - {RGMII0_RXD1, (IEN | M0) }, - {RGMII0_RXD0, (IEN | M0) }, - {USB1_DRVVBUS, (M0 | FSC) }, - {SPI1_CS1, (PEN | IDIS | M14) }, /* GPIO7_11 */ + {GPMC_AD0, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad0.vin3a_d0 */ + {GPMC_AD1, (M2 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_ad1.vin3a_d1 */ + {GPMC_AD2, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad2.vin3a_d2 */ + {GPMC_AD3, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad3.vin3a_d3 */ + {GPMC_AD4, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad4.vin3a_d4 */ + {GPMC_AD5, (M2 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_ad5.vin3a_d5 */ + {GPMC_AD6, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad6.vin3a_d6 */ + {GPMC_AD7, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad7.vin3a_d7 */ + {GPMC_AD8, (M2 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_ad8.vin3a_d8 */ + {GPMC_AD9, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad9.vin3a_d9 */ + {GPMC_AD10, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad10.vin3a_d10 */ + {GPMC_AD11, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad11.vin3a_d11 */ + {GPMC_AD12, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad12.vin3a_d12 */ + {GPMC_AD13, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad13.vin3a_d13 */ + {GPMC_AD14, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_ad14.vin3a_d14 */ + {GPMC_AD15, (M2 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_ad15.vin3a_d15 */ + {GPMC_A0, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a0.vin3a_d16 */ + {GPMC_A1, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a1.vin3a_d17 */ + {GPMC_A2, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a2.vin3a_d18 */ + {GPMC_A3, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a3.vin3a_d19 */ + {GPMC_A4, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a4.vin3a_d20 */ + {GPMC_A5, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a5.vin3a_d21 */ + {GPMC_A6, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a6.vin3a_d22 */ + {GPMC_A7, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a7.vin3a_d23 */ + {GPMC_A8, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a8.vin3a_hsync0 */ + {GPMC_A9, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a9.vin3a_vsync0 */ + {GPMC_A10, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a10.vin3a_de0 */ + {GPMC_A11, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a11.vin3a_fld0 */ + {GPMC_A12, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_a12.gpio2_2 */ + {GPMC_A13, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a13.gpio2_3 */ + {GPMC_A14, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_a14.gpio2_4 */ + {GPMC_A15, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a15.gpio2_5 */ + {GPMC_A16, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a16.gpio2_6 */ + {GPMC_A17, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a17.gpio2_7 */ + {GPMC_A18, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_a18.gpio2_8 */ + {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ + {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ + {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ + {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ + {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ + {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ + {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ + {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ + {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ + {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ + {GPMC_CS0, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_cs0.gpio2_19 */ + {GPMC_CS2, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_cs2.gpio2_20 */ + {GPMC_CS3, (M2 | PIN_INPUT_PULLDOWN)}, /* gpmc_cs3.vin3a_clk0 */ + {GPMC_CLK, (M9 | PIN_INPUT_PULLDOWN)}, /* gpmc_clk.dma_evt1 */ + {GPMC_ADVN_ALE, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_advn_ale.gpio2_23 */ + {GPMC_OEN_REN, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_oen_ren.gpio2_24 */ + {GPMC_WEN, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_wen.gpio2_25 */ + {GPMC_BEN0, (M9 | PIN_INPUT_PULLDOWN)}, /* gpmc_ben0.dma_evt3 */ + {GPMC_BEN1, (M9 | PIN_INPUT_PULLDOWN)}, /* gpmc_ben1.dma_evt4 */ + {GPMC_WAIT0, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_wait0.gpio2_28 */ + {VIN1B_CLK1, (M14 | PIN_INPUT_SLEW)}, /* vin1b_clk1.gpio2_31 */ + {VIN1A_D2, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d2.gpio3_6 */ + {VIN1A_D3, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d3.gpio3_7 */ + {VIN1A_D4, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d4.gpio3_8 */ + {VIN1A_D5, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d5.gpio3_9 */ + {VIN1A_D6, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d6.gpio3_10 */ + {VIN1A_D7, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d7.gpio3_11 */ + {VIN1A_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d8.gpio3_12 */ + {VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d10.gpio3_14 */ + {VIN1A_D11, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d11.gpio3_15 */ + {VIN1A_D12, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d12.gpio3_16 */ + {VIN1A_D14, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d14.gpio3_18 */ + {VIN1A_D16, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d16.gpio3_20 */ + {VIN1A_D19, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d19.gpio3_23 */ + {VIN1A_D20, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d20.gpio3_24 */ + {VIN1A_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vin1a_d21.vin1a_d21 */ + {VIN1A_D22, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d22.gpio3_26 */ + {VIN2A_CLK0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_clk0.gpio3_28 */ + {VIN2A_DE0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_de0.gpio3_29 */ + {VIN2A_FLD0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_fld0.gpio3_30 */ + {VIN2A_HSYNC0, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_hsync0.pr1_uart0_cts_n */ + {VIN2A_VSYNC0, (M11 | PIN_INPUT_PULLUP)}, /* vin2a_vsync0.pr1_uart0_rts_n */ + {VIN2A_D0, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d0.pr1_uart0_rxd */ + {VIN2A_D1, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d1.pr1_uart0_txd */ + {VIN2A_D2, (M8 | PIN_INPUT_PULLDOWN)}, /* vin2a_d2.uart10_rxd */ + {VIN2A_D3, (M8 | PIN_INPUT_PULLDOWN)}, /* vin2a_d3.uart10_txd */ + {VIN2A_D4, (M8 | PIN_INPUT_PULLDOWN)}, /* vin2a_d4.uart10_ctsn */ + {VIN2A_D5, (M8 | PIN_INPUT_PULLDOWN)}, /* vin2a_d5.uart10_rtsn */ + {VIN2A_D6, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d6.gpio4_7 */ + {VIN2A_D7, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d7.gpio4_8 */ + {VIN2A_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d8.gpio4_9 */ + {VIN2A_D9, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d9.gpio4_10 */ + {VIN2A_D10, (M10 | PIN_INPUT_PULLDOWN)}, /* vin2a_d10.ehrpwm2B */ + {VIN2A_D11, (M10 | PIN_INPUT_PULLDOWN)}, /* vin2a_d11.ehrpwm2_tripzone_input */ + {VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ + {VIN2A_D13, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ + {VIN2A_D14, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ + {VIN2A_D15, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ + {VIN2A_D16, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ + {VIN2A_D17, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ + {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ + {VIN2A_D19, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ + {VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ + {VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ + {VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ + {VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ + {VOUT1_CLK, (M0 | PIN_OUTPUT)}, /* vout1_clk.vout1_clk */ + {VOUT1_DE, (M0 | PIN_OUTPUT)}, /* vout1_de.vout1_de */ + {VOUT1_FLD, (M14 | PIN_INPUT)}, /* vout1_fld.gpio4_21 */ + {VOUT1_HSYNC, (M0 | PIN_OUTPUT)}, /* vout1_hsync.vout1_hsync */ + {VOUT1_VSYNC, (M0 | PIN_OUTPUT)}, /* vout1_vsync.vout1_vsync */ + {VOUT1_D0, (M0 | PIN_OUTPUT)}, /* vout1_d0.vout1_d0 */ + {VOUT1_D1, (M0 | PIN_OUTPUT)}, /* vout1_d1.vout1_d1 */ + {VOUT1_D2, (M0 | PIN_OUTPUT)}, /* vout1_d2.vout1_d2 */ + {VOUT1_D3, (M0 | PIN_OUTPUT)}, /* vout1_d3.vout1_d3 */ + {VOUT1_D4, (M0 | PIN_OUTPUT)}, /* vout1_d4.vout1_d4 */ + {VOUT1_D5, (M0 | PIN_OUTPUT)}, /* vout1_d5.vout1_d5 */ + {VOUT1_D6, (M0 | PIN_OUTPUT)}, /* vout1_d6.vout1_d6 */ + {VOUT1_D7, (M0 | PIN_OUTPUT)}, /* vout1_d7.vout1_d7 */ + {VOUT1_D8, (M0 | PIN_OUTPUT)}, /* vout1_d8.vout1_d8 */ + {VOUT1_D9, (M0 | PIN_OUTPUT)}, /* vout1_d9.vout1_d9 */ + {VOUT1_D10, (M0 | PIN_OUTPUT)}, /* vout1_d10.vout1_d10 */ + {VOUT1_D11, (M0 | PIN_OUTPUT)}, /* vout1_d11.vout1_d11 */ + {VOUT1_D12, (M0 | PIN_OUTPUT)}, /* vout1_d12.vout1_d12 */ + {VOUT1_D13, (M0 | PIN_OUTPUT)}, /* vout1_d13.vout1_d13 */ + {VOUT1_D14, (M0 | PIN_OUTPUT)}, /* vout1_d14.vout1_d14 */ + {VOUT1_D15, (M0 | PIN_OUTPUT)}, /* vout1_d15.vout1_d15 */ + {VOUT1_D16, (M0 | PIN_OUTPUT)}, /* vout1_d16.vout1_d16 */ + {VOUT1_D17, (M0 | PIN_OUTPUT)}, /* vout1_d17.vout1_d17 */ + {VOUT1_D18, (M0 | PIN_OUTPUT)}, /* vout1_d18.vout1_d18 */ + {VOUT1_D19, (M0 | PIN_OUTPUT)}, /* vout1_d19.vout1_d19 */ + {VOUT1_D20, (M0 | PIN_OUTPUT)}, /* vout1_d20.vout1_d20 */ + {VOUT1_D21, (M0 | PIN_OUTPUT)}, /* vout1_d21.vout1_d21 */ + {VOUT1_D22, (M0 | PIN_OUTPUT)}, /* vout1_d22.vout1_d22 */ + {VOUT1_D23, (M0 | PIN_OUTPUT)}, /* vout1_d23.vout1_d23 */ + {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP)}, /* mdio_mclk.mdio_mclk */ + {MDIO_D, (M0 | PIN_INPUT_PULLUP)}, /* mdio_d.mdio_d */ + {RMII_MHZ_50_CLK, (M14 | PIN_INPUT_PULLUP)}, /* RMII_MHZ_50_CLK.gpio5_17 */ + {UART3_RXD, (M14 | PIN_INPUT_PULLDOWN)}, /* uart3_rxd.gpio5_18 */ + {UART3_TXD, (M14 | PIN_INPUT_PULLDOWN)}, /* uart3_txd.gpio5_19 */ + {RGMII0_TXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ + {RGMII0_TXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ + {RGMII0_TXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ + {RGMII0_TXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ + {RGMII0_TXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ + {RGMII0_TXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ + {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ + {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ + {RGMII0_RXD3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ + {RGMII0_RXD2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ + {RGMII0_RXD1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ + {RGMII0_RXD0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ + {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb1_drvvbus.usb1_drvvbus */ + {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb2_drvvbus.usb2_drvvbus */ + {GPIO6_14, (M10 | PIN_INPUT_PULLUP)}, /* gpio6_14.timer1 */ + {GPIO6_15, (M10 | PIN_INPUT_PULLUP)}, /* gpio6_15.timer2 */ + {GPIO6_16, (M10 | PIN_INPUT_PULLUP)}, /* gpio6_16.timer3 */ + {XREF_CLK0, (M9 | PIN_INPUT_PULLDOWN)}, /* xref_clk0.clkout2 */ + {XREF_CLK1, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.gpio6_18 */ + {XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.gpio6_19 */ + {XREF_CLK3, (M9 | PIN_INPUT_PULLDOWN)}, /* xref_clk3.clkout3 */ + {MCASP1_ACLKX, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkx.i2c3_sda */ + {MCASP1_FSX, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_fsx.i2c3_scl */ + {MCASP1_ACLKR, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkr.i2c4_sda */ + {MCASP1_FSR, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_fsr.i2c4_scl */ + {MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.i2c5_sda */ + {MCASP1_AXR1, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr1.i2c5_scl */ + {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ + {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ + {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ + {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ + {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */ + {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */ + {MCASP1_AXR8, (M14 | PIN_INPUT_SLEW)}, /* mcasp1_axr8.gpio5_10 */ + {MCASP1_AXR9, (M14 | PIN_INPUT_SLEW)}, /* mcasp1_axr9.gpio5_11 */ + {MCASP1_AXR10, (M14 | PIN_INPUT_SLEW)}, /* mcasp1_axr10.gpio5_12 */ + {MCASP1_AXR11, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr11.gpio4_17 */ + {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr12.mcasp7_axr0 */ + {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.mcasp7_axr1 */ + {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr14.mcasp7_aclkx */ + {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr15.mcasp7_fsx */ + {MCASP2_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkx.mcasp2_aclkx */ + {MCASP2_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp2_fsx.mcasp2_fsx */ + {MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkr.mcasp2_aclkr */ + {MCASP2_FSR, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_fsr.mcasp2_fsr */ + {MCASP2_AXR0, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr0.mcasp2_axr0 */ + {MCASP2_AXR1, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr1.mcasp2_axr1 */ + {MCASP2_AXR2, (M0 | PIN_INPUT_SLEW)}, /* mcasp2_axr2.mcasp2_axr2 */ + {MCASP2_AXR3, (M0 | PIN_INPUT_SLEW)}, /* mcasp2_axr3.mcasp2_axr3 */ + {MCASP2_AXR4, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr4.mcasp2_axr4 */ + {MCASP2_AXR5, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr5.mcasp2_axr5 */ + {MCASP2_AXR6, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr6.mcasp2_axr6 */ + {MCASP2_AXR7, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr7.mcasp2_axr7 */ + {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ + {MCASP3_FSX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_fsx.mcasp3_fsx */ + {MCASP3_AXR0, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_axr0.mcasp3_axr0 */ + {MCASP3_AXR1, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_axr1.mcasp3_axr1 */ + {MCASP4_ACLKX, (M3 | PIN_INPUT_PULLDOWN)}, /* mcasp4_aclkx.uart8_rxd */ + {MCASP4_FSX, (M3 | PIN_INPUT_PULLDOWN)}, /* mcasp4_fsx.uart8_txd */ + {MCASP4_AXR0, (M3 | PIN_INPUT_PULLDOWN)}, /* mcasp4_axr0.uart8_ctsn */ + {MCASP4_AXR1, (M3 | PIN_INPUT_PULLUP)}, /* mcasp4_axr1.uart8_rtsn */ + {MCASP5_ACLKX, (M3 | PIN_INPUT_PULLDOWN)}, /* mcasp5_aclkx.uart9_rxd */ + {MCASP5_FSX, (M3 | PIN_INPUT_PULLDOWN)}, /* mcasp5_fsx.uart9_txd */ + {MCASP5_AXR0, (M3 | PIN_INPUT_PULLDOWN)}, /* mcasp5_axr0.uart9_ctsn */ + {MCASP5_AXR1, (M3 | PIN_INPUT_PULLUP)}, /* mcasp5_axr1.uart9_rtsn */ + {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ + {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ + {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ + {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ + {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ + {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ + {MMC1_SDCD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.mmc1_sdcd */ + {MMC1_SDWP, (M14 | PIN_OUTPUT)}, /* mmc1_sdwp.gpio6_28 */ + {GPIO6_10, (M10 | PIN_INPUT_PULLDOWN)}, /* gpio6_10.ehrpwm2A */ + {GPIO6_11, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ + {MMC3_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc3_clk.mmc3_clk */ + {MMC3_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc3_cmd.mmc3_cmd */ + {MMC3_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc3_dat0.mmc3_dat0 */ + {MMC3_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc3_dat1.mmc3_dat1 */ + {MMC3_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc3_dat2.mmc3_dat2 */ + {MMC3_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc3_dat3.mmc3_dat3 */ + {MMC3_DAT4, (M1 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat4.spi4_sclk */ + {MMC3_DAT5, (M1 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat5.spi4_d1 */ + {MMC3_DAT6, (M1 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat6.spi4_d0 */ + {MMC3_DAT7, (M1 | PIN_INPUT_PULLUP)}, /* mmc3_dat7.spi4_cs0 */ + {SPI1_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.gpio7_7 */ + {SPI1_D1, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.gpio7_8 */ + {SPI1_D0, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.gpio7_9 */ + {SPI1_CS0, (M14 | PIN_OUTPUT)}, /* spi1_cs0.gpio7_10 */ + {SPI1_CS1, (M14 | PIN_OUTPUT_PULLUP)}, /* spi1_cs1.gpio7_11 */ + {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */ + {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ + {SPI2_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.gpio7_14 */ + {SPI2_D1, (M14 | PIN_INPUT_PULLDOWN)}, /* spi2_d1.gpio7_15 */ + {SPI2_D0, (M14 | PIN_INPUT_PULLUP)}, /* spi2_d0.gpio7_16 */ + {SPI2_CS0, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.gpio7_17 */ + {DCAN1_TX, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_tx.dcan1_tx */ + {DCAN1_RX, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.dcan1_rx */ + {UART1_RXD, (M0 | PIN_INPUT_SLEW)}, /* uart1_rxd.uart1_rxd */ + {UART1_TXD, (M0 | PIN_INPUT_SLEW)}, /* uart1_txd.uart1_txd */ + {UART1_CTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* uart1_ctsn.Driveroff */ + {UART2_RXD, (M15 | PIN_INPUT_PULLDOWN)}, /* N/A.Driveroff */ + {UART2_TXD, (M15 | PIN_INPUT_PULLDOWN)}, /* uart2_txd.Driveroff */ + {UART2_CTSN, (M2 | PIN_INPUT_SLEW)}, /* uart2_ctsn.uart3_rxd */ + {UART2_RTSN, (M1 | PIN_INPUT_SLEW)}, /* uart2_rtsn.uart3_txd */ + {I2C2_SDA, (M1 | PIN_INPUT)}, /* i2c2_sda.hdmi1_ddc_scl */ + {I2C2_SCL, (M1 | PIN_INPUT)}, /* i2c2_scl.hdmi1_ddc_sda */ + {WAKEUP0, (M0 | PIN_OUTPUT_PULLUP)}, /* Wakeup0.Wakeup0 */ + {WAKEUP1, (M0 | PIN_OUTPUT_PULLDOWN)}, /* Wakeup1.Wakeup1 */ + {WAKEUP2, (M0 | PIN_OUTPUT_PULLDOWN)}, /* Wakeup2.Wakeup2 */ + {WAKEUP3, (M0 | PIN_OUTPUT_PULLUP)}, /* Wakeup3.Wakeup3 */ + {ON_OFF, (M1 | PIN_OUTPUT_PULLUP)}, /* on_off.on_off */ + {RTC_PORZ, (M0 | PIN_OUTPUT_PULLDOWN)}, /* rtc_porz.rtc_porz */ + {RTCK, (M0 | PIN_INPUT_PULLDOWN)}, /* rtck.rtck */ }; + +const struct pad_conf_entry early_padconf[] = { + {UART2_CTSN, (M2 | PIN_INPUT_SLEW)}, /* uart2_ctsn.uart3_rxd */ + {UART2_RTSN, (M1 | PIN_INPUT_SLEW)}, /* uart2_rtsn.uart3_txd */ + {I2C1_SDA, (PIN_INPUT_PULLUP | M0)}, /* I2C1_SDA */ + {I2C1_SCL, (PIN_INPUT_PULLUP | M0)}, /* I2C1_SCL */ +}; + +#ifdef CONFIG_IODELAY_RECALIBRATION +const struct iodelay_cfg_entry iodelay_cfg_array[] = { + {0x0114, 2980, 0}, /* CFG_GPMC_A0_IN */ + {0x0120, 2648, 0}, /* CFG_GPMC_A10_IN */ + {0x012C, 2918, 0}, /* CFG_GPMC_A11_IN */ + {0x0198, 2917, 0}, /* CFG_GPMC_A1_IN */ + {0x0204, 3156, 178}, /* CFG_GPMC_A2_IN */ + {0x0210, 3109, 246}, /* CFG_GPMC_A3_IN */ + {0x021C, 3142, 100}, /* CFG_GPMC_A4_IN */ + {0x0228, 3084, 33}, /* CFG_GPMC_A5_IN */ + {0x0234, 2778, 0}, /* CFG_GPMC_A6_IN */ + {0x0240, 3110, 0}, /* CFG_GPMC_A7_IN */ + {0x024C, 2874, 0}, /* CFG_GPMC_A8_IN */ + {0x0258, 3072, 0}, /* CFG_GPMC_A9_IN */ + {0x0264, 2466, 0}, /* CFG_GPMC_AD0_IN */ + {0x0270, 2523, 0}, /* CFG_GPMC_AD10_IN */ + {0x027C, 2453, 0}, /* CFG_GPMC_AD11_IN */ + {0x0288, 2285, 0}, /* CFG_GPMC_AD12_IN */ + {0x0294, 2206, 0}, /* CFG_GPMC_AD13_IN */ + {0x02A0, 1898, 0}, /* CFG_GPMC_AD14_IN */ + {0x02AC, 2473, 0}, /* CFG_GPMC_AD15_IN */ + {0x02B8, 2307, 0}, /* CFG_GPMC_AD1_IN */ + {0x02C4, 2691, 0}, /* CFG_GPMC_AD2_IN */ + {0x02D0, 2384, 0}, /* CFG_GPMC_AD3_IN */ + {0x02DC, 2462, 0}, /* CFG_GPMC_AD4_IN */ + {0x02E8, 2335, 0}, /* CFG_GPMC_AD5_IN */ + {0x02F4, 2370, 0}, /* CFG_GPMC_AD6_IN */ + {0x0300, 2389, 0}, /* CFG_GPMC_AD7_IN */ + {0x030C, 2672, 0}, /* CFG_GPMC_AD8_IN */ + {0x0318, 2334, 0}, /* CFG_GPMC_AD9_IN */ + {0x06F0, 480, 0}, /* CFG_RGMII0_RXC_IN */ + {0x06FC, 111, 1641}, /* CFG_RGMII0_RXCTL_IN */ + {0x0708, 272, 1116}, /* CFG_RGMII0_RXD0_IN */ + {0x0714, 243, 1260}, /* CFG_RGMII0_RXD1_IN */ + {0x0720, 0, 1614}, /* CFG_RGMII0_RXD2_IN */ + {0x072C, 105, 1673}, /* CFG_RGMII0_RXD3_IN */ + {0x0740, 531, 120}, /* CFG_RGMII0_TXC_OUT */ + {0x074C, 11, 60}, /* CFG_RGMII0_TXCTL_OUT */ + {0x0758, 7, 120}, /* CFG_RGMII0_TXD0_OUT */ + {0x0764, 0, 0}, /* CFG_RGMII0_TXD1_OUT */ + {0x0770, 276, 120}, /* CFG_RGMII0_TXD2_OUT */ + {0x077C, 440, 120}, /* CFG_RGMII0_TXD3_OUT */ + {0x0A70, 1551, 115}, /* CFG_VIN2A_D12_OUT */ + {0x0A7C, 816, 0}, /* CFG_VIN2A_D13_OUT */ + {0x0A88, 876, 0}, /* CFG_VIN2A_D14_OUT */ + {0x0A94, 312, 0}, /* CFG_VIN2A_D15_OUT */ + {0x0AA0, 58, 0}, /* CFG_VIN2A_D16_OUT */ + {0x0AAC, 0, 0}, /* CFG_VIN2A_D17_OUT */ + {0x0AB0, 702, 0}, /* CFG_VIN2A_D18_IN */ + {0x0ABC, 136, 976}, /* CFG_VIN2A_D19_IN */ + {0x0AD4, 210, 1357}, /* CFG_VIN2A_D20_IN */ + {0x0AE0, 189, 1462}, /* CFG_VIN2A_D21_IN */ + {0x0AEC, 232, 1278}, /* CFG_VIN2A_D22_IN */ + {0x0AF8, 0, 1397}, /* CFG_VIN2A_D23_IN */ +}; +#endif #endif /* _MUX_DATA_BEAGLE_X15_H_ */ diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index d4648558ec..94a1a8c256 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -17,6 +17,7 @@ #include <usb.h> #include <linux/usb/gadget.h> #include <asm/arch/gpio.h> +#include <asm/arch/dra7xx_iodelay.h> #include <asm/arch/sys_proto.h> #include <asm/arch/mmc_host_def.h> #include <asm/arch/sata.h> @@ -40,43 +41,6 @@ const struct omap_sysinfo sysinfo = { "Board: DRA7xx\n" }; -/* - * Adjust I/O delays on the Tx control and data lines of each MAC port. This - * is a workaround in order to work properly with the DP83865 PHYs on the EVM. - * In 3COM RGMII mode this PHY applies it's own internal clock delay, so we - * essentially need to counteract the DRA7xx internal delay, and we do this - * by delaying the control and data lines. If not using this PHY, you probably - * don't need to do this stuff! - */ -static void dra7xx_adj_io_delay(const struct io_delay *io_dly) -{ - int i = 0; - u32 reg_val; - u32 delta; - u32 coarse; - u32 fine; - - writel(CFG_IO_DELAY_UNLOCK_KEY, CFG_IO_DELAY_LOCK); - - while(io_dly[i].addr) { - writel(CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK, - io_dly[i].addr); - delta = io_dly[i].dly; - reg_val = readl(io_dly[i].addr) & 0x3ff; - coarse = ((reg_val >> 5) & 0x1F) + ((delta >> 5) & 0x1F); - coarse = (coarse > 0x1F) ? (0x1F) : (coarse); - fine = (reg_val & 0x1F) + (delta & 0x1F); - fine = (fine > 0x1F) ? (0x1F) : (fine); - reg_val = CFG_IO_DELAY_ACCESS_PATTERN | - CFG_IO_DELAY_LOCK_MASK | - ((coarse << 5) | (fine)); - writel(reg_val, io_dly[i].addr); - i++; - } - - writel(CFG_IO_DELAY_LOCK_KEY, CFG_IO_DELAY_LOCK); -} - /** * @brief board_init * @@ -107,23 +71,28 @@ int board_late_init(void) return 0; } -static void do_set_mux32(u32 base, - struct pad_conf_entry const *array, int size) +void set_muxconf_regs_essential(void) { - int i; - struct pad_conf_entry *pad = (struct pad_conf_entry *)array; - - for (i = 0; i < size; i++, pad++) - writel(pad->val, base + pad->offset); + do_set_mux32((*ctrl)->control_padconf_core_base, + early_padconf, ARRAY_SIZE(early_padconf)); } -void set_muxconf_regs_essential(void) +#ifdef CONFIG_IODELAY_RECALIBRATION +void recalibrate_iodelay(void) { - do_set_mux32((*ctrl)->control_padconf_core_base, - core_padconf_array_essential, - sizeof(core_padconf_array_essential) / - sizeof(struct pad_conf_entry)); + if (is_dra72x()) { + __recalibrate_iodelay(core_padconf_array_essential, + ARRAY_SIZE(core_padconf_array_essential), + iodelay_cfg_array, + ARRAY_SIZE(iodelay_cfg_array)); + } else { + __recalibrate_iodelay(dra74x_core_padconf_array, + ARRAY_SIZE(dra74x_core_padconf_array), + dra742_iodelay_cfg_array, + ARRAY_SIZE(dra742_iodelay_cfg_array)); + } } +#endif #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) int board_mmc_init(bd_t *bis) @@ -257,19 +226,6 @@ int spl_start_uboot(void) #endif #ifdef CONFIG_DRIVER_TI_CPSW - -/* Delay value to add to calibrated value */ -#define RGMII0_TXCTL_DLY_VAL ((0x3 << 5) + 0x8) -#define RGMII0_TXD0_DLY_VAL ((0x3 << 5) + 0x8) -#define RGMII0_TXD1_DLY_VAL ((0x3 << 5) + 0x2) -#define RGMII0_TXD2_DLY_VAL ((0x4 << 5) + 0x0) -#define RGMII0_TXD3_DLY_VAL ((0x4 << 5) + 0x0) -#define VIN2A_D13_DLY_VAL ((0x3 << 5) + 0x8) -#define VIN2A_D17_DLY_VAL ((0x3 << 5) + 0x8) -#define VIN2A_D16_DLY_VAL ((0x3 << 5) + 0x2) -#define VIN2A_D15_DLY_VAL ((0x4 << 5) + 0x0) -#define VIN2A_D14_DLY_VAL ((0x4 << 5) + 0x0) - extern u32 *const omap_si_rev; static void cpsw_control(int enabled) @@ -317,22 +273,6 @@ int board_eth_init(bd_t *bis) uint8_t mac_addr[6]; uint32_t mac_hi, mac_lo; uint32_t ctrl_val; - const struct io_delay io_dly[] = { - {CFG_RGMII0_TXCTL, RGMII0_TXCTL_DLY_VAL}, - {CFG_RGMII0_TXD0, RGMII0_TXD0_DLY_VAL}, - {CFG_RGMII0_TXD1, RGMII0_TXD1_DLY_VAL}, - {CFG_RGMII0_TXD2, RGMII0_TXD2_DLY_VAL}, - {CFG_RGMII0_TXD3, RGMII0_TXD3_DLY_VAL}, - {CFG_VIN2A_D13, VIN2A_D13_DLY_VAL}, - {CFG_VIN2A_D17, VIN2A_D17_DLY_VAL}, - {CFG_VIN2A_D16, VIN2A_D16_DLY_VAL}, - {CFG_VIN2A_D15, VIN2A_D15_DLY_VAL}, - {CFG_VIN2A_D14, VIN2A_D14_DLY_VAL}, - {0} - }; - - /* Adjust IO delay for RGMII tx path */ - dra7xx_adj_io_delay(io_dly); /* try reading mac address from efuse */ mac_lo = readl((*ctrl)->control_core_mac_id_0_lo); diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h index 48240779c9..c9301a51c0 100644 --- a/board/ti/dra7xx/mux_data.h +++ b/board/ti/dra7xx/mux_data.h @@ -76,30 +76,30 @@ const struct pad_conf_entry core_padconf_array_essential[] = { {I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */ {MDIO_MCLK, (PTU | PEN | M0)}, /* MDIO_MCLK */ {MDIO_D, (IEN | PTU | PEN | M0)}, /* MDIO_D */ - {RGMII0_TXC, (M0) }, - {RGMII0_TXCTL, (M0) }, - {RGMII0_TXD3, (M0) }, - {RGMII0_TXD2, (M0) }, - {RGMII0_TXD1, (M0) }, - {RGMII0_TXD0, (M0) }, - {RGMII0_RXC, (IEN | M0) }, - {RGMII0_RXCTL, (IEN | M0) }, - {RGMII0_RXD3, (IEN | M0) }, - {RGMII0_RXD2, (IEN | M0) }, - {RGMII0_RXD1, (IEN | M0) }, - {RGMII0_RXD0, (IEN | M0) }, - {VIN2A_D12, (M3) }, - {VIN2A_D13, (M3) }, - {VIN2A_D14, (M3) }, - {VIN2A_D15, (M3) }, - {VIN2A_D16, (M3) }, - {VIN2A_D17, (M3) }, - {VIN2A_D18, (IEN | M3)}, - {VIN2A_D19, (IEN | M3)}, - {VIN2A_D20, (IEN | M3)}, - {VIN2A_D21, (IEN | M3)}, - {VIN2A_D22, (IEN | M3)}, - {VIN2A_D23, (IEN | M3)}, + {RGMII0_TXC, (PIN_OUTPUT | MANUAL_MODE | M0) }, + {RGMII0_TXCTL, (PIN_OUTPUT | MANUAL_MODE | M0) }, + {RGMII0_TXD3, (PIN_OUTPUT | MANUAL_MODE | M0) }, + {RGMII0_TXD2, (PIN_OUTPUT | MANUAL_MODE | M0) }, + {RGMII0_TXD1, (PIN_OUTPUT | MANUAL_MODE | M0) }, + {RGMII0_TXD0, (PIN_OUTPUT | MANUAL_MODE | M0) }, + {RGMII0_RXC, (PIN_INPUT | MANUAL_MODE | M0) }, + {RGMII0_RXCTL, (PIN_INPUT | MANUAL_MODE | M0) }, + {RGMII0_RXD3, (PIN_INPUT | MANUAL_MODE | M0) }, + {RGMII0_RXD2, (PIN_INPUT | MANUAL_MODE | M0) }, + {RGMII0_RXD1, (PIN_INPUT | MANUAL_MODE | M0) }, + {RGMII0_RXD0, (PIN_INPUT | MANUAL_MODE | M0) }, + {VIN2A_D12, (PIN_OUTPUT | MANUAL_MODE | M3) }, + {VIN2A_D13, (PIN_OUTPUT | MANUAL_MODE | M3) }, + {VIN2A_D14, (PIN_OUTPUT | MANUAL_MODE | M3) }, + {VIN2A_D15, (PIN_OUTPUT | MANUAL_MODE | M3) }, + {VIN2A_D16, (PIN_OUTPUT | MANUAL_MODE | M3) }, + {VIN2A_D17, (PIN_OUTPUT | MANUAL_MODE | M3) }, + {VIN2A_D18, (PIN_INPUT | MANUAL_MODE | M3)}, + {VIN2A_D19, (PIN_INPUT | MANUAL_MODE | M3)}, + {VIN2A_D20, (PIN_INPUT | MANUAL_MODE | M3)}, + {VIN2A_D21, (PIN_INPUT | MANUAL_MODE | M3)}, + {VIN2A_D22, (PIN_INPUT | MANUAL_MODE | M3)}, + {VIN2A_D23, (PIN_INPUT | MANUAL_MODE | M3)}, #if defined(CONFIG_NAND) || defined(CONFIG_NOR) /* NAND / NOR pin-mux */ {GPMC_AD0 , M0 | IEN | PDIS}, /* GPMC_AD0 */ @@ -141,4 +141,295 @@ const struct pad_conf_entry core_padconf_array_essential[] = { {USB2_DRVVBUS, (M0 | IEN | FSC) }, {SPI1_CS1, (PEN | IDIS | M14) }, }; + +const struct pad_conf_entry early_padconf[] = { +#if (CONFIG_CONS_INDEX == 1) + {UART1_RXD, (PIN_INPUT_SLEW | M0)}, /* UART1_RXD */ + {UART1_TXD, (PIN_INPUT_SLEW | M0)}, /* UART1_TXD */ +#elif (CONFIG_CONS_INDEX == 3) + {UART3_RXD, (PIN_INPUT_SLEW | M0)}, /* UART3_RXD */ + {UART3_TXD, (PIN_INPUT_SLEW | M0)}, /* UART3_TXD */ +#endif + {I2C1_SDA, (PIN_INPUT | M0)}, /* I2C1_SDA */ + {I2C1_SCL, (PIN_INPUT | M0)}, /* I2C1_SCL */ +}; + +#ifdef CONFIG_IODELAY_RECALIBRATION +const struct iodelay_cfg_entry iodelay_cfg_array[] = { + {0x6F0, 480, 0}, /* RGMMI0_RXC_IN */ + {0x6FC, 111, 1641}, /* RGMMI0_RXCTL_IN */ + {0x708, 272, 1116}, /* RGMMI0_RXD0_IN */ + {0x714, 243, 1260}, /* RGMMI0_RXD1_IN */ + {0x720, 0, 1614}, /* RGMMI0_RXD2_IN */ + {0x72C, 105, 1673}, /* RGMMI0_RXD3_IN */ + {0x740, 531, 120}, /* RGMMI0_TXC_OUT */ + {0x74C, 11, 60}, /* RGMMI0_TXCTL_OUT */ + {0x758, 7, 120}, /* RGMMI0_TXD0_OUT */ + {0x764, 0, 0}, /* RGMMI0_TXD1_OUT */ + {0x770, 276, 120}, /* RGMMI0_TXD2_OUT */ + {0x77C, 440, 120}, /* RGMMI0_TXD3_OUT */ + {0xAB0, 702, 0}, /* CFG_VIN2A_D18_IN */ + {0xABC, 136, 976}, /* CFG_VIN2A_D19_IN */ + {0xAD4, 210, 1357}, /* CFG_VIN2A_D20_IN */ + {0xAE0, 189, 1462}, /* CFG_VIN2A_D21_IN */ + {0xAEC, 232, 1278}, /* CFG_VIN2A_D22_IN */ + {0xAF8, 0, 1397}, /* CFG_VIN2A_D23_IN */ + {0xA70, 1551, 115}, /* CFG_VIN2A_D12_OUT */ + {0xA7C, 816, 0}, /* CFG_VIN2A_D13_OUT */ + {0xA88, 876, 0}, /* CFG_VIN2A_D14_OUT */ + {0xA94, 312, 0}, /* CFG_VIN2A_D15_OUT */ + {0xAA0, 58, 0}, /* CFG_VIN2A_D16_OUT */ + {0xAAC, 0, 0}, /* CFG_VIN2A_D17_OUT */ +}; +#endif + +const struct pad_conf_entry dra74x_core_padconf_array[] = { + {GPMC_AD0, (M3 | PIN_INPUT)}, /* gpmc_ad0.vout3_d0 */ + {GPMC_AD1, (M3 | PIN_INPUT)}, /* gpmc_ad1.vout3_d1 */ + {GPMC_AD2, (M3 | PIN_INPUT)}, /* gpmc_ad2.vout3_d2 */ + {GPMC_AD3, (M3 | PIN_INPUT)}, /* gpmc_ad3.vout3_d3 */ + {GPMC_AD4, (M3 | PIN_INPUT)}, /* gpmc_ad4.vout3_d4 */ + {GPMC_AD5, (M3 | PIN_INPUT)}, /* gpmc_ad5.vout3_d5 */ + {GPMC_AD6, (M3 | PIN_INPUT)}, /* gpmc_ad6.vout3_d6 */ + {GPMC_AD7, (M3 | PIN_INPUT)}, /* gpmc_ad7.vout3_d7 */ + {GPMC_AD8, (M3 | PIN_INPUT)}, /* gpmc_ad8.vout3_d8 */ + {GPMC_AD9, (M3 | PIN_INPUT)}, /* gpmc_ad9.vout3_d9 */ + {GPMC_AD10, (M3 | PIN_INPUT)}, /* gpmc_ad10.vout3_d10 */ + {GPMC_AD11, (M3 | PIN_INPUT)}, /* gpmc_ad11.vout3_d11 */ + {GPMC_AD12, (M3 | PIN_INPUT)}, /* gpmc_ad12.vout3_d12 */ + {GPMC_AD13, (M3 | PIN_INPUT)}, /* gpmc_ad13.vout3_d13 */ + {GPMC_AD14, (M3 | PIN_INPUT)}, /* gpmc_ad14.vout3_d14 */ + {GPMC_AD15, (M3 | PIN_INPUT)}, /* gpmc_ad15.vout3_d15 */ + {GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a0.vout3_d16 */ + {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a1.vout3_d17 */ + {GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a2.vout3_d18 */ + {GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a3.vout3_d19 */ + {GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a4.vout3_d20 */ + {GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a5.vout3_d21 */ + {GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a6.vout3_d22 */ + {GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a7.vout3_d23 */ + {GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a8.vout3_hsync */ + {GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a9.vout3_vsync */ + {GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a10.vout3_de */ + {GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a11.gpio2_1 */ + {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN)}, /* gpmc_a13.qspi1_rtclk */ + {GPMC_A14, (M1 | PIN_INPUT_PULLDOWN)}, /* gpmc_a14.qspi1_d3 */ + {GPMC_A15, (M1 | PIN_INPUT_PULLDOWN)}, /* gpmc_a15.qspi1_d2 */ + {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN)}, /* gpmc_a16.qspi1_d0 */ + {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN)}, /* gpmc_a17.qspi1_d1 */ + {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN)}, /* gpmc_a18.qspi1_sclk */ + {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ + {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ + {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ + {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ + {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ + {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ + {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ + {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ + {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ + {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ + {GPMC_CS2, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs2.qspi1_cs0 */ + {GPMC_CS3, (M3 | PIN_INPUT_PULLUP)}, /* gpmc_cs3.vout3_clk */ + {VIN1A_CLK0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_clk0.vin1a_clk0 */ + {VIN1A_DE0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_de0.vin1a_de0 */ + {VIN1A_FLD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_fld0.vin1a_fld0 */ + {VIN1A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_hsync0.vin1a_hsync0 */ + {VIN1A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_vsync0.vin1a_vsync0 */ + {VIN1A_D0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d0.vin1a_d0 */ + {VIN1A_D1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d1.vin1a_d1 */ + {VIN1A_D2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d2.vin1a_d2 */ + {VIN1A_D3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d3.vin1a_d3 */ + {VIN1A_D4, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d4.vin1a_d4 */ + {VIN1A_D5, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d5.vin1a_d5 */ + {VIN1A_D6, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d6.vin1a_d6 */ + {VIN1A_D7, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d7.vin1a_d7 */ + {VIN1A_D8, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d8.vin1a_d8 */ + {VIN1A_D9, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d9.vin1a_d9 */ + {VIN1A_D10, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d10.vin1a_d10 */ + {VIN1A_D11, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d11.vin1a_d11 */ + {VIN1A_D12, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d12.vin1a_d12 */ + {VIN1A_D13, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d13.vin1a_d13 */ + {VIN1A_D14, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d14.vin1a_d14 */ + {VIN1A_D15, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d15.vin1a_d15 */ + {VIN1A_D16, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d16.vin1a_d16 */ + {VIN1A_D17, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d17.vin1a_d17 */ + {VIN1A_D18, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d18.vin1a_d18 */ + {VIN1A_D19, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d19.vin1a_d19 */ + {VIN1A_D20, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d20.vin1a_d20 */ + {VIN1A_D21, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d21.vin1a_d21 */ + {VIN1A_D22, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d22.vin1a_d22 */ + {VIN1A_D23, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d23.vin1a_d23 */ + {VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ + {VIN2A_D13, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ + {VIN2A_D14, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ + {VIN2A_D15, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ + {VIN2A_D16, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ + {VIN2A_D17, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ + {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ + {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ + {VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ + {VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ + {VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ + {VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ + {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */ + {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */ + {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_hsync.vout1_hsync */ + {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */ + {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */ + {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */ + {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */ + {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */ + {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */ + {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */ + {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */ + {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */ + {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */ + {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */ + {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */ + {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */ + {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */ + {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */ + {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */ + {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */ + {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */ + {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */ + {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */ + {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */ + {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */ + {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */ + {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */ + {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */ + {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ + {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */ + {RGMII0_TXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ + {RGMII0_TXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ + {RGMII0_TXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ + {RGMII0_TXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ + {RGMII0_TXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ + {RGMII0_TXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ + {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ + {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ + {RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ + {RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ + {RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ + {RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ + {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb1_drvvbus.usb1_drvvbus */ + {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb2_drvvbus.usb2_drvvbus */ + {GPIO6_14, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_14.i2c3_sda */ + {GPIO6_15, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_15.i2c3_scl */ + {GPIO6_16, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ + {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */ + {MCASP1_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp1_aclkx.mcasp1_aclkx */ + {MCASP1_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp1_fsx.mcasp1_fsx */ + {MCASP1_AXR0, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE15)}, /* mcasp1_axr0.mcasp1_axr0 */ + {MCASP1_AXR1, (M0 | PIN_INPUT_SLEW)}, /* mcasp1_axr1.mcasp1_axr1 */ + {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ + {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ + {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ + {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ + {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */ + {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */ + {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */ + {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.mcasp7_axr1 */ + {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */ + {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */ + {MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkr.mcasp2_aclkr */ + {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ + {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */ + {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */ + {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)}, /* mcasp3_axr1.mcasp3_axr1 */ + {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ + {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ + {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ + {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ + {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ + {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ + {MMC1_SDCD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mmc1_sdcd.mmc1_sdcd */ + {MMC1_SDWP, (M14 | PIN_INPUT_SLEW)}, /* mmc1_sdwp.gpio6_28 */ + {GPIO6_11, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ + {SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */ + {SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.spi1_d1 */ + {SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.spi1_d0 */ + {SPI1_CS0, (M0 | PIN_INPUT_PULLUP)}, /* spi1_cs0.spi1_cs0 */ + {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */ + {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */ + {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ + {SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */ + {SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */ + {SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */ + {SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.uart3_rtsn */ + {DCAN1_TX, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_tx.dcan1_tx */ + {DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.gpio1_15 */ + {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */ + {UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_txd.uart1_txd */ + {UART1_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_ctsn.mmc4_clk */ + {UART1_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_rtsn.mmc4_cmd */ + {UART2_RXD, (M3 | PIN_INPUT_PULLUP)}, /* N/A.mmc4_dat0 */ + {UART2_TXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_txd.mmc4_dat1 */ + {UART2_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.mmc4_dat2 */ + {UART2_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rtsn.mmc4_dat3 */ + {I2C2_SDA, (M0 | PIN_INPUT_PULLUP)}, /* i2c2_sda.i2c2_sda */ + {I2C2_SCL, (M0 | PIN_INPUT_PULLUP)}, /* i2c2_scl.i2c2_scl */ + {WAKEUP0, (M1 | PIN_OUTPUT)}, /* Wakeup0.dcan1_rx */ + {WAKEUP2, (M14 | PIN_OUTPUT)}, /* Wakeup2.gpio1_2 */ +}; + +#ifdef CONFIG_IODELAY_RECALIBRATION +const struct iodelay_cfg_entry dra742_iodelay_cfg_array[] = { + {0x06F0, 480, 0}, /* CFG_RGMII0_RXC_IN */ + {0x06FC, 111, 1641}, /* CFG_RGMII0_RXCTL_IN */ + {0x0708, 272, 1116}, /* CFG_RGMII0_RXD0_IN */ + {0x0714, 243, 1260}, /* CFG_RGMII0_RXD1_IN */ + {0x0720, 0, 1614}, /* CFG_RGMII0_RXD2_IN */ + {0x072C, 105, 1673}, /* CFG_RGMII0_RXD3_IN */ + {0x0740, 0, 0}, /* CFG_RGMII0_TXC_OUT */ + {0x074C, 1560, 120}, /* CFG_RGMII0_TXCTL_OUT */ + {0x0758, 1570, 120}, /* CFG_RGMII0_TXD0_OUT */ + {0x0764, 1500, 120}, /* CFG_RGMII0_TXD1_OUT */ + {0x0770, 1775, 120}, /* CFG_RGMII0_TXD2_OUT */ + {0x077C, 1875, 120}, /* CFG_RGMII0_TXD3_OUT */ + {0x08D0, 0, 0}, /* CFG_VIN1A_CLK0_IN */ + {0x08DC, 2600, 0}, /* CFG_VIN1A_D0_IN */ + {0x08E8, 2652, 46}, /* CFG_VIN1A_D10_IN */ + {0x08F4, 2541, 0}, /* CFG_VIN1A_D11_IN */ + {0x0900, 2603, 574}, /* CFG_VIN1A_D12_IN */ + {0x090C, 2548, 443}, /* CFG_VIN1A_D13_IN */ + {0x0918, 2624, 598}, /* CFG_VIN1A_D14_IN */ + {0x0924, 2535, 1027}, /* CFG_VIN1A_D15_IN */ + {0x0930, 2526, 818}, /* CFG_VIN1A_D16_IN */ + {0x093C, 2623, 797}, /* CFG_VIN1A_D17_IN */ + {0x0948, 2578, 888}, /* CFG_VIN1A_D18_IN */ + {0x0954, 2574, 1008}, /* CFG_VIN1A_D19_IN */ + {0x0960, 2527, 123}, /* CFG_VIN1A_D1_IN */ + {0x096C, 2577, 737}, /* CFG_VIN1A_D20_IN */ + {0x0978, 2627, 616}, /* CFG_VIN1A_D21_IN */ + {0x0984, 2573, 777}, /* CFG_VIN1A_D22_IN */ + {0x0990, 2730, 67}, /* CFG_VIN1A_D23_IN */ + {0x099C, 2509, 303}, /* CFG_VIN1A_D2_IN */ + {0x09A8, 2494, 267}, /* CFG_VIN1A_D3_IN */ + {0x09B4, 2474, 0}, /* CFG_VIN1A_D4_IN */ + {0x09C0, 2556, 181}, /* CFG_VIN1A_D5_IN */ + {0x09CC, 2516, 195}, /* CFG_VIN1A_D6_IN */ + {0x09D8, 2589, 210}, /* CFG_VIN1A_D7_IN */ + {0x09E4, 2624, 75}, /* CFG_VIN1A_D8_IN */ + {0x09F0, 2704, 14}, /* CFG_VIN1A_D9_IN */ + {0x09FC, 2469, 55}, /* CFG_VIN1A_DE0_IN */ + {0x0A08, 2557, 264}, /* CFG_VIN1A_FLD0_IN */ + {0x0A14, 2465, 269}, /* CFG_VIN1A_HSYNC0_IN */ + {0x0A20, 2411, 348}, /* CFG_VIN1A_VSYNC0_IN */ + {0x0A70, 150, 0}, /* CFG_VIN2A_D12_OUT */ + {0x0A7C, 1500, 0}, /* CFG_VIN2A_D13_OUT */ + {0x0A88, 1600, 0}, /* CFG_VIN2A_D14_OUT */ + {0x0A94, 900, 0}, /* CFG_VIN2A_D15_OUT */ + {0x0AA0, 680, 0}, /* CFG_VIN2A_D16_OUT */ + {0x0AAC, 500, 0}, /* CFG_VIN2A_D17_OUT */ + {0x0AB0, 702, 0}, /* CFG_VIN2A_D18_IN */ + {0x0ABC, 136, 976}, /* CFG_VIN2A_D19_IN */ + {0x0AD4, 210, 1357}, /* CFG_VIN2A_D20_IN */ + {0x0AE0, 189, 1462}, /* CFG_VIN2A_D21_IN */ + {0x0AEC, 232, 1278}, /* CFG_VIN2A_D22_IN */ + {0x0AF8, 0, 1397}, /* CFG_VIN2A_D23_IN */ +}; +#endif + #endif /* _MUX_DATA_DRA7XX_H_ */ diff --git a/board/toradex/colibri_vf/MAINTAINERS b/board/toradex/colibri_vf/MAINTAINERS index 551c575c9d..a1217a47bd 100644 --- a/board/toradex/colibri_vf/MAINTAINERS +++ b/board/toradex/colibri_vf/MAINTAINERS @@ -4,3 +4,7 @@ S: Maintained F: board/toradex/colibri_vf/ F: include/configs/colibri_vf.h F: configs/colibri_vf_defconfig +F: configs/colibri_vf_dtb_defconfig +F: arch/arm/dts/vf-colibri.dtsi +F: arch/arm/dts/vf500-colibri.dts +F: arch/arm/dts/vf610-colibri.dts diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 31ebb1935f..8618fd068c 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -20,6 +20,7 @@ #include <netdev.h> #include <i2c.h> #include <g_dnl.h> +#include <asm/gpio.h> DECLARE_GLOBAL_DATA_PTR; @@ -32,6 +33,12 @@ DECLARE_GLOBAL_DATA_PTR; #define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \ PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE) +#define USB_PEN_GPIO 83 + +static const iomux_v3_cfg_t usb_pads[] = { + VF610_PAD_PTD4__GPIO_83, +}; + int dram_init(void) { static const struct ddr3_jedec_timings timings = { @@ -146,6 +153,76 @@ static void setup_iomux_nfc(void) } #endif +#ifdef CONFIG_FSL_DSPI +static void setup_iomux_dspi(void) +{ + static const iomux_v3_cfg_t dspi1_pads[] = { + VF610_PAD_PTD5__DSPI1_CS0, + VF610_PAD_PTD6__DSPI1_SIN, + VF610_PAD_PTD7__DSPI1_SOUT, + VF610_PAD_PTD8__DSPI1_SCK, + }; + + imx_iomux_v3_setup_multiple_pads(dspi1_pads, ARRAY_SIZE(dspi1_pads)); +} +#endif + +#ifdef CONFIG_VYBRID_GPIO +static void setup_iomux_gpio(void) +{ + static const iomux_v3_cfg_t gpio_pads[] = { + VF610_PAD_PTA17__GPIO_7, + VF610_PAD_PTA20__GPIO_10, + VF610_PAD_PTA21__GPIO_11, + VF610_PAD_PTA30__GPIO_20, + VF610_PAD_PTA31__GPIO_21, + VF610_PAD_PTB0__GPIO_22, + VF610_PAD_PTB1__GPIO_23, + VF610_PAD_PTB6__GPIO_28, + VF610_PAD_PTB7__GPIO_29, + VF610_PAD_PTB8__GPIO_30, + VF610_PAD_PTB9__GPIO_31, + VF610_PAD_PTB12__GPIO_34, + VF610_PAD_PTB13__GPIO_35, + VF610_PAD_PTB16__GPIO_38, + VF610_PAD_PTB17__GPIO_39, + VF610_PAD_PTB18__GPIO_40, + VF610_PAD_PTB21__GPIO_43, + VF610_PAD_PTB22__GPIO_44, + VF610_PAD_PTC0__GPIO_45, + VF610_PAD_PTC1__GPIO_46, + VF610_PAD_PTC2__GPIO_47, + VF610_PAD_PTC3__GPIO_48, + VF610_PAD_PTC4__GPIO_49, + VF610_PAD_PTC5__GPIO_50, + VF610_PAD_PTC6__GPIO_51, + VF610_PAD_PTC7__GPIO_52, + VF610_PAD_PTC8__GPIO_53, + VF610_PAD_PTD31__GPIO_63, + VF610_PAD_PTD30__GPIO_64, + VF610_PAD_PTD29__GPIO_65, + VF610_PAD_PTD28__GPIO_66, + VF610_PAD_PTD27__GPIO_67, + VF610_PAD_PTD26__GPIO_68, + VF610_PAD_PTD25__GPIO_69, + VF610_PAD_PTD24__GPIO_70, + VF610_PAD_PTD9__GPIO_88, + VF610_PAD_PTD10__GPIO_89, + VF610_PAD_PTD11__GPIO_90, + VF610_PAD_PTD12__GPIO_91, + VF610_PAD_PTD13__GPIO_92, + VF610_PAD_PTB23__GPIO_93, + VF610_PAD_PTB26__GPIO_96, + VF610_PAD_PTB28__GPIO_98, + VF610_PAD_PTC29__GPIO_102, + VF610_PAD_PTC30__GPIO_103, + VF610_PAD_PTA7__GPIO_134, + }; + + imx_iomux_v3_setup_multiple_pads(gpio_pads, ARRAY_SIZE(gpio_pads)); +} +#endif + #ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[1] = { {ESDHC1_BASE_ADDR}, @@ -196,6 +273,9 @@ static void clock_init(void) clrsetbits_le32(&ccm->ccgr0, CCM_REG_CTRL_MASK, CCM_CCGR0_UART0_CTRL_MASK); +#ifdef CONFIG_FSL_DSPI + setbits_le32(&ccm->ccgr0, CCM_CCGR0_DSPI1_CTRL_MASK); +#endif clrsetbits_le32(&ccm->ccgr1, CCM_REG_CTRL_MASK, CCM_CCGR1_PIT_CTRL_MASK | CCM_CCGR1_WDOGA5_CTRL_MASK); clrsetbits_le32(&ccm->ccgr2, CCM_REG_CTRL_MASK, @@ -304,6 +384,14 @@ int board_early_init_f(void) setup_iomux_nfc(); #endif +#ifdef CONFIG_VYBRID_GPIO + setup_iomux_gpio(); +#endif + +#ifdef CONFIG_FSL_DSPI + setup_iomux_dspi(); +#endif + return 0; } @@ -383,3 +471,21 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) return 0; } + +#ifdef CONFIG_USB_EHCI_VF +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + switch (port) { + case 0: + /* USBC does not have PEN, also configured as USB client only */ + break; + case 1: + gpio_request(USB_PEN_GPIO, "usb-pen-gpio"); + gpio_direction_output(USB_PEN_GPIO, 0); + break; + } + return 0; +} +#endif diff --git a/board/vscom/baltos/Kconfig b/board/vscom/baltos/Kconfig new file mode 100644 index 0000000000..bc1edcf3a4 --- /dev/null +++ b/board/vscom/baltos/Kconfig @@ -0,0 +1,24 @@ +if TARGET_AM335X_BALTOS + +config SYS_BOARD + default "baltos" + +config SYS_VENDOR + default "vscom" + +config SYS_SOC + default "am33xx" + +config SYS_CONFIG_NAME + default "baltos" + +config CONS_INDEX + int "UART used for console" + range 1 6 + default 1 + help + The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced + in documentation, etc) available to it. Depending on your specific + board you may want something other than UART0. + +endif diff --git a/board/vscom/baltos/Makefile b/board/vscom/baltos/Makefile new file mode 100644 index 0000000000..804ac379db --- /dev/null +++ b/board/vscom/baltos/Makefile @@ -0,0 +1,13 @@ +# +# Makefile +# +# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),) +obj-y := mux.o +endif + +obj-y += board.o diff --git a/board/vscom/baltos/README b/board/vscom/baltos/README new file mode 100644 index 0000000000..f744ace997 --- /dev/null +++ b/board/vscom/baltos/README @@ -0,0 +1 @@ +BSP for VScom OnRISC Balios family devices, like Balios iR 5221. diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c new file mode 100644 index 0000000000..99ca60e2ac --- /dev/null +++ b/board/vscom/baltos/board.c @@ -0,0 +1,474 @@ +/* + * board.c + * + * Board functions for TI AM335X based boards + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <errno.h> +#include <spl.h> +#include <asm/arch/cpu.h> +#include <asm/arch/hardware.h> +#include <asm/arch/omap.h> +#include <asm/arch/ddr_defs.h> +#include <asm/arch/clock.h> +#include <asm/arch/gpio.h> +#include <asm/arch/mmc_host_def.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/mem.h> +#include <asm/arch/mux.h> +#include <asm/io.h> +#include <asm/emif.h> +#include <asm/gpio.h> +#include <i2c.h> +#include <miiphy.h> +#include <cpsw.h> +#include <power/tps65217.h> +#include <power/tps65910.h> +#include <environment.h> +#include <watchdog.h> +#include "board.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* GPIO that controls power to DDR on EVM-SK */ +#define GPIO_DDR_VTT_EN 7 +#define DIP_S1 44 + +static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; + +static int baltos_set_console(void) +{ + int val, i, dips = 0; + char buf[7]; + + for (i = 0; i < 4; i++) { + sprintf(buf, "dip_s%d", i + 1); + + if (gpio_request(DIP_S1 + i, buf)) { + printf("failed to export GPIO %d\n", DIP_S1 + i); + return 0; + } + + if (gpio_direction_input(DIP_S1 + i)) { + printf("failed to set GPIO %d direction\n", DIP_S1 + i); + return 0; + } + + val = gpio_get_value(DIP_S1 + i); + dips |= val << i; + } + + printf("DIPs: 0x%1x\n", (~dips) & 0xf); + + if ((dips & 0xf) == 0xe) + setenv("console", "ttyUSB0,115200n8"); + + return 0; +} + +static int read_eeprom(BSP_VS_HWPARAM *header) +{ + i2c_set_bus_num(1); + + /* Check if baseboard eeprom is available */ + if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) { + puts("Could not probe the EEPROM; something fundamentally " + "wrong on the I2C bus.\n"); + return -ENODEV; + } + + /* read the eeprom using i2c */ + if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1, (uchar *)header, + sizeof(BSP_VS_HWPARAM))) { + puts("Could not read the EEPROM; something fundamentally" + " wrong on the I2C bus.\n"); + return -EIO; + } + + if (header->Magic != 0xDEADBEEF) { + + printf("Incorrect magic number (0x%x) in EEPROM\n", + header->Magic); + + /* fill default values */ + header->SystemId = 211; + header->MAC1[0] = 0x00; + header->MAC1[1] = 0x00; + header->MAC1[2] = 0x00; + header->MAC1[3] = 0x00; + header->MAC1[4] = 0x00; + header->MAC1[5] = 0x01; + + header->MAC2[0] = 0x00; + header->MAC2[1] = 0x00; + header->MAC2[2] = 0x00; + header->MAC2[3] = 0x00; + header->MAC2[4] = 0x00; + header->MAC2[5] = 0x02; + + header->MAC3[0] = 0x00; + header->MAC3[1] = 0x00; + header->MAC3[2] = 0x00; + header->MAC3[3] = 0x00; + header->MAC3[4] = 0x00; + header->MAC3[5] = 0x03; + } + + return 0; +} + +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) + +static const struct ddr_data ddr3_baltos_data = { + .datardsratio0 = MT41K256M16HA125E_RD_DQS, + .datawdsratio0 = MT41K256M16HA125E_WR_DQS, + .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, + .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, +}; + +static const struct cmd_control ddr3_baltos_cmd_ctrl_data = { + .cmd0csratio = MT41K256M16HA125E_RATIO, + .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd1csratio = MT41K256M16HA125E_RATIO, + .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd2csratio = MT41K256M16HA125E_RATIO, + .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT, +}; + +static struct emif_regs ddr3_baltos_emif_reg_data = { + .sdram_config = MT41K256M16HA125E_EMIF_SDCFG, + .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF, + .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1, + .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2, + .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3, + .zq_config = MT41K256M16HA125E_ZQ_CFG, + .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY, +}; + +#ifdef CONFIG_SPL_OS_BOOT +int spl_start_uboot(void) +{ + /* break into full u-boot on 'c' */ + return (serial_tstc() && serial_getc() == 'c'); +} +#endif + +#define OSC (V_OSCK/1000000) +const struct dpll_params dpll_ddr = { + 266, OSC-1, 1, -1, -1, -1, -1}; +const struct dpll_params dpll_ddr_evm_sk = { + 303, OSC-1, 1, -1, -1, -1, -1}; +const struct dpll_params dpll_ddr_baltos = { + 400, OSC-1, 1, -1, -1, -1, -1}; + +void am33xx_spl_board_init(void) +{ + int mpu_vdd; + int sil_rev; + + /* Get the frequency */ + dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); + + /* + * The GP EVM, IDK and EVM SK use a TPS65910 PMIC. For all + * MPU frequencies we support we use a CORE voltage of + * 1.1375V. For MPU voltage we need to switch based on + * the frequency we are running at. + */ + i2c_set_bus_num(1); + + if (i2c_probe(TPS65910_CTRL_I2C_ADDR)) { + puts("i2c: cannot access TPS65910\n"); + return; + } + + /* + * Depending on MPU clock and PG we will need a different + * VDD to drive at that speed. + */ + sil_rev = readl(&cdev->deviceid) >> 28; + mpu_vdd = am335x_get_tps65910_mpu_vdd(sil_rev, + dpll_mpu_opp100.m); + + /* Tell the TPS65910 to use i2c */ + tps65910_set_i2c_control(); + + /* First update MPU voltage. */ + if (tps65910_voltage_update(MPU, mpu_vdd)) + return; + + /* Second, update the CORE voltage. */ + if (tps65910_voltage_update(CORE, TPS65910_OP_REG_SEL_1_1_3)) + return; + + /* Set CORE Frequencies to OPP100 */ + do_setup_dpll(&dpll_core_regs, &dpll_core_opp100); + + /* Set MPU Frequency to what we detected now that voltages are set */ + do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100); + + writel(0x000010ff, PRM_DEVICE_INST + 4); +} + +const struct dpll_params *get_dpll_ddr_params(void) +{ + enable_i2c1_pin_mux(); + i2c_set_bus_num(1); + + return &dpll_ddr_baltos; +} + +void set_uart_mux_conf(void) +{ + enable_uart0_pin_mux(); +} + +void set_mux_conf_regs(void) +{ + enable_board_pin_mux(); +} + +const struct ctrl_ioregs ioregs_baltos = { + .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, +}; + +void sdram_init(void) +{ + gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en"); + gpio_direction_output(GPIO_DDR_VTT_EN, 1); + + config_ddr(400, &ioregs_baltos, + &ddr3_baltos_data, + &ddr3_baltos_cmd_ctrl_data, + &ddr3_baltos_emif_reg_data, 0); +} +#endif + +/* + * Basic board specific setup. Pinmux has been handled already. + */ +int board_init(void) +{ +#if defined(CONFIG_HW_WATCHDOG) + hw_watchdog_init(); +#endif + + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; +#if defined(CONFIG_NOR) || defined(CONFIG_NAND) + gpmc_init(); +#endif + return 0; +} + +int ft_board_setup(void *blob, bd_t *bd) +{ + int node, ret; + unsigned char mac_addr[6]; + BSP_VS_HWPARAM header; + + /* get production data */ + if (read_eeprom(&header)) + return 0; + + /* setup MAC1 */ + mac_addr[0] = header.MAC1[0]; + mac_addr[1] = header.MAC1[1]; + mac_addr[2] = header.MAC1[2]; + mac_addr[3] = header.MAC1[3]; + mac_addr[4] = header.MAC1[4]; + mac_addr[5] = header.MAC1[5]; + + + node = fdt_path_offset(blob, "/ocp/ethernet/slave@4a100200"); + if (node < 0) { + printf("no /soc/fman/ethernet path offset\n"); + return -ENODEV; + } + + ret = fdt_setprop(blob, node, "mac-address", &mac_addr, 6); + if (ret) { + printf("error setting local-mac-address property\n"); + return -ENODEV; + } + + /* setup MAC2 */ + mac_addr[0] = header.MAC2[0]; + mac_addr[1] = header.MAC2[1]; + mac_addr[2] = header.MAC2[2]; + mac_addr[3] = header.MAC2[3]; + mac_addr[4] = header.MAC2[4]; + mac_addr[5] = header.MAC2[5]; + + node = fdt_path_offset(blob, "/ocp/ethernet/slave@4a100300"); + if (node < 0) { + printf("no /soc/fman/ethernet path offset\n"); + return -ENODEV; + } + + ret = fdt_setprop(blob, node, "mac-address", &mac_addr, 6); + if (ret) { + printf("error setting local-mac-address property\n"); + return -ENODEV; + } + + printf("\nFDT was successfully setup\n"); + + return 0; +} + +static struct module_pin_mux dip_pin_mux[] = { + {OFFSET(gpmc_ad12), (MODE(7) | RXACTIVE )}, /* GPIO1_12 */ + {OFFSET(gpmc_ad13), (MODE(7) | RXACTIVE )}, /* GPIO1_13 */ + {OFFSET(gpmc_ad14), (MODE(7) | RXACTIVE )}, /* GPIO1_14 */ + {OFFSET(gpmc_ad15), (MODE(7) | RXACTIVE )}, /* GPIO1_15 */ + {-1}, +}; + +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + BSP_VS_HWPARAM header; + char model[4]; + + /* get production data */ + if (read_eeprom(&header)) { + sprintf(model, "211"); + } else { + sprintf(model, "%d", header.SystemId); + if (header.SystemId == 215) { + configure_module_pin_mux(dip_pin_mux); + baltos_set_console(); + } + } + setenv("board_name", model); +#endif + + return 0; +} +#endif + +#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) +static void cpsw_control(int enabled) +{ + /* VTP can be added here */ + + return; +} + +static struct cpsw_slave_data cpsw_slaves[] = { + { + .slave_reg_ofs = 0x208, + .sliver_reg_ofs = 0xd80, + .phy_addr = 0, + }, + { + .slave_reg_ofs = 0x308, + .sliver_reg_ofs = 0xdc0, + .phy_addr = 7, + }, +}; + +static struct cpsw_platform_data cpsw_data = { + .mdio_base = CPSW_MDIO_BASE, + .cpsw_base = CPSW_BASE, + .mdio_div = 0xff, + .channels = 8, + .cpdma_reg_ofs = 0x800, + .slaves = 2, + .slave_data = cpsw_slaves, + .active_slave = 1, + .ale_reg_ofs = 0xd00, + .ale_entries = 1024, + .host_port_reg_ofs = 0x108, + .hw_stats_reg_ofs = 0x900, + .bd_ram_ofs = 0x2000, + .mac_control = (1 << 5), + .control = cpsw_control, + .host_port_num = 0, + .version = CPSW_CTRL_VERSION_2, +}; +#endif + +#if ((defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)) \ + && defined(CONFIG_SPL_BUILD)) || \ + ((defined(CONFIG_DRIVER_TI_CPSW) || \ + defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)) && \ + !defined(CONFIG_SPL_BUILD)) +int board_eth_init(bd_t *bis) +{ + int rv, n = 0; + uint8_t mac_addr[6]; + uint32_t mac_hi, mac_lo; + __maybe_unused struct am335x_baseboard_id header; + + /* + * Note here that we're using CPSW1 since that has a 1Gbit PHY while + * CSPW0 has a 100Mbit PHY. + * + * On product, CPSW1 maps to port labeled WAN. + */ + + /* try reading mac address from efuse */ + mac_lo = readl(&cdev->macid1l); + mac_hi = readl(&cdev->macid1h); + mac_addr[0] = mac_hi & 0xFF; + mac_addr[1] = (mac_hi & 0xFF00) >> 8; + mac_addr[2] = (mac_hi & 0xFF0000) >> 16; + mac_addr[3] = (mac_hi & 0xFF000000) >> 24; + mac_addr[4] = mac_lo & 0xFF; + mac_addr[5] = (mac_lo & 0xFF00) >> 8; + +#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) + if (!getenv("ethaddr")) { + printf("<ethaddr> not set. Validating first E-fuse MAC\n"); + + if (is_valid_ethaddr(mac_addr)) + eth_setenv_enetaddr("ethaddr", mac_addr); + } + +#ifdef CONFIG_DRIVER_TI_CPSW + writel((GMII1_SEL_RMII | GMII2_SEL_RGMII | RGMII2_IDMODE), &cdev->miisel); + cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII; + rv = cpsw_register(&cpsw_data); + if (rv < 0) + printf("Error %d registering CPSW switch\n", rv); + else + n += rv; +#endif + + /* + * + * CPSW RGMII Internal Delay Mode is not supported in all PVT + * operating points. So we must set the TX clock delay feature + * in the AR8051 PHY. Since we only support a single ethernet + * device in U-Boot, we only do this for the first instance. + */ +#define AR8051_PHY_DEBUG_ADDR_REG 0x1d +#define AR8051_PHY_DEBUG_DATA_REG 0x1e +#define AR8051_DEBUG_RGMII_CLK_DLY_REG 0x5 +#define AR8051_RGMII_TX_CLK_DLY 0x100 + const char *devname; + devname = miiphy_get_current_dev(); + + miiphy_write(devname, 0x7, AR8051_PHY_DEBUG_ADDR_REG, + AR8051_DEBUG_RGMII_CLK_DLY_REG); + miiphy_write(devname, 0x7, AR8051_PHY_DEBUG_DATA_REG, + AR8051_RGMII_TX_CLK_DLY); +#endif + return n; +} +#endif diff --git a/board/vscom/baltos/board.h b/board/vscom/baltos/board.h new file mode 100644 index 0000000000..bcdb6485d2 --- /dev/null +++ b/board/vscom/baltos/board.h @@ -0,0 +1,90 @@ +/* + * board.h + * + * TI AM335x boards information header + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * TI AM335x parts define a system EEPROM that defines certain sub-fields. + * We use these fields to in turn see what board we are on, and what + * that might require us to set or not set. + */ +#define HDR_NO_OF_MAC_ADDR 3 +#define HDR_ETH_ALEN 6 +#define HDR_NAME_LEN 8 + +struct am335x_baseboard_id { + unsigned int magic; + char name[HDR_NAME_LEN]; + char version[4]; + char serial[12]; + char config[32]; + char mac_addr[HDR_NO_OF_MAC_ADDR][HDR_ETH_ALEN]; +}; + +typedef struct _BSP_VS_HWPARAM // v1.0 +{ + uint32_t Magic; + uint32_t HwRev; + uint32_t SerialNumber; + char PrdDate[11]; // as a string ie. "01.01.2006" + uint16_t SystemId; + uint8_t MAC1[6]; // internal EMAC + uint8_t MAC2[6]; // SMSC9514 + uint8_t MAC3[6]; // WL1271 WLAN +} __attribute__ ((packed)) BSP_VS_HWPARAM; + +static inline int board_is_bone(struct am335x_baseboard_id *header) +{ + return !strncmp(header->name, "A335BONE", HDR_NAME_LEN); +} + +static inline int board_is_bone_lt(struct am335x_baseboard_id *header) +{ + return !strncmp(header->name, "A335BNLT", HDR_NAME_LEN); +} + +static inline int board_is_evm_sk(struct am335x_baseboard_id *header) +{ + return !strncmp("A335X_SK", header->name, HDR_NAME_LEN); +} + +static inline int board_is_idk(struct am335x_baseboard_id *header) +{ + return !strncmp(header->config, "SKU#02", 6); +} + +static inline int board_is_gp_evm(struct am335x_baseboard_id *header) +{ + return !strncmp("A33515BB", header->name, HDR_NAME_LEN); +} + +static inline int board_is_evm_15_or_later(struct am335x_baseboard_id *header) +{ + return (board_is_gp_evm(header) && + strncmp("1.5", header->version, 3) <= 0); +} + +/* + * We have three pin mux functions that must exist. We must be able to enable + * uart0, for initial output and i2c0 to read the main EEPROM. We then have a + * main pinmux function that can be overridden to enable all other pinmux that + * is required on the board. + */ +void enable_uart0_pin_mux(void); +void enable_uart1_pin_mux(void); +void enable_uart2_pin_mux(void); +void enable_uart3_pin_mux(void); +void enable_uart4_pin_mux(void); +void enable_uart5_pin_mux(void); +void enable_i2c0_pin_mux(void); +void enable_i2c1_pin_mux(void); +void enable_board_pin_mux(void); +#endif diff --git a/board/vscom/baltos/mux.c b/board/vscom/baltos/mux.c new file mode 100644 index 0000000000..8783b25b5f --- /dev/null +++ b/board/vscom/baltos/mux.c @@ -0,0 +1,194 @@ +/* + * mux.c + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/hardware.h> +#include <asm/arch/mux.h> +#include <asm/io.h> +#include <i2c.h> +#include "board.h" + +static struct module_pin_mux uart0_pin_mux[] = { + {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ + {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ + {-1}, +}; + +static struct module_pin_mux uart1_pin_mux[] = { + {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */ + {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */ + {-1}, +}; + +static struct module_pin_mux uart2_pin_mux[] = { + {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */ + {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */ + {-1}, +}; + +static struct module_pin_mux uart3_pin_mux[] = { + {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */ + {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */ + {-1}, +}; + +static struct module_pin_mux uart4_pin_mux[] = { + {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */ + {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */ + {-1}, +}; + +static struct module_pin_mux uart5_pin_mux[] = { + {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */ + {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */ + {-1}, +}; + +static struct module_pin_mux mmc0_pin_mux[] = { + {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ + {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ + {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ + {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ + {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ + {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ + //{OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */ + {-1}, +}; + +static struct module_pin_mux i2c0_pin_mux[] = { + {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | + PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ + {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | + PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ + {-1}, +}; + +static struct module_pin_mux i2c1_pin_mux[] = { + {OFFSET(spi0_d1), (MODE(2) | RXACTIVE | + PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ + {OFFSET(spi0_cs0), (MODE(2) | RXACTIVE | + PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ + {-1}, +}; + +static struct module_pin_mux gpio0_7_pin_mux[] = { + {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN)}, /* GPIO0_7 */ + {-1}, +}; + +static struct module_pin_mux rmii1_pin_mux[] = { + {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RGMII1_TCTL */ + {OFFSET(mii1_txen), MODE(1)}, /* RGMII1_TCTL */ + {OFFSET(mii1_txd1), MODE(1)}, /* RGMII1_TCTL */ + {OFFSET(mii1_txd0), MODE(1)}, /* RGMII1_TCTL */ + {OFFSET(mii1_rxd1), MODE(1) | RXACTIVE}, /* RGMII1_TCTL */ + {OFFSET(mii1_rxd0), MODE(1) | RXACTIVE}, /* RGMII1_TCTL */ + {OFFSET(rmii1_refclk), MODE(0) | RXACTIVE}, /* RGMII1_TCTL */ + {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */ + {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */ + {-1}, +}; + +static struct module_pin_mux rgmii2_pin_mux[] = { + {OFFSET(gpmc_a0), MODE(2)}, /* RGMII1_TCTL */ + {OFFSET(gpmc_a1), MODE(2) | RXACTIVE}, /* RGMII1_RCTL */ + {OFFSET(gpmc_a2), MODE(2)}, /* RGMII1_TD3 */ + {OFFSET(gpmc_a3), MODE(2)}, /* RGMII1_TD2 */ + {OFFSET(gpmc_a4), MODE(2)}, /* RGMII1_TD1 */ + {OFFSET(gpmc_a5), MODE(2)}, /* RGMII1_TD0 */ + {OFFSET(gpmc_a6), MODE(2)}, /* RGMII1_TCLK */ + {OFFSET(gpmc_a7), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */ + {OFFSET(gpmc_a8), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */ + {OFFSET(gpmc_a9), MODE(2) | RXACTIVE}, /* RGMII1_RD2 */ + {OFFSET(gpmc_a10), MODE(2) | RXACTIVE}, /* RGMII1_RD1 */ + {OFFSET(gpmc_a11), MODE(2) | RXACTIVE}, /* RGMII1_RD0 */ + {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */ + {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */ + {-1}, +}; + +static struct module_pin_mux nand_pin_mux[] = { + {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ + {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ + {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */ + {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */ + {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */ + {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */ + {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */ + {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */ + {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ + {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */ + {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ + {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ + {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ + {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ + {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */ + {-1}, +}; + +void enable_uart0_pin_mux(void) +{ + configure_module_pin_mux(uart0_pin_mux); +} + +void enable_uart1_pin_mux(void) +{ + configure_module_pin_mux(uart1_pin_mux); +} + +void enable_uart2_pin_mux(void) +{ + configure_module_pin_mux(uart2_pin_mux); +} + +void enable_uart3_pin_mux(void) +{ + configure_module_pin_mux(uart3_pin_mux); +} + +void enable_uart4_pin_mux(void) +{ + configure_module_pin_mux(uart4_pin_mux); +} + +void enable_uart5_pin_mux(void) +{ + configure_module_pin_mux(uart5_pin_mux); +} + +void enable_i2c0_pin_mux(void) +{ + configure_module_pin_mux(i2c0_pin_mux); +} + +void enable_i2c1_pin_mux(void) +{ + configure_module_pin_mux(i2c1_pin_mux); +} + +void enable_board_pin_mux() +{ + /* Baltos */ + configure_module_pin_mux(i2c1_pin_mux); + configure_module_pin_mux(gpio0_7_pin_mux); + configure_module_pin_mux(rgmii2_pin_mux); + configure_module_pin_mux(rmii1_pin_mux); + configure_module_pin_mux(mmc0_pin_mux); + +#if defined(CONFIG_NAND) + configure_module_pin_mux(nand_pin_mux); +#endif +} diff --git a/board/vscom/baltos/u-boot.lds b/board/vscom/baltos/u-boot.lds new file mode 100644 index 0000000000..315ba5b99a --- /dev/null +++ b/board/vscom/baltos/u-boot.lds @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2004-2008 Texas Instruments + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + *(.__image_copy_start) + *(.vectors) + CPUDIR/start.o (.text*) + board/vscom/baltos/built-in.o (.text*) + *(.text*) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { + *(.data*) + } + + . = ALIGN(4); + + . = .; + + . = ALIGN(4); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + . = ALIGN(4); + + .image_copy_end : + { + *(.__image_copy_end) + } + + .rel_dyn_start : + { + *(.__rel_dyn_start) + } + + .rel.dyn : { + *(.rel*) + } + + .rel_dyn_end : + { + *(.__rel_dyn_end) + } + + .hash : { *(.hash*) } + + .end : + { + *(.__end) + } + + _image_binary_end = .; + + /* + * Deprecated: this MMU section is used by pxa at present but + * should not be used by new boards/CPUs. + */ + . = ALIGN(4096); + .mmutable : { + *(.mmutable) + } + +/* + * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c + * __bss_base and __bss_limit are for linker only (overlay ordering) + */ + + .bss_start __rel_dyn_start (OVERLAY) : { + KEEP(*(.__bss_start)); + __bss_base = .; + } + + .bss __bss_base (OVERLAY) : { + *(.bss*) + . = ALIGN(4); + __bss_limit = .; + } + + .bss_end __bss_limit (OVERLAY) : { + KEEP(*(.__bss_end)); + } + + .dynsym _image_binary_end : { *(.dynsym) } + .dynbss : { *(.dynbss) } + .dynstr : { *(.dynstr*) } + .dynamic : { *(.dynamic*) } + .gnu.hash : { *(.gnu.hash) } + .plt : { *(.plt*) } + .interp : { *(.interp*) } + .gnu : { *(.gnu*) } + .ARM.exidx : { *(.ARM.exidx*) } +} diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 90625ab9e0..0af63d291f 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -50,6 +50,7 @@ DECLARE_GLOBAL_DATA_PTR; #define USDHC1_CD_GPIO IMX_GPIO_NR(1, 2) #define USDHC3_CD_GPIO IMX_GPIO_NR(3, 9) #define ETH_PHY_RESET IMX_GPIO_NR(3, 29) +#define REV_DETECTION IMX_GPIO_NR(2, 28) int dram_init(void) { @@ -105,6 +106,10 @@ static iomux_v3_cfg_t const enet_pads[] = { IOMUX_PADS(PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), }; +static iomux_v3_cfg_t const rev_detection_pad[] = { + IOMUX_PADS(PAD_EIM_EB0__GPIO2_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + static void setup_iomux_uart(void) { SETUP_IOMUX_PADS(uart1_pads); @@ -393,6 +398,17 @@ static const struct boot_mode board_boot_modes[] = { }; #endif +static bool is_revc1(void) +{ + SETUP_IOMUX_PADS(rev_detection_pad); + gpio_direction_input(REV_DETECTION); + + if (gpio_get_value(REV_DETECTION)) + return true; + else + return false; +} + int board_late_init(void) { #ifdef CONFIG_CMD_BMODE @@ -404,6 +420,11 @@ int board_late_init(void) setenv("board_rev", "MX6Q"); else setenv("board_rev", "MX6DL"); + + if (is_revc1()) + setenv("board_name", "C1"); + else + setenv("board_name", "B1"); #endif return 0; } @@ -424,7 +445,10 @@ int board_init(void) int checkboard(void) { - puts("Board: Wandboard\n"); + if (is_revc1()) + puts("Board: Wandboard rev C1\n"); + else + puts("Board: Wandboard rev B1\n"); return 0; } diff --git a/board/warp/README b/board/warp/README index db3100edba..22f9055eb6 100644 --- a/board/warp/README +++ b/board/warp/README @@ -34,7 +34,7 @@ Then U-boot should start and its messages will appear in the console program. Use the default environment variables: => env default -f -a -=> save +=> saveenv Run the DFU command: => dfu 0 mmc 0 diff --git a/common/Kconfig b/common/Kconfig index a2167f01f7..2976cd78dd 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -17,17 +17,97 @@ config SYS_HUSH_PARSER help Backward compatibility. +menu "Autoboot options" + +config AUTOBOOT_KEYED + bool "Stop autobooting via specific input key / string" + default n + help + This option enables stopping (aborting) of the automatic + boot feature only by issuing a specific input key or + string. If not enabled, any input key will abort the + U-Boot automatic booting process and bring the device + to the U-Boot prompt for user input. + +config AUTOBOOT_PROMPT + string "Autoboot stop prompt" + depends on AUTOBOOT_KEYED + default "Autoboot in %d seconds\\n" + help + This string is displayed before the boot delay selected by + CONFIG_BOOTDELAY starts. If it is not defined there is no + output indicating that autoboot is in progress. + + Note that this define is used as the (only) argument to a + printf() call, so it may contain '%' format specifications, + provided that it also includes, sepearated by commas exactly + like in a printf statement, the required arguments. It is + the responsibility of the user to select only such arguments + that are valid in the given context. + +config AUTOBOOT_ENCRYPTION + bool "Enable encryption in autoboot stopping" + depends on AUTOBOOT_KEYED + default n + +config AUTOBOOT_DELAY_STR + string "Delay autobooting via specific input key / string" + depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION + help + This option delays the automatic boot feature by issuing + a specific input key or string. If CONFIG_AUTOBOOT_DELAY_STR + or the environment variable "bootdelaykey" is specified + and this string is received from console input before + autoboot starts booting, U-Boot gives a command prompt. The + U-Boot prompt will time out if CONFIG_BOOT_RETRY_TIME is + used, otherwise it never times out. + +config AUTOBOOT_STOP_STR + string "Stop autobooting via specific input key / string" + depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION + help + This option enables stopping (aborting) of the automatic + boot feature only by issuing a specific input key or + string. If CONFIG_AUTOBOOT_STOP_STR or the environment + variable "bootstopkey" is specified and this string is + received from console input before autoboot starts booting, + U-Boot gives a command prompt. The U-Boot prompt never + times out, even if CONFIG_BOOT_RETRY_TIME is used. + +config AUTOBOOT_KEYED_CTRLC + bool "Enable Ctrl-C autoboot interruption" + depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION + default n + help + This option allows for the boot sequence to be interrupted + by ctrl-c, in addition to the "bootdelaykey" and "bootstopkey". + Setting this variable provides an escape sequence from the + limited "password" strings. + +config AUTOBOOT_STOP_STR_SHA256 + string "Stop autobooting via SHA256 encrypted password" + depends on AUTOBOOT_KEYED && AUTOBOOT_ENCRYPTION + help + This option adds the feature to only stop the autobooting, + and therefore boot into the U-Boot prompt, when the input + string / password matches a values that is encypted via + a SHA256 hash and saved in the environment. + +endmenu + comment "Commands" menu "Info commands" config CMD_BDI bool "bdinfo" + default y help Print board info config CMD_CONSOLE bool "coninfo" + default y help Print console devices and information. @@ -50,6 +130,7 @@ menu "Boot commands" config CMD_BOOTD bool "bootd" + default y help Run the command stored in the environment "bootcmd", i.e. "bootd" does the same thing as "run bootcmd". @@ -68,21 +149,25 @@ config CMD_GO config CMD_RUN bool "run" + default y help Run the command in the given environment variable. config CMD_IMI bool "iminfo" + default y help Print header information for application image. config CMD_IMLS bool "imls" + default y help List all images found in flash config CMD_XIMG bool "imxtract" + default y help Extract a part of a multi-image. @@ -104,13 +189,23 @@ config CMD_IMPORTENV config CMD_EDITENV bool "editenv" + default y help Edit environment variable. config CMD_SAVEENV bool "saveenv" + default y help - Run the command in the given environment variable. + Save all environment variables into the compiled-in persistent + storage. + +config CMD_ENV_EXISTS + bool "env exists" + default y + help + Check if a variable is defined in the environment for use in + shell scripting. endmenu @@ -118,6 +213,7 @@ menu "Memory commands" config CMD_MEMORY bool "md, mm, nm, mw, cp, cmp, base, loop" + default y help Memeory commands. md - memory display @@ -185,16 +281,19 @@ config CMD_DEMO config CMD_LOADB bool "loadb" + default y help Load a binary file over serial line. config CMD_LOADS bool "loads" + default y help Load an S-Record file over serial line config CMD_FLASH bool "flinfo, erase, protect" + default y help NOR flash support. flinfo - print FLASH memory information @@ -229,6 +328,7 @@ config CMD_USB config CMD_FPGA bool "fpga" + default y help FPGA support. @@ -239,21 +339,25 @@ menu "Shell scripting commands" config CMD_ECHO bool "echo" + default y help Echo args to console config CMD_ITEST bool "itest" + default y help Return true/false on integer compare. config CMD_SOURCE bool "source" + default y help Run script from memory config CMD_SETEXPR bool "setexpr" + default y help Evaluate boolean and math expressions and store the result in an env variable. @@ -267,6 +371,7 @@ menu "Network commands" config CMD_NET bool "bootp, tftpboot" select NET + default y help Network commands. bootp - boot image via network using BOOTP/TFTP protocol @@ -294,6 +399,7 @@ config CMD_DHCP config CMD_NFS bool "nfs" + default y help Boot image via network using NFS protocol. @@ -334,6 +440,7 @@ config CMD_TIME # TODO: rename to CMD_SLEEP config CMD_MISC bool "sleep" + default y help Delay execution for some time @@ -345,6 +452,7 @@ config CMD_TIMER config CMD_SETGETDCR bool "getdcr, setdcr, getidcr, setidcr" depends on 4xx + default y help getdcr - Get an AMCC PPC 4xx DCR's value setdcr - Set an AMCC PPC 4xx DCR's value diff --git a/common/autoboot.c b/common/autoboot.c index c27cc2c751..c367076257 100644 --- a/common/autoboot.c +++ b/common/autoboot.c @@ -12,6 +12,7 @@ #include <fdtdec.h> #include <menu.h> #include <post.h> +#include <u-boot/sha256.h> DECLARE_GLOBAL_DATA_PTR; @@ -26,15 +27,81 @@ DECLARE_GLOBAL_DATA_PTR; /* Stored value of bootdelay, used by autoboot_command() */ static int stored_bootdelay; -/*************************************************************************** - * Watch for 'delay' seconds for autoboot stop or autoboot delay string. - * returns: 0 - no key string, allow autoboot 1 - got key string, abort +#if defined(CONFIG_AUTOBOOT_KEYED) +#if defined(CONFIG_AUTOBOOT_STOP_STR_SHA256) + +/* + * Use a "constant-length" time compare function for this + * hash compare: + * + * https://crackstation.net/hashing-security.htm */ -# if defined(CONFIG_AUTOBOOT_KEYED) -static int abortboot_keyed(int bootdelay) +static int slow_equals(u8 *a, u8 *b, int len) +{ + int diff = 0; + int i; + + for (i = 0; i < len; i++) + diff |= a[i] ^ b[i]; + + return diff == 0; +} + +static int passwd_abort(uint64_t etime) +{ + const char *sha_env_str = getenv("bootstopkeysha256"); + u8 sha_env[SHA256_SUM_LEN]; + u8 sha[SHA256_SUM_LEN]; + char presskey[MAX_DELAY_STOP_STR]; + const char *algo_name = "sha256"; + u_int presskey_len = 0; + int abort = 0; + int size; + int ret; + + if (sha_env_str == NULL) + sha_env_str = CONFIG_AUTOBOOT_STOP_STR_SHA256; + + /* + * Generate the binary value from the environment hash value + * so that we can compare this value with the computed hash + * from the user input + */ + ret = hash_parse_string(algo_name, sha_env_str, sha_env); + if (ret) { + printf("Hash %s not supported!\n", algo_name); + return 0; + } + + /* + * We don't know how long the stop-string is, so we need to + * generate the sha256 hash upon each input character and + * compare the value with the one saved in the environment + */ + do { + if (tstc()) { + /* Check for input string overflow */ + if (presskey_len >= MAX_DELAY_STOP_STR) + return 0; + + presskey[presskey_len++] = getc(); + + /* Calculate sha256 upon each new char */ + hash_block(algo_name, (const void *)presskey, + presskey_len, sha, &size); + + /* And check if sha matches saved value in env */ + if (slow_equals(sha, sha_env, SHA256_SUM_LEN)) + abort = 1; + } + } while (!abort && get_ticks() <= etime); + + return abort; +} +#else +static int passwd_abort(uint64_t etime) { int abort = 0; - uint64_t etime = endtick(bootdelay); struct { char *str; u_int len; @@ -42,9 +109,7 @@ static int abortboot_keyed(int bootdelay) } delaykey[] = { { .str = getenv("bootdelaykey"), .retry = 1 }, - { .str = getenv("bootdelaykey2"), .retry = 1 }, { .str = getenv("bootstopkey"), .retry = 0 }, - { .str = getenv("bootstopkey2"), .retry = 0 }, }; char presskey[MAX_DELAY_STOP_STR]; @@ -52,30 +117,13 @@ static int abortboot_keyed(int bootdelay) u_int presskey_max = 0; u_int i; -#ifndef CONFIG_ZERO_BOOTDELAY_CHECK - if (bootdelay == 0) - return 0; -#endif - -# ifdef CONFIG_AUTOBOOT_PROMPT - printf(CONFIG_AUTOBOOT_PROMPT); -# endif - # ifdef CONFIG_AUTOBOOT_DELAY_STR if (delaykey[0].str == NULL) delaykey[0].str = CONFIG_AUTOBOOT_DELAY_STR; # endif -# ifdef CONFIG_AUTOBOOT_DELAY_STR2 - if (delaykey[1].str == NULL) - delaykey[1].str = CONFIG_AUTOBOOT_DELAY_STR2; -# endif # ifdef CONFIG_AUTOBOOT_STOP_STR - if (delaykey[2].str == NULL) - delaykey[2].str = CONFIG_AUTOBOOT_STOP_STR; -# endif -# ifdef CONFIG_AUTOBOOT_STOP_STR2 - if (delaykey[3].str == NULL) - delaykey[3].str = CONFIG_AUTOBOOT_STOP_STR2; + if (delaykey[1].str == NULL) + delaykey[1].str = CONFIG_AUTOBOOT_STOP_STR; # endif for (i = 0; i < sizeof(delaykey) / sizeof(delaykey[0]); i++) { @@ -125,6 +173,33 @@ static int abortboot_keyed(int bootdelay) } } while (!abort && get_ticks() <= etime); + return abort; +} +#endif + +/*************************************************************************** + * Watch for 'delay' seconds for autoboot stop or autoboot delay string. + * returns: 0 - no key string, allow autoboot 1 - got key string, abort + */ +static int abortboot_keyed(int bootdelay) +{ + int abort; + uint64_t etime = endtick(bootdelay); + +#ifndef CONFIG_ZERO_BOOTDELAY_CHECK + if (bootdelay == 0) + return 0; +#endif + +# ifdef CONFIG_AUTOBOOT_PROMPT + /* + * CONFIG_AUTOBOOT_PROMPT includes the %d for all boards. + * To print the bootdelay value upon bootup. + */ + printf(CONFIG_AUTOBOOT_PROMPT, bootdelay); +# endif + + abort = passwd_abort(etime); if (!abort) debug_bootkeys("key timeout\n"); diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index f16d5c719f..ed3b9351b1 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -400,6 +400,9 @@ static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq); printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq); #endif +#ifdef CONFIG_BOARD_TYPES + printf("Board Type = %ld\n", gd->board_type); +#endif return 0; } diff --git a/common/cmd_bmp.c b/common/cmd_bmp.c index cc904c2535..cb1f07119b 100644 --- a/common/cmd_bmp.c +++ b/common/cmd_bmp.c @@ -34,12 +34,12 @@ static int bmp_info (ulong addr); * didn't contain a valid BMP signature. */ #ifdef CONFIG_VIDEO_BMP_GZIP -bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp, - void **alloc_addr) +struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp, + void **alloc_addr) { void *dst; unsigned long len; - bmp_image_t *bmp; + struct bmp_image *bmp; /* * Decompress bmp image @@ -55,7 +55,7 @@ bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp, bmp = dst; /* align to 32-bit-aligned-address + 2 */ - bmp = (bmp_image_t *)((((unsigned int)dst + 1) & ~3) + 2); + bmp = (struct bmp_image *)((((unsigned int)dst + 1) & ~3) + 2); if (gunzip(bmp, CONFIG_SYS_VIDEO_LOGO_MAX_SIZE, (uchar *)addr, &len) != 0) { free(dst); @@ -80,8 +80,8 @@ bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp, return bmp; } #else -bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp, - void **alloc_addr) +struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp, + void **alloc_addr) { return NULL; } @@ -187,7 +187,7 @@ U_BOOT_CMD( */ static int bmp_info(ulong addr) { - bmp_image_t *bmp=(bmp_image_t *)addr; + struct bmp_image *bmp = (struct bmp_image *)addr; void *bmp_alloc_addr = NULL; unsigned long len; @@ -224,7 +224,7 @@ static int bmp_info(ulong addr) int bmp_display(ulong addr, int x, int y) { int ret; - bmp_image_t *bmp = (bmp_image_t *)addr; + struct bmp_image *bmp = (struct bmp_image *)addr; void *bmp_alloc_addr = NULL; unsigned long len; diff --git a/common/cmd_ide.c b/common/cmd_ide.c index 04a6d9b398..ecd3e9d64f 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -79,7 +79,7 @@ static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len #ifdef CONFIG_ATAPI static void atapi_inquiry(block_dev_desc_t *dev_desc); -static ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt, +static ulong atapi_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer); #endif @@ -1388,13 +1388,13 @@ static void atapi_inquiry(block_dev_desc_t *dev_desc) #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */ #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE) -ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer) +ulong atapi_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer) { ulong n = 0; unsigned char ccb[12]; /* Command descriptor block */ ulong cnt; - debug("atapi_read dev %d start %lX, blocks " LBAF " buffer at %lX\n", + debug("atapi_read dev %d start " LBAF " blocks " LBAF " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer); do { diff --git a/common/cmd_nand.c b/common/cmd_nand.c index 9433c80a04..1482462a50 100644 --- a/common/cmd_nand.c +++ b/common/cmd_nand.c @@ -133,115 +133,6 @@ static int set_dev(int dev) return 0; } -static inline int str2off(const char *p, loff_t *num) -{ - char *endptr; - - *num = simple_strtoull(p, &endptr, 16); - return *p != '\0' && *endptr == '\0'; -} - -static inline int str2long(const char *p, ulong *num) -{ - char *endptr; - - *num = simple_strtoul(p, &endptr, 16); - return *p != '\0' && *endptr == '\0'; -} - -static int get_part(const char *partname, int *idx, loff_t *off, loff_t *size, - loff_t *maxsize) -{ -#ifdef CONFIG_CMD_MTDPARTS - struct mtd_device *dev; - struct part_info *part; - u8 pnum; - int ret; - - ret = mtdparts_init(); - if (ret) - return ret; - - ret = find_dev_and_part(partname, &dev, &pnum, &part); - if (ret) - return ret; - - if (dev->id->type != MTD_DEV_TYPE_NAND) { - puts("not a NAND device\n"); - return -1; - } - - *off = part->offset; - *size = part->size; - *maxsize = part->size; - *idx = dev->id->num; - - ret = set_dev(*idx); - if (ret) - return ret; - - return 0; -#else - puts("offset is not a number\n"); - return -1; -#endif -} - -static int arg_off(const char *arg, int *idx, loff_t *off, loff_t *size, - loff_t *maxsize) -{ - if (!str2off(arg, off)) - return get_part(arg, idx, off, size, maxsize); - - if (*off >= nand_info[*idx].size) { - puts("Offset exceeds device limit\n"); - return -1; - } - - *maxsize = nand_info[*idx].size - *off; - *size = *maxsize; - return 0; -} - -static int arg_off_size(int argc, char *const argv[], int *idx, - loff_t *off, loff_t *size, loff_t *maxsize) -{ - int ret; - - if (argc == 0) { - *off = 0; - *size = nand_info[*idx].size; - *maxsize = *size; - goto print; - } - - ret = arg_off(argv[0], idx, off, size, maxsize); - if (ret) - return ret; - - if (argc == 1) - goto print; - - if (!str2off(argv[1], size)) { - printf("'%s' is not a number\n", argv[1]); - return -1; - } - - if (*size > *maxsize) { - puts("Size exceeds partition or device limit\n"); - return -1; - } - -print: - printf("device %d ", *idx); - if (*size == nand_info[*idx].size) - puts("whole chip\n"); - else - printf("offset 0x%llx, size 0x%llx\n", - (unsigned long long)*off, (unsigned long long)*size); - return 0; -} - #ifdef CONFIG_CMD_NAND_LOCK_UNLOCK static void print_status(ulong start, ulong end, ulong erasesize, int status) { @@ -322,7 +213,12 @@ int do_nand_env_oob(cmd_tbl_t *cmdtp, int argc, char *const argv[]) goto usage; /* We don't care about size, or maxsize. */ - if (arg_off(argv[2], &idx, &addr, &maxsize, &maxsize)) { + if (mtd_arg_off(argv[2], &idx, &addr, &maxsize, &maxsize, + MTD_DEV_TYPE_NAND, nand_info[idx].size)) { + puts("Offset or partition name expected\n"); + return 1; + } + if (set_dev(idx)) { puts("Offset or partition name expected\n"); return 1; } @@ -597,8 +493,12 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("\nNAND %s: ", cmd); /* skip first two or three arguments, look for offset and size */ - if (arg_off_size(argc - o, argv + o, &dev, &off, &size, - &maxsize) != 0) + if (mtd_arg_off_size(argc - o, argv + o, &dev, &off, &size, + &maxsize, MTD_DEV_TYPE_NAND, + nand_info[dev].size) != 0) + return 1; + + if (set_dev(dev)) return 1; nand = &nand_info[dev]; @@ -658,7 +558,12 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (s && !strcmp(s, ".raw")) { raw = 1; - if (arg_off(argv[3], &dev, &off, &size, &maxsize)) + if (mtd_arg_off(argv[3], &dev, &off, &size, &maxsize, + MTD_DEV_TYPE_NAND, + nand_info[dev].size)) + return 1; + + if (set_dev(dev)) return 1; nand = &nand_info[dev]; @@ -675,8 +580,13 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) rwsize = pagecount * (nand->writesize + nand->oobsize); } else { - if (arg_off_size(argc - 3, argv + 3, &dev, - &off, &size, &maxsize) != 0) + if (mtd_arg_off_size(argc - 3, argv + 3, &dev, &off, + &size, &maxsize, + MTD_DEV_TYPE_NAND, + nand_info[dev].size) != 0) + return 1; + + if (set_dev(dev)) return 1; /* size is unspecified */ @@ -814,8 +724,12 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (s && !strcmp(s, ".allexcept")) allexcept = 1; - if (arg_off_size(argc - 2, argv + 2, &dev, &off, &size, - &maxsize) < 0) + if (mtd_arg_off_size(argc - 2, argv + 2, &dev, &off, &size, + &maxsize, MTD_DEV_TYPE_NAND, + nand_info[dev].size) < 0) + return 1; + + if (set_dev(dev)) return 1; if (!nand_unlock(&nand_info[dev], off, size, allexcept)) { diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c index 06cc140567..feab01a71e 100644 --- a/common/cmd_onenand.c +++ b/common/cmd_onenand.c @@ -24,15 +24,8 @@ static struct mtd_info *mtd; static loff_t next_ofs; static loff_t skip_ofs; -static inline int str2long(char *p, ulong *num) -{ - char *endptr; - - *num = simple_strtoul(p, &endptr, 16); - return (*p != '\0' && *endptr == '\0') ? 1 : 0; -} - -static int arg_off_size(int argc, char * const argv[], ulong *off, size_t *size) +static int arg_off_size_onenand(int argc, char * const argv[], ulong *off, + size_t *size) { if (argc >= 1) { if (!(str2long(argv[0], off))) { @@ -399,7 +392,7 @@ static int do_onenand_read(cmd_tbl_t * cmdtp, int flag, int argc, char * const a addr = (ulong)simple_strtoul(argv[1], NULL, 16); printf("\nOneNAND read: "); - if (arg_off_size(argc - 2, argv + 2, &ofs, &len) != 0) + if (arg_off_size_onenand(argc - 2, argv + 2, &ofs, &len) != 0) return 1; ret = onenand_block_read(ofs, len, &retlen, (u8 *)addr, oob); @@ -425,7 +418,7 @@ static int do_onenand_write(cmd_tbl_t * cmdtp, int flag, int argc, char * const addr = (ulong)simple_strtoul(argv[1], NULL, 16); printf("\nOneNAND write: "); - if (arg_off_size(argc - 2, argv + 2, &ofs, &len) != 0) + if (arg_off_size_onenand(argc - 2, argv + 2, &ofs, &len) != 0) return 1; ret = onenand_block_write(ofs, len, &retlen, (u8 *)addr, withoob); @@ -461,7 +454,7 @@ static int do_onenand_erase(cmd_tbl_t * cmdtp, int flag, int argc, char * const printf("\nOneNAND erase: "); /* skip first two or three arguments, look for offset and size */ - if (arg_off_size(argc, argv, &ofs, &len) != 0) + if (arg_off_size_onenand(argc, argv, &ofs, &len) != 0) return 1; ret = onenand_block_erase(ofs, len, force); @@ -486,7 +479,7 @@ static int do_onenand_test(cmd_tbl_t * cmdtp, int flag, int argc, char * const a printf("\nOneNAND test: "); /* skip first two or three arguments, look for offset and size */ - if (arg_off_size(argc - 1, argv + 1, &ofs, &len) != 0) + if (arg_off_size_onenand(argc - 1, argv + 1, &ofs, &len) != 0) return 1; ret = onenand_block_test(ofs, len); diff --git a/common/cmd_part.c b/common/cmd_part.c index 8483c1230d..b860624d93 100644 --- a/common/cmd_part.c +++ b/common/cmd_part.c @@ -88,7 +88,7 @@ static int do_part_list(int argc, char * const argv[]) if (var != NULL) { int p; char str[512] = { '\0', }; - disk_partition_t info; + disk_partition_t info; for (p = 1; p < 128; p++) { char t[5]; @@ -112,6 +112,74 @@ static int do_part_list(int argc, char * const argv[]) return 0; } +static int do_part_start(int argc, char * const argv[]) +{ + block_dev_desc_t *desc; + disk_partition_t info; + char buf[512] = { 0 }; + int part; + int err; + int ret; + + if (argc < 3) + return CMD_RET_USAGE; + if (argc > 4) + return CMD_RET_USAGE; + + part = simple_strtoul(argv[2], NULL, 0); + + ret = get_device(argv[0], argv[1], &desc); + if (ret < 0) + return 1; + + err = get_partition_info(desc, part, &info); + if (err) + return 1; + + snprintf(buf, sizeof(buf), LBAF, info.start); + + if (argc > 3) + setenv(argv[3], buf); + else + printf("%s\n", buf); + + return 0; +} + +static int do_part_size(int argc, char * const argv[]) +{ + block_dev_desc_t *desc; + disk_partition_t info; + char buf[512] = { 0 }; + int part; + int err; + int ret; + + if (argc < 3) + return CMD_RET_USAGE; + if (argc > 4) + return CMD_RET_USAGE; + + part = simple_strtoul(argv[2], NULL, 0); + + ret = get_device(argv[0], argv[1], &desc); + if (ret < 0) + return 1; + + err = get_partition_info(desc, part, &info); + if (err) + return 1; + + snprintf(buf, sizeof(buf), LBAF, info.size); + + if (argc > 3) + setenv(argv[3], buf); + else + printf("%s\n", buf); + + return 0; +} + static int do_part(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { if (argc < 2) @@ -121,6 +189,10 @@ static int do_part(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return do_part_uuid(argc - 2, argv + 2); else if (!strcmp(argv[1], "list")) return do_part_list(argc - 2, argv + 2); + else if (!strcmp(argv[1], "start")) + return do_part_start(argc - 2, argv + 2); + else if (!strcmp(argv[1], "size")) + return do_part_size(argc - 2, argv + 2); return CMD_RET_USAGE; } @@ -136,5 +208,9 @@ U_BOOT_CMD( " - print a device's partition table\n" "part list <interface> <dev> [flags] <varname>\n" " - set environment variable to the list of partitions\n" - " flags can be -bootable (list only bootable partitions)" + " flags can be -bootable (list only bootable partitions)\n" + "part start <interface> <dev> <part> <varname>\n" + " - set environment variable to the start of the partition (in blocks)\n" + "part size <interface> <dev> <part> <varname>\n" + " - set environment variable to the size of the partition (in blocks)" ); diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c index f80f549d4e..aaca3e8a2a 100644 --- a/common/cmd_scsi.c +++ b/common/cmd_scsi.c @@ -54,10 +54,12 @@ static block_dev_desc_t scsi_dev_desc[CONFIG_SYS_SCSI_MAX_DEVICE]; * forward declerations of some Setup Routines */ void scsi_setup_test_unit_ready(ccb * pccb); -void scsi_setup_read6(ccb * pccb, unsigned long start, unsigned short blocks); -void scsi_setup_read_ext(ccb * pccb, unsigned long start, unsigned short blocks); -static void scsi_setup_write_ext(ccb *pccb, unsigned long start, - unsigned short blocks); +void scsi_setup_read6(ccb * pccb, lbaint_t start, unsigned short blocks); +void scsi_setup_read_ext(ccb * pccb, lbaint_t start, unsigned short blocks); +void scsi_setup_read16(ccb * pccb, lbaint_t start, unsigned long blocks); + +static void scsi_setup_write_ext(ccb *pccb, lbaint_t start, + unsigned short blocks); void scsi_setup_inquiry(ccb * pccb); void scsi_ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len); @@ -357,7 +359,9 @@ int do_scsi (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * scsi_read */ -#define SCSI_MAX_READ_BLK 0xFFFF /* almost the maximum amount of the scsi_ext command.. */ +/* almost the maximum amount of the scsi_ext command.. */ +#define SCSI_MAX_READ_BLK 0xFFFF +#define SCSI_LBA48_READ 0xFFFFFFF static ulong scsi_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer) @@ -379,7 +383,17 @@ static ulong scsi_read(int device, lbaint_t blknr, lbaint_t blkcnt, device, start, blks, (unsigned long)buffer); do { pccb->pdata=(unsigned char *)buf_addr; - if(blks>SCSI_MAX_READ_BLK) { +#ifdef CONFIG_SYS_64BIT_LBA + if (start > SCSI_LBA48_READ) { + unsigned long blocks; + blocks = min_t(lbaint_t, blks, SCSI_MAX_READ_BLK); + pccb->datalen = scsi_dev_desc[device].blksz * blocks; + scsi_setup_read16(pccb, start, blocks); + start += blocks; + blks -= blocks; + } else +#endif + if (blks > SCSI_MAX_READ_BLK) { pccb->datalen=scsi_dev_desc[device].blksz * SCSI_MAX_READ_BLK; smallblks=SCSI_MAX_READ_BLK; scsi_setup_read_ext(pccb,start,smallblks); @@ -579,7 +593,38 @@ void scsi_setup_test_unit_ready(ccb * pccb) pccb->msgout[0]=SCSI_IDENTIFY; /* NOT USED */ } -void scsi_setup_read_ext(ccb * pccb, unsigned long start, unsigned short blocks) +#ifdef CONFIG_SYS_64BIT_LBA +void scsi_setup_read16(ccb * pccb, lbaint_t start, unsigned long blocks) +{ + pccb->cmd[0] = SCSI_READ16; + pccb->cmd[1] = pccb->lun<<5; + pccb->cmd[2] = ((unsigned char) (start >> 56)) & 0xff; + pccb->cmd[3] = ((unsigned char) (start >> 48)) & 0xff; + pccb->cmd[4] = ((unsigned char) (start >> 40)) & 0xff; + pccb->cmd[5] = ((unsigned char) (start >> 32)) & 0xff; + pccb->cmd[6] = ((unsigned char) (start >> 24)) & 0xff; + pccb->cmd[7] = ((unsigned char) (start >> 16)) & 0xff; + pccb->cmd[8] = ((unsigned char) (start >> 8)) & 0xff; + pccb->cmd[9] = ((unsigned char) (start)) & 0xff; + pccb->cmd[10] = 0; + pccb->cmd[11] = ((unsigned char) (blocks >> 24)) & 0xff; + pccb->cmd[12] = ((unsigned char) (blocks >> 16)) & 0xff; + pccb->cmd[13] = ((unsigned char) (blocks >> 8)) & 0xff; + pccb->cmd[14] = (unsigned char) blocks & 0xff; + pccb->cmd[15] = 0; + pccb->cmdlen = 16; + pccb->msgout[0] = SCSI_IDENTIFY; /* NOT USED */ + debug ("scsi_setup_read16: cmd: %02X %02X " + "startblk %02X%02X%02X%02X%02X%02X%02X%02X " + "blccnt %02X%02X%02X%02X\n", + pccb->cmd[0], pccb->cmd[1], + pccb->cmd[2], pccb->cmd[3], pccb->cmd[4], pccb->cmd[5], + pccb->cmd[6], pccb->cmd[7], pccb->cmd[8], pccb->cmd[9], + pccb->cmd[11], pccb->cmd[12], pccb->cmd[13], pccb->cmd[14]); +} +#endif + +void scsi_setup_read_ext(ccb * pccb, lbaint_t start, unsigned short blocks) { pccb->cmd[0]=SCSI_READ10; pccb->cmd[1]=pccb->lun<<5; @@ -599,7 +644,7 @@ void scsi_setup_read_ext(ccb * pccb, unsigned long start, unsigned short blocks) pccb->cmd[7],pccb->cmd[8]); } -void scsi_setup_write_ext(ccb *pccb, unsigned long start, unsigned short blocks) +void scsi_setup_write_ext(ccb *pccb, lbaint_t start, unsigned short blocks) { pccb->cmd[0] = SCSI_WRITE10; pccb->cmd[1] = pccb->lun << 5; @@ -620,7 +665,7 @@ void scsi_setup_write_ext(ccb *pccb, unsigned long start, unsigned short blocks) pccb->cmd[7], pccb->cmd[8]); } -void scsi_setup_read6(ccb * pccb, unsigned long start, unsigned short blocks) +void scsi_setup_read6(ccb * pccb, lbaint_t start, unsigned short blocks) { pccb->cmd[0]=SCSI_READ6; pccb->cmd[1]=pccb->lun<<5 | (((unsigned char)(start>>16))&0x1f); diff --git a/common/cmd_sf.c b/common/cmd_sf.c index 342021df97..aef8c2a5ea 100644 --- a/common/cmd_sf.c +++ b/common/cmd_sf.c @@ -13,6 +13,8 @@ #include <mapmem.h> #include <spi.h> #include <spi_flash.h> +#include <jffs2/jffs2.h> +#include <linux/mtd/mtd.h> #include <asm/io.h> #include <dm/device-internal.h> @@ -133,14 +135,17 @@ static int do_spi_flash_probe(int argc, char * const argv[]) flash = dev_get_uclass_priv(new); #else + if (flash) + spi_flash_free(flash); + new = spi_flash_probe(bus, cs, speed, mode); + flash = new; + if (!new) { printf("Failed to initialize SPI flash at %u:%u\n", bus, cs); return 1; } - if (flash) - spi_flash_free(flash); flash = new; #endif @@ -256,23 +261,21 @@ static int spi_flash_update(struct spi_flash *flash, u32 offset, static int do_spi_flash_read_write(int argc, char * const argv[]) { unsigned long addr; - unsigned long offset; - unsigned long len; void *buf; char *endp; int ret = 1; + int dev = 0; + loff_t offset, len, maxsize; - if (argc < 4) + if (argc < 3) return -1; addr = simple_strtoul(argv[1], &endp, 16); if (*argv[1] == 0 || *endp != 0) return -1; - offset = simple_strtoul(argv[2], &endp, 16); - if (*argv[2] == 0 || *endp != 0) - return -1; - len = simple_strtoul(argv[3], &endp, 16); - if (*argv[3] == 0 || *endp != 0) + + if (mtd_arg_off_size(argc - 2, &argv[2], &dev, &offset, &len, + &maxsize, MTD_DEV_TYPE_NOR, flash->size)) return -1; /* Consistency checking */ @@ -311,31 +314,31 @@ static int do_spi_flash_read_write(int argc, char * const argv[]) static int do_spi_flash_erase(int argc, char * const argv[]) { - unsigned long offset; - unsigned long len; - char *endp; int ret; + int dev = 0; + loff_t offset, len, maxsize; + ulong size; if (argc < 3) return -1; - offset = simple_strtoul(argv[1], &endp, 16); - if (*argv[1] == 0 || *endp != 0) + if (mtd_arg_off(argv[1], &dev, &offset, &len, &maxsize, + MTD_DEV_TYPE_NOR, flash->size)) return -1; - ret = sf_parse_len_arg(argv[2], &len); + ret = sf_parse_len_arg(argv[2], &size); if (ret != 1) return -1; /* Consistency checking */ - if (offset + len > flash->size) { + if (offset + size > flash->size) { printf("ERROR: attempting %s past flash size (%#x)\n", argv[0], flash->size); return 1; } - ret = spi_flash_erase(flash, offset, len); - printf("SF: %zu bytes @ %#x Erased: %s\n", (size_t)len, (u32)offset, + ret = spi_flash_erase(flash, offset, size); + printf("SF: %zu bytes @ %#x Erased: %s\n", (size_t)size, (u32)offset, ret ? "ERROR" : "OK"); return ret == 0 ? 0 : 1; @@ -560,13 +563,17 @@ U_BOOT_CMD( "SPI flash sub-system", "probe [[bus:]cs] [hz] [mode] - init flash device on given SPI bus\n" " and chip select\n" - "sf read addr offset len - read `len' bytes starting at\n" - " `offset' to memory at `addr'\n" - "sf write addr offset len - write `len' bytes from memory\n" - " at `addr' to flash at `offset'\n" - "sf erase offset [+]len - erase `len' bytes from `offset'\n" - " `+len' round up `len' to block size\n" - "sf update addr offset len - erase and write `len' bytes from memory\n" - " at `addr' to flash at `offset'" + "sf read addr offset|partition len - read `len' bytes starting at\n" + " `offset' or from start of mtd\n" + " `partition'to memory at `addr'\n" + "sf write addr offset|partition len - write `len' bytes from memory\n" + " at `addr' to flash at `offset'\n" + " or to start of mtd `partition'\n" + "sf erase offset|partition [+]len - erase `len' bytes from `offset'\n" + " or from start of mtd `partition'\n" + " `+len' round up `len' to block size\n" + "sf update addr offset|partition len - erase and write `len' bytes from memory\n" + " at `addr' to flash at `offset'\n" + " or to start of mtd `partition'\n" SF_TEST_HELP ); diff --git a/common/cmd_test.c b/common/cmd_test.c index c93fe78231..7285f75469 100644 --- a/common/cmd_test.c +++ b/common/cmd_test.c @@ -5,15 +5,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ -/* - * Define _STDBOOL_H here to avoid macro expansion of true and false. - * If the future code requires macro true or false, remove this define - * and undef true and false before U_BOOT_CMD. This define and comment - * shall be removed if change to U_BOOT_CMD is made to take string - * instead of stringifying it. - */ -#define _STDBOOL_H - #include <common.h> #include <command.h> #include <fs.h> @@ -191,6 +182,9 @@ static int do_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return expr; } +#undef true +#undef false + U_BOOT_CMD( test, CONFIG_SYS_MAXARGS, 1, do_test, "minimal test like /bin/sh", diff --git a/common/fdt_support.c b/common/fdt_support.c index 9e50148462..10648b5a4a 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -194,6 +194,31 @@ static inline int fdt_setprop_uxx(void *fdt, int nodeoffset, const char *name, return fdt_setprop_u32(fdt, nodeoffset, name, (uint32_t)val); } +int fdt_root(void *fdt) +{ + char *serial; + int err; + + err = fdt_check_header(fdt); + if (err < 0) { + printf("fdt_root: %s\n", fdt_strerror(err)); + return err; + } + + serial = getenv("serial#"); + if (serial) { + err = fdt_setprop(fdt, 0, "serial-number", serial, + strlen(serial) + 1); + + if (err < 0) { + printf("WARNING: could not set serial-number %s.\n", + fdt_strerror(err)); + return err; + } + } + + return 0; +} int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end) { diff --git a/common/hash.c b/common/hash.c index c94c98be9e..a1b048204d 100644 --- a/common/hash.c +++ b/common/hash.c @@ -227,6 +227,26 @@ int hash_progressive_lookup_algo(const char *algo_name, } #ifndef USE_HOSTCC +int hash_parse_string(const char *algo_name, const char *str, uint8_t *result) +{ + struct hash_algo *algo; + int ret; + int i; + + ret = hash_lookup_algo(algo_name, &algo); + if (ret) + return ret; + + for (i = 0; i < algo->digest_size; i++) { + char chr[3]; + + strncpy(chr, &str[i * 2], 2); + result[i] = simple_strtoul(chr, NULL, 16); + } + + return 0; +} + /** * store_result: Store the resulting sum to an address or variable * @@ -315,7 +335,6 @@ static int parse_verify_sum(struct hash_algo *algo, char *verify_str, buf = map_sysmem(addr, algo->digest_size); memcpy(vsum, buf, algo->digest_size); } else { - unsigned int i; char *vsum_str; int digits = algo->digest_size * 2; @@ -335,14 +354,7 @@ static int parse_verify_sum(struct hash_algo *algo, char *verify_str, } } - for (i = 0; i < algo->digest_size; i++) { - char *nullp = vsum_str + (i + 1) * 2; - char end = *nullp; - - *nullp = '\0'; - vsum[i] = simple_strtoul(vsum_str + (i * 2), NULL, 16); - *nullp = end; - } + hash_parse_string(algo->name, vsum_str, vsum); } return 0; } diff --git a/common/image-fdt.c b/common/image-fdt.c index 7e2da7b3b7..80e3e63805 100644 --- a/common/image-fdt.c +++ b/common/image-fdt.c @@ -471,6 +471,10 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob, int ret = -EPERM; int fdt_ret; + if (fdt_root(blob) < 0) { + printf("ERROR: root node setup failed\n"); + goto err; + } if (fdt_chosen(blob) < 0) { printf("ERROR: /chosen node create failed\n"); goto err; diff --git a/common/image-fit.c b/common/image-fit.c index 4bd8feaf3b..28f7aa83ba 100644 --- a/common/image-fit.c +++ b/common/image-fit.c @@ -1464,10 +1464,10 @@ void fit_conf_print(const void *fit, int noffset, const char *p) /* Print out all of the specified loadables */ for (loadables_index = 0; - !fdt_get_string_index(fit, noffset, + fdt_get_string_index(fit, noffset, FIT_LOADABLE_PROP, loadables_index, - (const char **)&uname) > 0; + (const char **)&uname) == 0; loadables_index++) { if (loadables_index == 0) { diff --git a/common/lcd.c b/common/lcd.c index 055c366b19..5a52fe4287 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -448,8 +448,8 @@ static void draw_encoded_bitmap(ushort **fbp, ushort c, int cnt) /* * Do not call this function directly, must be called from lcd_display_bitmap. */ -static void lcd_display_rle8_bitmap(bmp_image_t *bmp, ushort *cmap, uchar *fb, - int x_off, int y_off) +static void lcd_display_rle8_bitmap(struct bmp_image *bmp, ushort *cmap, + uchar *fb, int x_off, int y_off) { uchar *bmap; ulong width, height; @@ -548,10 +548,10 @@ __weak void fb_put_word(uchar **fb, uchar **from) } #endif /* CONFIG_BMP_16BPP */ -__weak void lcd_set_cmap(bmp_image_t *bmp, unsigned colors) +__weak void lcd_set_cmap(struct bmp_image *bmp, unsigned colors) { int i; - bmp_color_table_entry_t cte; + struct bmp_color_table_entry cte; ushort *cmap = configuration_get_cmap(); for (i = 0; i < colors; ++i) { @@ -572,12 +572,14 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) ushort *cmap_base = NULL; ushort i, j; uchar *fb; - bmp_image_t *bmp = (bmp_image_t *)map_sysmem(bmp_image, 0); + struct bmp_image *bmp = (struct bmp_image *)map_sysmem(bmp_image, 0); uchar *bmap; ushort padded_width; unsigned long width, height, byte_width; unsigned long pwidth = panel_info.vl_col; unsigned colors, bpix, bmp_bpix; + int hdr_size; + struct bmp_color_table_entry *palette = bmp->color_table; if (!bmp || !(bmp->header.signature[0] == 'B' && bmp->header.signature[1] == 'M')) { @@ -589,6 +591,8 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) width = get_unaligned_le32(&bmp->header.width); height = get_unaligned_le32(&bmp->header.height); bmp_bpix = get_unaligned_le16(&bmp->header.bit_count); + hdr_size = get_unaligned_le16(&bmp->header.size); + debug("hdr_size=%d, bmp_bpix=%d\n", hdr_size, bmp_bpix); colors = 1 << bmp_bpix; @@ -613,8 +617,8 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) return 1; } - debug("Display-bmp: %d x %d with %d colors\n", - (int)width, (int)height, (int)colors); + debug("Display-bmp: %d x %d with %d colors, display %d\n", + (int)width, (int)height, (int)colors, 1 << bpix); if (bmp_bpix == 8) lcd_set_cmap(bmp, colors); @@ -641,6 +645,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) cmap_base = configuration_get_cmap(); #ifdef CONFIG_LCD_BMP_RLE8 u32 compression = get_unaligned_le32(&bmp->header.compression); + debug("compressed %d %d\n", compression, BMP_BI_RLE8); if (compression == BMP_BI_RLE8) { if (bpix != 16) { /* TODO implement render code for bpix != 16 */ @@ -663,7 +668,19 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) if (bpix != 16) { fb_put_byte(&fb, &bmap); } else { - *(uint16_t *)fb = cmap_base[*(bmap++)]; + struct bmp_color_table_entry *entry; + uint val; + + if (cmap_base) { + val = cmap_base[*bmap]; + } else { + entry = &palette[*bmap]; + val = entry->blue >> 3 | + entry->green >> 2 << 5 | + entry->red >> 3 << 11; + } + *(uint16_t *)fb = val; + bmap++; fb += sizeof(uint16_t) / sizeof(*fb); } } diff --git a/common/malloc_simple.c b/common/malloc_simple.c index d445199c58..9811ab60f6 100644 --- a/common/malloc_simple.c +++ b/common/malloc_simple.c @@ -26,6 +26,20 @@ void *malloc_simple(size_t bytes) return ptr; } +void *memalign_simple(size_t align, size_t bytes) +{ + ulong addr, new_ptr; + void *ptr; + + addr = ALIGN(gd->malloc_base + gd->malloc_ptr, bytes); + new_ptr = addr + bytes; + if (new_ptr > gd->malloc_limit) + return NULL; + ptr = map_sysmem(addr, bytes); + gd->malloc_ptr = ALIGN(new_ptr, sizeof(new_ptr)); + return ptr; +} + #ifdef CONFIG_SYS_MALLOC_SIMPLE void *calloc(size_t nmemb, size_t elem_size) { diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index de495c0dc4..552f80d1e3 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -43,13 +43,12 @@ static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector) (void *) spl_image.load_addr); end: + if (count == 0) { #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT - if (count == 0) - printf("spl: mmc block read error\n"); + puts("spl: mmc block read error\n"); #endif - - if (count == 0) return -1; + } return 0; } @@ -63,7 +62,7 @@ static int mmc_load_image_raw_partition(struct mmc *mmc, int partition) err = get_partition_info(&mmc->block_dev, partition, &info); if (err) { #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT - printf("spl: partition error\n"); + puts("spl: partition error\n"); #endif return -1; } @@ -83,7 +82,7 @@ static int mmc_load_image_raw_os(struct mmc *mmc) (void *) CONFIG_SYS_SPL_ARGS_ADDR); if (count == 0) { #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT - printf("spl: mmc block read error\n"); + puts("spl: mmc block read error\n"); #endif return -1; } @@ -131,19 +130,21 @@ void spl_mmc_load_image(void) return; } #endif -#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION +#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION) err = mmc_load_image_raw_partition(mmc, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION); -#else + if (!err) + return; +#elif defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) err = mmc_load_image_raw_sector(mmc, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR); -#endif if (!err) return; -#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) +#endif case MMCSD_MODE_FS: debug("spl: mmc boot mode: fs\n"); +#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION #ifdef CONFIG_SPL_FAT_SUPPORT #ifdef CONFIG_SPL_OS_BOOT if (!spl_start_uboot()) { @@ -153,12 +154,14 @@ void spl_mmc_load_image(void) return; } #endif +#ifdef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME err = spl_load_image_fat(&mmc->block_dev, CONFIG_SYS_MMCSD_FS_BOOT_PARTITION, CONFIG_SPL_FS_LOAD_PAYLOAD_NAME); if (!err) return; #endif +#endif #ifdef CONFIG_SPL_EXT_SUPPORT #ifdef CONFIG_SPL_OS_BOOT if (!spl_start_uboot()) { @@ -168,6 +171,7 @@ void spl_mmc_load_image(void) return; } #endif +#ifdef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME err = spl_load_image_ext(&mmc->block_dev, CONFIG_SYS_MMCSD_FS_BOOT_PARTITION, CONFIG_SPL_FS_LOAD_PAYLOAD_NAME); @@ -175,6 +179,7 @@ void spl_mmc_load_image(void) return; #endif #endif +#endif #ifdef CONFIG_SUPPORT_EMMC_BOOT case MMCSD_MODE_EMMCBOOT: /* @@ -201,16 +206,18 @@ void spl_mmc_load_image(void) return; } #endif -#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION +#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION) err = mmc_load_image_raw_partition(mmc, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION); -#else + if (!err) + return; +#elif defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) err = mmc_load_image_raw_sector(mmc, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR); -#endif if (!err) return; #endif +#endif case MMCSD_MODE_UNDEFINED: default: #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/common/usb_kbd.c b/common/usb_kbd.c index 49bfc096e4..e2af67d2f0 100644 --- a/common/usb_kbd.c +++ b/common/usb_kbd.c @@ -460,10 +460,12 @@ static int usb_kbd_probe(struct usb_device *dev, unsigned int ifnum) /* We found a USB Keyboard, install it. */ usb_set_protocol(dev, iface->desc.bInterfaceNumber, 0); + debug("USB KBD: found set idle...\n"); #if !defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP) && \ !defined(CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE) - debug("USB KBD: found set idle...\n"); usb_set_idle(dev, iface->desc.bInterfaceNumber, REPEAT_RATE / 4, 0); +#else + usb_set_idle(dev, iface->desc.bInterfaceNumber, 0, 0); #endif debug("USB KBD: enable interrupt pipe...\n"); diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index c46279eda5..87ade906ce 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -5,7 +5,13 @@ CONFIG_DRAM_CLK=480 CONFIG_DRAM_EMR1=4 CONFIG_SYS_CLK_FREQ=912000000 CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 0fbc88067b..5a450af7bd 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -7,7 +7,13 @@ CONFIG_MMC1_CD_PIN="PG13" CONFIG_MMC_SUNXI_SLOT_EXTRA=1 CONFIG_USB1_VBUS_PIN="PB10" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,SUNXI_EMAC,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index 5d541b06ab..213ece6c4c 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -11,7 +11,13 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="PB10" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index 51252248db..d71c11cbbd 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -12,7 +12,13 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 5493b1e6e8..6445b25eb1 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -6,8 +6,14 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_USB0_VBUS_PIN="PC17" CONFIG_USB0_VBUS_DET="PH5" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index 114b811935..650670fb1e 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -3,8 +3,14 @@ CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=480 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index fc736b0bc0..3f925049c4 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -7,8 +7,14 @@ CONFIG_MMC3_CD_PIN="PH11" CONFIG_MMC_SUNXI_SLOT_EXTRA=3 CONFIG_VIDEO_VGA=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Ainol_AW1_defconfig b/configs/Ainol_AW1_defconfig index 4ac6ffa858..f94cd5a2ce 100644 --- a/configs/Ainol_AW1_defconfig +++ b/configs/Ainol_AW1_defconfig @@ -13,7 +13,11 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ainol-aw1" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig index 410b1529f5..99aa141e52 100644 --- a/configs/Ampe_A76_defconfig +++ b/configs/Ampe_A76_defconfig @@ -12,7 +12,11 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ampe-a76" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index ce46f01587..016ccd9e99 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -4,7 +4,13 @@ CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="PG13" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t004" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig index 5353acf38d..0313e55271 100644 --- a/configs/B4420QDS_NAND_defconfig +++ b/configs/B4420QDS_NAND_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig index 557c6003ca..6352ef9b54 100644 --- a/configs/B4420QDS_SPIFLASH_defconfig +++ b/configs/B4420QDS_SPIFLASH_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig index cc11e039d7..3b449deb7c 100644 --- a/configs/B4420QDS_defconfig +++ b/configs/B4420QDS_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig index 6ae1a2e6b1..afa06002f3 100644 --- a/configs/B4860QDS_NAND_defconfig +++ b/configs/B4860QDS_NAND_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig index 5c276c3a4c..a335ad368e 100644 --- a/configs/B4860QDS_SECURE_BOOT_defconfig +++ b/configs/B4860QDS_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig index ea8101dd9e..18c3d941b1 100644 --- a/configs/B4860QDS_SPIFLASH_defconfig +++ b/configs/B4860QDS_SPIFLASH_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig index 33909431c2..01229ccd3a 100644 --- a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig index 50f494842e..8f300c07ef 100644 --- a/configs/B4860QDS_defconfig +++ b/configs/B4860QDS_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig index 4ebe4a4d6a..90aa8656ea 100644 --- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig @@ -3,5 +3,6 @@ CONFIG_MPC85xx=y CONFIG_TARGET_BSC9131RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND,SYS_CLK_100" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig index 7360bd0287..9cd68f024d 100644 --- a/configs/BSC9131RDB_NAND_defconfig +++ b/configs/BSC9131RDB_NAND_defconfig @@ -3,5 +3,6 @@ CONFIG_MPC85xx=y CONFIG_TARGET_BSC9131RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig index b64d1729fc..d90d7a00bf 100644 --- a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9131RDB=y CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,SPIFLASH,SYS_CLK_100" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9131RDB_SPIFLASH_defconfig b/configs/BSC9131RDB_SPIFLASH_defconfig index 5f4028b70b..4ba8d6237d 100644 --- a/configs/BSC9131RDB_SPIFLASH_defconfig +++ b/configs/BSC9131RDB_SPIFLASH_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9131RDB=y CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig index 44a71618a9..b0153c4fdf 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_100,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig index 439369f3a3..066e6f7c89 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_100" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig index fcae999029..31bcec41da 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_133,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig index de0f545917..64952a02b4 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_133" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig index 68d1c414b3..b5759fb336 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_100,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig index b7052e5d01..9f309779d8 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_100" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig index 44ba1528e4..7becdfeb39 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_133,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig index 1298b7f4f9..770c7237dd 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_133" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig index 8a2c495106..5b84924c62 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig index 1fceceb60f..365d13e847 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig index f1a1ead827..d9e021a4ad 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig index d1d8381431..2f52320d66 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig index 2262a6c452..bea9e230dd 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig index a755f4c24c..1f7557a768 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig index 3607060d31..933ef77630 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig index 22ed1518fc..3cbe89bd2c 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index 2779719f52..3e186f6d0e 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -4,8 +4,14 @@ CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 CONFIG_GMAC_TX_DELAY=3 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index 5740d82941..5bd2fd6a59 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -6,8 +6,14 @@ CONFIG_USB1_VBUS_PIN="PH0" CONFIG_USB2_VBUS_PIN="PH1" CONFIG_GMAC_TX_DELAY=3 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig index c788f60ec1..c6f0ae4432 100644 --- a/configs/C29XPCIE_NAND_defconfig +++ b/configs/C29XPCIE_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_C29XPCIE=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig index 21a894707e..6c982dd759 100644 --- a/configs/C29XPCIE_NOR_SECBOOT_defconfig +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig index cabe2af8e0..e95ff0a48b 100644 --- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig index baa97a0d64..29889ea939 100644 --- a/configs/C29XPCIE_SPIFLASH_defconfig +++ b/configs/C29XPCIE_SPIFLASH_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig index 9fada48169..20bbe8185d 100644 --- a/configs/C29XPCIE_defconfig +++ b/configs/C29XPCIE_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/CPCI2DP_defconfig b/configs/CPCI2DP_defconfig index 23631e92ab..9f98014dc3 100644 --- a/configs/CPCI2DP_defconfig +++ b/configs/CPCI2DP_defconfig @@ -1,3 +1,6 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_CPCI2DP=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/CPCI4052_defconfig b/configs/CPCI4052_defconfig index 1eff08299e..c4fac4144b 100644 --- a/configs/CPCI4052_defconfig +++ b/configs/CPCI4052_defconfig @@ -1,4 +1,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_CPCI4052=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig index db22e4c6dc..54f4846e4a 100644 --- a/configs/CSQ_CS908_defconfig +++ b/configs/CSQ_CS908_defconfig @@ -5,10 +5,16 @@ CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI,SUNXI_GMAC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y CONFIG_AXP221_DLDO1_VOLT=3300 CONFIG_AXP221_ALDO1_VOLT=3300 +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig index 9bce985be0..3a2a219f48 100644 --- a/configs/Chuwi_V7_CW0825_defconfig +++ b/configs/Chuwi_V7_CW0825_defconfig @@ -12,10 +12,14 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_HITACHI_TX18D42VM=y CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-chuwi-v7-cw0825" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y CONFIG_VIDEO_LCD_SPI_CS="PA0" CONFIG_VIDEO_LCD_SPI_SCLK="PA1" CONFIG_VIDEO_LCD_SPI_MOSI="PA2" diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig index 04f0e2ad44..9d84901d00 100644 --- a/configs/Colombus_defconfig +++ b/configs/Colombus_defconfig @@ -5,9 +5,15 @@ CONFIG_DRAM_CLK=240 CONFIG_DRAM_ZQ=251 CONFIG_USB1_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI,SUNXI_GMAC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y CONFIG_AXP221_ALDO1_VOLT=3300 +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index 4f403d4595..0fbaa23371 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -4,8 +4,14 @@ CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=480 CONFIG_MMC0_CD_PIN="PH1" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig index 5ed877c1b5..0d0051e0d5 100644 --- a/configs/Cubieboard_defconfig +++ b/configs/Cubieboard_defconfig @@ -3,7 +3,13 @@ CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=480 CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index 2acc3ad32c..57a38477e6 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -5,8 +5,14 @@ CONFIG_DRAM_CLK=432 CONFIG_VIDEO_VGA=y CONFIG_GMAC_TX_DELAY=1 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(12),USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Astar_MID756_defconfig b/configs/Et_q8_v1_6_defconfig index f334032846..e36895c2d5 100644 --- a/configs/Astar_MID756_defconfig +++ b/configs/Et_q8_v1_6_defconfig @@ -12,10 +12,14 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_USB_MUSB_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-astar-mid756" +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-et-q8-v1.6" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y CONFIG_AXP221_DLDO1_VOLT=3300 CONFIG_AXP221_ALDO1_VOLT=3000 diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig index 2fea609ac7..02c657a877 100644 --- a/configs/Hummingbird_A31_defconfig +++ b/configs/Hummingbird_A31_defconfig @@ -7,9 +7,15 @@ CONFIG_USB2_VBUS_PIN="" CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI,SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPA(21)" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y CONFIG_AXP221_ALDO1_VOLT=3300 +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig index 2c861241a4..7800fa2a16 100644 --- a/configs/Hyundai_A7HD_defconfig +++ b/configs/Hyundai_A7HD_defconfig @@ -14,7 +14,11 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-hyundai-a7hd" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y diff --git a/configs/Ippo_q8h_v1_2_a33_1024x600_defconfig b/configs/Ippo_q8h_v1_2_a33_1024x600_defconfig index 7ad3e281ce..63910c2b18 100644 --- a/configs/Ippo_q8h_v1_2_a33_1024x600_defconfig +++ b/configs/Ippo_q8h_v1_2_a33_1024x600_defconfig @@ -13,9 +13,13 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ippo-q8h-v1.2-lcd1024x600" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y CONFIG_AXP221_DLDO1_VOLT=3300 CONFIG_AXP221_ALDO1_VOLT=3000 diff --git a/configs/Ippo_q8h_v1_2_defconfig b/configs/Ippo_q8h_v1_2_defconfig index 47631f0d7c..ab622106d5 100644 --- a/configs/Ippo_q8h_v1_2_defconfig +++ b/configs/Ippo_q8h_v1_2_defconfig @@ -13,9 +13,13 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-ippo-q8h-v1.2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y CONFIG_AXP221_DLDO1_VOLT=3300 CONFIG_AXP221_ALDO1_VOLT=3000 diff --git a/configs/Ippo_q8h_v5_defconfig b/configs/Ippo_q8h_v5_defconfig index fc9428b80b..312a38ca18 100644 --- a/configs/Ippo_q8h_v5_defconfig +++ b/configs/Ippo_q8h_v5_defconfig @@ -13,9 +13,13 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-ippo-q8h-v5" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y CONFIG_AXP221_DLDO1_VOLT=3300 CONFIG_AXP221_ALDO1_VOLT=3000 diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig index e7505085ca..04ec7ab070 100644 --- a/configs/Linksprite_pcDuino3_Nano_defconfig +++ b/configs/Linksprite_pcDuino3_Nano_defconfig @@ -6,8 +6,14 @@ CONFIG_DRAM_ZQ=122 CONFIG_USB1_VBUS_PIN="PH11" CONFIG_GMAC_TX_DELAY=3 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(2),USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index 0e8bec7b07..6d7690d650 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -4,8 +4,14 @@ CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=480 CONFIG_DRAM_ZQ=122 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPH(2),USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig index 3ec7b2b6b1..ddd162fe15 100644 --- a/configs/Linksprite_pcDuino_defconfig +++ b/configs/Linksprite_pcDuino_defconfig @@ -3,7 +3,13 @@ CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index d22667119a..58de96b08c 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -1,3 +1,3 @@ CONFIG_M68K=y CONFIG_TARGET_M5208EVBE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig index a13cc8b8bc..6a2d175336 100644 --- a/configs/M52277EVB_defconfig +++ b/configs/M52277EVB_defconfig @@ -1,3 +1,7 @@ CONFIG_M68K=y CONFIG_TARGET_M52277EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_SPANSION_BOOT,SYS_TEXT_BASE=0x00000000" +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig index 65de4d5c59..1ee9c8bbb1 100644 --- a/configs/M52277EVB_stmicro_defconfig +++ b/configs/M52277EVB_stmicro_defconfig @@ -1,3 +1,7 @@ CONFIG_M68K=y CONFIG_TARGET_M52277EVB=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_TEXT_BASE=0x43E00000" +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index 86befea7bc..5f381e230b 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -1,4 +1,6 @@ CONFIG_M68K=y CONFIG_TARGET_M5235EVB=y CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT,SYS_TEXT_BASE=0xFFC00000" -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index db574fb09b..3292cff57a 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -1,4 +1,6 @@ CONFIG_M68K=y CONFIG_TARGET_M5235EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFFE00000" -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig index fb292744e0..1467b1674a 100644 --- a/configs/M5249EVB_defconfig +++ b/configs/M5249EVB_defconfig @@ -1,2 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5249EVB=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig index 4e465e0ddb..89e7e75b09 100644 --- a/configs/M5253DEMO_defconfig +++ b/configs/M5253DEMO_defconfig @@ -1,3 +1,3 @@ CONFIG_M68K=y CONFIG_TARGET_M5253DEMO=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5253EVBE_defconfig b/configs/M5253EVBE_defconfig index 5c562fe64e..e337f32ebf 100644 --- a/configs/M5253EVBE_defconfig +++ b/configs/M5253EVBE_defconfig @@ -1,2 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5253EVBE=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index 28daa0ddf2..23d54686bf 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -1,3 +1,5 @@ CONFIG_M68K=y CONFIG_TARGET_M5272C3=y -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index ce0e80aaba..f051bf1295 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -1,3 +1,5 @@ CONFIG_M68K=y CONFIG_TARGET_M5275EVB=y -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index d55c163cc8..6c130e818b 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -1,3 +1,5 @@ CONFIG_M68K=y CONFIG_TARGET_M5282EVB=y -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 5525272d42..1f5bc86519 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -1,3 +1,3 @@ CONFIG_M68K=y CONFIG_TARGET_M53017EVB=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index ea82c759e6..02af3a43aa 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5329EVB=y CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index 267144ac43..f757a35236 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5329EVB=y CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index dfadcf28ef..304ca48b83 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5373EVB=y CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig index 4c8876f154..9a93b3b16d 100644 --- a/configs/M54418TWR_defconfig +++ b/configs/M54418TWR_defconfig @@ -1,4 +1,9 @@ CONFIG_M68K=y CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig index 07144d6fed..c194ea742e 100644 --- a/configs/M54418TWR_nand_mii_defconfig +++ b/configs/M54418TWR_nand_mii_defconfig @@ -1,4 +1,9 @@ CONFIG_M68K=y CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=25000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig index 70b6958bed..4ee35ff7c0 100644 --- a/configs/M54418TWR_nand_rmii_defconfig +++ b/configs/M54418TWR_nand_rmii_defconfig @@ -1,4 +1,9 @@ CONFIG_M68K=y CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig index 4482c4113c..4c4b70adec 100644 --- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig +++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig @@ -1,4 +1,9 @@ CONFIG_M68K=y CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,LOW_MCFCLK,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig index 6fa566e575..3be102c45e 100644 --- a/configs/M54418TWR_serial_mii_defconfig +++ b/configs/M54418TWR_serial_mii_defconfig @@ -1,4 +1,9 @@ CONFIG_M68K=y CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=25000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig index 4c8876f154..9a93b3b16d 100644 --- a/configs/M54418TWR_serial_rmii_defconfig +++ b/configs/M54418TWR_serial_rmii_defconfig @@ -1,4 +1,9 @@ CONFIG_M68K=y CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig index b7f4803f0b..b35bb81ce2 100644 --- a/configs/M54451EVB_defconfig +++ b/configs/M54451EVB_defconfig @@ -1,4 +1,7 @@ CONFIG_M68K=y CONFIG_TARGET_M54451EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=24000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig index 01e420eaf0..9b694153e9 100644 --- a/configs/M54451EVB_stmicro_defconfig +++ b/configs/M54451EVB_stmicro_defconfig @@ -1,4 +1,7 @@ CONFIG_M68K=y CONFIG_TARGET_M54451EVB=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_TEXT_BASE=0x47e00000,SYS_INPUT_CLKSRC=24000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig index 95a00b88e5..e82d0bdf99 100644 --- a/configs/M54455EVB_a66_defconfig +++ b/configs/M54455EVB_a66_defconfig @@ -1,4 +1,7 @@ CONFIG_M68K=y CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_TEXT_BASE=0x04000000,SYS_INPUT_CLKSRC=66666666" -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig index 99df654894..cb56586471 100644 --- a/configs/M54455EVB_defconfig +++ b/configs/M54455EVB_defconfig @@ -1,4 +1,7 @@ CONFIG_M68K=y CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_TEXT_BASE=0x04000000,SYS_INPUT_CLKSRC=33333333" -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig index b633a55223..bc7d7079f0 100644 --- a/configs/M54455EVB_i66_defconfig +++ b/configs/M54455EVB_i66_defconfig @@ -1,4 +1,7 @@ CONFIG_M68K=y CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=66666666" -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig index 6cf0006196..cb5b4bd75a 100644 --- a/configs/M54455EVB_intel_defconfig +++ b/configs/M54455EVB_intel_defconfig @@ -1,4 +1,7 @@ CONFIG_M68K=y CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=33333333" -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig index c68c386a5a..a79f9491ef 100644 --- a/configs/M54455EVB_stm33_defconfig +++ b/configs/M54455EVB_stm33_defconfig @@ -1,4 +1,7 @@ CONFIG_M68K=y CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_TEXT_BASE=0x4FE00000,SYS_INPUT_CLKSRC=33333333" -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/M5475AFE_defconfig b/configs/M5475AFE_defconfig index 48d5cf9b80..343f52f3a6 100644 --- a/configs/M5475AFE_defconfig +++ b/configs/M5475AFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5475BFE_defconfig b/configs/M5475BFE_defconfig index 4ffe19fc6c..c9667da172 100644 --- a/configs/M5475BFE_defconfig +++ b/configs/M5475BFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5475CFE_defconfig b/configs/M5475CFE_defconfig index 31d2e33b55..c1a9558c42 100644 --- a/configs/M5475CFE_defconfig +++ b/configs/M5475CFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5475DFE_defconfig b/configs/M5475DFE_defconfig index dd4b23bb89..d879894e0b 100644 --- a/configs/M5475DFE_defconfig +++ b/configs/M5475DFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5475EFE_defconfig b/configs/M5475EFE_defconfig index 1c6d0a6f7c..9b677ee88d 100644 --- a/configs/M5475EFE_defconfig +++ b/configs/M5475EFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5475FFE_defconfig b/configs/M5475FFE_defconfig index 6b4f0d6e8e..4989b00ac6 100644 --- a/configs/M5475FFE_defconfig +++ b/configs/M5475FFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5475GFE_defconfig b/configs/M5475GFE_defconfig index b65ad588b6..31df40e639 100644 --- a/configs/M5475GFE_defconfig +++ b/configs/M5475GFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=4,SYS_DRAMSZ=64" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5485AFE_defconfig b/configs/M5485AFE_defconfig index 40c2736dbb..5381b74463 100644 --- a/configs/M5485AFE_defconfig +++ b/configs/M5485AFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5485BFE_defconfig b/configs/M5485BFE_defconfig index b3fed5a0a9..36dcccf1ac 100644 --- a/configs/M5485BFE_defconfig +++ b/configs/M5485BFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5485CFE_defconfig b/configs/M5485CFE_defconfig index 6685232562..e5cc1e13ff 100644 --- a/configs/M5485CFE_defconfig +++ b/configs/M5485CFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5485DFE_defconfig b/configs/M5485DFE_defconfig index a26bc2b606..fdf667a7e8 100644 --- a/configs/M5485DFE_defconfig +++ b/configs/M5485DFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5485EFE_defconfig b/configs/M5485EFE_defconfig index f9ee78f82a..a5933f2516 100644 --- a/configs/M5485EFE_defconfig +++ b/configs/M5485EFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5485FFE_defconfig b/configs/M5485FFE_defconfig index cbdc547598..116c5cca8c 100644 --- a/configs/M5485FFE_defconfig +++ b/configs/M5485FFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5485GFE_defconfig b/configs/M5485GFE_defconfig index fc8837a522..fd5fc1a85b 100644 --- a/configs/M5485GFE_defconfig +++ b/configs/M5485GFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=4,SYS_DRAMSZ=64" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5485HFE_defconfig b/configs/M5485HFE_defconfig index 6b0ee231b1..6e2768c08c 100644 --- a/configs/M5485HFE_defconfig +++ b/configs/M5485HFE_defconfig @@ -1,4 +1,4 @@ CONFIG_M68K=y CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MIP405T_defconfig b/configs/MIP405T_defconfig index 769ed7c985..22b82b157c 100644 --- a/configs/MIP405T_defconfig +++ b/configs/MIP405T_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_MIP405=y CONFIG_SYS_EXTRA_OPTIONS="MIP405T" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MIP405_defconfig b/configs/MIP405_defconfig index 792ca2ddcc..f25cf5146b 100644 --- a/configs/MIP405_defconfig +++ b/configs/MIP405_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_MIP405=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig index 4f3730492d..a6db139f8b 100644 --- a/configs/MK808C_defconfig +++ b/configs/MK808C_defconfig @@ -3,7 +3,13 @@ CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-mk808c" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig index 9c8a55b467..cb983243f2 100644 --- a/configs/MPC8308RDB_defconfig +++ b/configs/MPC8308RDB_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC8308RDB=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig index e8ca3cff98..a984c483fa 100644 --- a/configs/MPC8313ERDB_33_defconfig +++ b/configs/MPC8313ERDB_33_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC8313ERDB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8313ERDB_66_defconfig b/configs/MPC8313ERDB_66_defconfig index bc8b9c08d8..5b1ee7ca16 100644 --- a/configs/MPC8313ERDB_66_defconfig +++ b/configs/MPC8313ERDB_66_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC8313ERDB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig index 99de0a98b3..b1052ef1bd 100644 --- a/configs/MPC8313ERDB_NAND_33_defconfig +++ b/configs/MPC8313ERDB_NAND_33_defconfig @@ -3,4 +3,4 @@ CONFIG_MPC83xx=y CONFIG_TARGET_MPC8313ERDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ,NAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig index b4fecbab4e..fe59fe8e4a 100644 --- a/configs/MPC8313ERDB_NAND_66_defconfig +++ b/configs/MPC8313ERDB_NAND_66_defconfig @@ -3,4 +3,4 @@ CONFIG_MPC83xx=y CONFIG_TARGET_MPC8313ERDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ,NAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig index db8963e5f4..e618381e71 100644 --- a/configs/MPC8315ERDB_defconfig +++ b/configs/MPC8315ERDB_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC8315ERDB=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8323ERDB_defconfig b/configs/MPC8323ERDB_defconfig index 8eb6c2b796..762ad5b195 100644 --- a/configs/MPC8323ERDB_defconfig +++ b/configs/MPC8323ERDB_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC8323ERDB=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC832XEMDS_ATM_defconfig b/configs/MPC832XEMDS_ATM_defconfig index 3c544be297..b4b3724733 100644 --- a/configs/MPC832XEMDS_ATM_defconfig +++ b/configs/MPC832XEMDS_ATM_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC832XEMDS=y CONFIG_SYS_EXTRA_OPTIONS="PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC832XEMDS_HOST_33_defconfig b/configs/MPC832XEMDS_HOST_33_defconfig index 0be0f78252..9a2f338d14 100644 --- a/configs/MPC832XEMDS_HOST_33_defconfig +++ b/configs/MPC832XEMDS_HOST_33_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC832XEMDS=y CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_33M,PQ_MDS_PIB=1" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC832XEMDS_HOST_66_defconfig b/configs/MPC832XEMDS_HOST_66_defconfig index 1c8f3abc08..66e42694af 100644 --- a/configs/MPC832XEMDS_HOST_66_defconfig +++ b/configs/MPC832XEMDS_HOST_66_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC832XEMDS=y CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_66M,PQ_MDS_PIB=1" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC832XEMDS_SLAVE_defconfig b/configs/MPC832XEMDS_SLAVE_defconfig index 2c0bfab339..467f220a52 100644 --- a/configs/MPC832XEMDS_SLAVE_defconfig +++ b/configs/MPC832XEMDS_SLAVE_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC832XEMDS=y CONFIG_SYS_EXTRA_OPTIONS="PCI,PCISLAVE" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC832XEMDS_defconfig b/configs/MPC832XEMDS_defconfig index 19b596b5c1..3e24ab1363 100644 --- a/configs/MPC832XEMDS_defconfig +++ b/configs/MPC832XEMDS_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC832XEMDS=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig index 00358014ca..6a907cf6d2 100644 --- a/configs/MPC8349EMDS_defconfig +++ b/configs/MPC8349EMDS_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC8349EMDS=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig index 8ebcee28a6..7a43fa084c 100644 --- a/configs/MPC8349ITXGP_defconfig +++ b/configs/MPC8349ITXGP_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC8349ITX=y CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig index 4bbf4fad8a..f74d42c69e 100644 --- a/configs/MPC8349ITX_LOWBOOT_defconfig +++ b/configs/MPC8349ITX_LOWBOOT_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC8349ITX=y CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX,SYS_TEXT_BASE=0xFE000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig index 3f9c0c51c5..84c117cd9e 100644 --- a/configs/MPC8349ITX_defconfig +++ b/configs/MPC8349ITX_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC8349ITX=y CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig index c0beec2b6c..2e472a7137 100644 --- a/configs/MPC837XEMDS_HOST_defconfig +++ b/configs/MPC837XEMDS_HOST_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC837XEMDS=y CONFIG_SYS_EXTRA_OPTIONS="PCI" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig index f622d35912..21b450682a 100644 --- a/configs/MPC837XEMDS_defconfig +++ b/configs/MPC837XEMDS_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC837XEMDS=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index 49ebd3a824..126d0d2557 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC837XERDB=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig index 328791b8fe..4b626a6def 100644 --- a/configs/MPC8536DS_36BIT_defconfig +++ b/configs/MPC8536DS_36BIT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8536DS=y CONFIG_SYS_EXTRA_OPTIONS="36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig index 715ba0c0d0..3b02eb810d 100644 --- a/configs/MPC8536DS_SDCARD_defconfig +++ b/configs/MPC8536DS_SDCARD_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8536DS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig index 3bd282f008..0453cd274a 100644 --- a/configs/MPC8536DS_SPIFLASH_defconfig +++ b/configs/MPC8536DS_SPIFLASH_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8536DS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig index 2aa6823faa..ceaa9e84f8 100644 --- a/configs/MPC8536DS_defconfig +++ b/configs/MPC8536DS_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8536DS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/MPC8540ADS_defconfig b/configs/MPC8540ADS_defconfig index d6584044be..41af34927d 100644 --- a/configs/MPC8540ADS_defconfig +++ b/configs/MPC8540ADS_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8540ADS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8541CDS_defconfig b/configs/MPC8541CDS_defconfig index 34c0d06f7f..bc9c24630a 100644 --- a/configs/MPC8541CDS_defconfig +++ b/configs/MPC8541CDS_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8541CDS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8541CDS_legacy_defconfig b/configs/MPC8541CDS_legacy_defconfig index 9860deaf48..55478ab184 100644 --- a/configs/MPC8541CDS_legacy_defconfig +++ b/configs/MPC8541CDS_legacy_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8541CDS=y CONFIG_SYS_EXTRA_OPTIONS="LEGACY" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8544DS_defconfig b/configs/MPC8544DS_defconfig index 5461b0dbff..faeaa948f4 100644 --- a/configs/MPC8544DS_defconfig +++ b/configs/MPC8544DS_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8544DS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index 2a4f825288..dfe1fca5be 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8548CDS=y CONFIG_SYS_EXTRA_OPTIONS="36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 9f214d99da..ba52e9441a 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8548CDS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index bdc7aa522a..69c44af239 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8548CDS=y CONFIG_SYS_EXTRA_OPTIONS="LEGACY" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8555CDS_defconfig b/configs/MPC8555CDS_defconfig index ba2747a722..3bdbb0c2d1 100644 --- a/configs/MPC8555CDS_defconfig +++ b/configs/MPC8555CDS_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8555CDS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8555CDS_legacy_defconfig b/configs/MPC8555CDS_legacy_defconfig index fdd3c1012c..8e53ee0d2c 100644 --- a/configs/MPC8555CDS_legacy_defconfig +++ b/configs/MPC8555CDS_legacy_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8555CDS=y CONFIG_SYS_EXTRA_OPTIONS="LEGACY" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8560ADS_defconfig b/configs/MPC8560ADS_defconfig index 4ec548fcbf..aa84d28a66 100644 --- a/configs/MPC8560ADS_defconfig +++ b/configs/MPC8560ADS_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8560ADS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8568MDS_defconfig b/configs/MPC8568MDS_defconfig index 27cc6c452a..ac0ec8c501 100644 --- a/configs/MPC8568MDS_defconfig +++ b/configs/MPC8568MDS_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8568MDS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8569MDS_ATM_defconfig b/configs/MPC8569MDS_ATM_defconfig index 18b567e746..326983d777 100644 --- a/configs/MPC8569MDS_ATM_defconfig +++ b/configs/MPC8569MDS_ATM_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8569MDS=y CONFIG_SYS_EXTRA_OPTIONS="ATM" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8569MDS_defconfig b/configs/MPC8569MDS_defconfig index 5dbfe765d5..81fb82a542 100644 --- a/configs/MPC8569MDS_defconfig +++ b/configs/MPC8569MDS_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8569MDS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8572DS_36BIT_defconfig b/configs/MPC8572DS_36BIT_defconfig index d0b6ce8338..0ce85e471b 100644 --- a/configs/MPC8572DS_36BIT_defconfig +++ b/configs/MPC8572DS_36BIT_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8572DS=y CONFIG_SYS_EXTRA_OPTIONS="36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8572DS_defconfig b/configs/MPC8572DS_defconfig index 6f2178a5b6..dde9eb2846 100644 --- a/configs/MPC8572DS_defconfig +++ b/configs/MPC8572DS_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8572DS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/MPC8610HPCD_defconfig b/configs/MPC8610HPCD_defconfig index ba94f54b70..f0e1370f41 100644 --- a/configs/MPC8610HPCD_defconfig +++ b/configs/MPC8610HPCD_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC86xx=y CONFIG_TARGET_MPC8610HPCD=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8641HPCN_36BIT_defconfig b/configs/MPC8641HPCN_36BIT_defconfig index 8279461c7f..0aee7eaf01 100644 --- a/configs/MPC8641HPCN_36BIT_defconfig +++ b/configs/MPC8641HPCN_36BIT_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC86xx=y CONFIG_TARGET_MPC8641HPCN=y CONFIG_SYS_EXTRA_OPTIONS="PHYS_64BIT" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8641HPCN_defconfig b/configs/MPC8641HPCN_defconfig index b4a4eb585b..2bee038a63 100644 --- a/configs/MPC8641HPCN_defconfig +++ b/configs/MPC8641HPCN_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC86xx=y CONFIG_TARGET_MPC8641HPCN=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig index 5c43450d09..6e0d24658c 100644 --- a/configs/MSI_Primo73_defconfig +++ b/configs/MSI_Primo73_defconfig @@ -9,7 +9,13 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_USB_KEYBOARD is not set CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-primo73" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/MSI_Primo81_defconfig b/configs/MSI_Primo81_defconfig index ab04519e74..9787e34ba2 100644 --- a/configs/MSI_Primo81_defconfig +++ b/configs/MSI_Primo81_defconfig @@ -3,15 +3,23 @@ CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=360 CONFIG_DRAM_ZQ=122 +CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" +CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" +CONFIG_AXP_GPIO=y CONFIG_VIDEO_LCD_MODE="x:768,y:1024,depth:18,pclk_khz:66000,le:56,ri:60,up:30,lo:36,hs:64,vs:50,sync:3,vmode:0" CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828=y +CONFIG_USB_MUSB_SUNXI=y # CONFIG_USB_KEYBOARD is not set CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-primo81" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y CONFIG_AXP221_DLDO1_VOLT=3300 CONFIG_VIDEO_LCD_SSD2828_TX_CLK=27 CONFIG_VIDEO_LCD_SSD2828_RESET="PA26" @@ -19,3 +27,4 @@ CONFIG_VIDEO_LCD_SPI_CS="PH9" CONFIG_VIDEO_LCD_SPI_SCLK="PH10" CONFIG_VIDEO_LCD_SPI_MOSI="PH11" CONFIG_VIDEO_LCD_SPI_MISO="PH12" +CONFIG_USB=y diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig index dad41bb0ed..ed41af6b81 100644 --- a/configs/Marsboard_A10_defconfig +++ b/configs/Marsboard_A10_defconfig @@ -2,7 +2,13 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN4I=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-marsboard" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,AHCI,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig new file mode 100644 index 0000000000..6e0a4935fe --- /dev/null +++ b/configs/Mele_A1000G_quad_defconfig @@ -0,0 +1,22 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN6I=y +CONFIG_DRAM_ZQ=120 +CONFIG_USB1_VBUS_PIN="PC27" +CONFIG_USB2_VBUS_PIN="" +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI,SUNXI_GMAC" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_AXP221_DCDC1_VOLT=3300 +CONFIG_AXP221_DLDO1_VOLT=3300 +CONFIG_AXP221_DLDO4_VOLT=3300 +CONFIG_AXP221_ALDO1_VOLT=3300 +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig index 65cdcd0e7c..983ffdc725 100644 --- a/configs/Mele_A1000_defconfig +++ b/configs/Mele_A1000_defconfig @@ -3,7 +3,13 @@ CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN4I=y CONFIG_VIDEO_VGA=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,MACPWR=SUNXI_GPH(15),AHCI,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig index ab545f9541..7f083a7504 100644 --- a/configs/Mele_I7_defconfig +++ b/configs/Mele_I7_defconfig @@ -5,12 +5,18 @@ CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI,SUNXI_GMAC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y CONFIG_AXP221_DCDC1_VOLT=3300 CONFIG_AXP221_DLDO1_VOLT=3300 CONFIG_AXP221_DLDO4_VOLT=3300 CONFIG_AXP221_ALDO1_VOLT=3300 +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig index 42bff2fdaa..73d87c3787 100644 --- a/configs/Mele_M3_defconfig +++ b/configs/Mele_M3_defconfig @@ -6,8 +6,14 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_VIDEO_VGA=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig index 72d55e2d6e..79c5901801 100644 --- a/configs/Mele_M5_defconfig +++ b/configs/Mele_M5_defconfig @@ -5,8 +5,14 @@ CONFIG_DRAM_CLK=432 CONFIG_DRAM_ZQ=122 CONFIG_MMC0_CD_PIN="PH1" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,USB_EHCI,STATUSLED=234" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig index babaa5f21b..e017ad78d5 100644 --- a/configs/Mele_M9_defconfig +++ b/configs/Mele_M9_defconfig @@ -5,12 +5,18 @@ CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI,SUNXI_GMAC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y CONFIG_AXP221_DCDC1_VOLT=3300 CONFIG_AXP221_DLDO1_VOLT=3300 CONFIG_AXP221_DLDO4_VOLT=3300 CONFIG_AXP221_ALDO1_VOLT=3300 +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Merrii_A80_Optimus_defconfig b/configs/Merrii_A80_Optimus_defconfig index 6bd5273939..b02b1a34c8 100644 --- a/configs/Merrii_A80_Optimus_defconfig +++ b/configs/Merrii_A80_Optimus_defconfig @@ -1,11 +1,18 @@ -CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus" -CONFIG_VIDEO=n -CONFIG_USB_KEYBOARD=n -CONFIG_MMC0_CD_PIN="PH18" CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN9I=y -# these are unused atm but we must set them to something CONFIG_DRAM_CLK=360 CONFIG_DRAM_ZQ=123 CONFIG_SYS_CLK_FREQ=1008000000 +CONFIG_MMC0_CD_PIN="PH18" +# CONFIG_VIDEO is not set +# CONFIG_USB_KEYBOARD is not set +CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/MigoR_defconfig b/configs/MigoR_defconfig index d4953cefc3..3255ed2ab3 100644 --- a/configs/MigoR_defconfig +++ b/configs/MigoR_defconfig @@ -1,3 +1,18 @@ CONFIG_SH=y CONFIG_TARGET_MIGOR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig index b107827c05..da57711134 100644 --- a/configs/Mini-X_defconfig +++ b/configs/Mini-X_defconfig @@ -2,7 +2,13 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN4I=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mini-xplus" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/MiniFAP_defconfig b/configs/MiniFAP_defconfig index dc6c942ee9..1e5fd75e76 100644 --- a/configs/MiniFAP_defconfig +++ b/configs/MiniFAP_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_TQM5200=y CONFIG_SYS_EXTRA_OPTIONS="MINIFAP" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/O2D300_defconfig b/configs/O2D300_defconfig index dcf325530a..db88295bea 100644 --- a/configs/O2D300_defconfig +++ b/configs/O2D300_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_O2D300=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/O2DNT2_RAMBOOT_defconfig b/configs/O2DNT2_RAMBOOT_defconfig index f9d340ab72..ca54ca5c68 100644 --- a/configs/O2DNT2_RAMBOOT_defconfig +++ b/configs/O2DNT2_RAMBOOT_defconfig @@ -2,4 +2,7 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_O2DNT2=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00100000" -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press password to stop\n" +CONFIG_AUTOBOOT_STOP_STR="++++++++++" +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/O2DNT2_defconfig b/configs/O2DNT2_defconfig index ce952e8b0f..a4ead7512a 100644 --- a/configs/O2DNT2_defconfig +++ b/configs/O2DNT2_defconfig @@ -1,4 +1,7 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_O2DNT2=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press password to stop\n" +CONFIG_AUTOBOOT_STOP_STR="++++++++++" +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/O2D_defconfig b/configs/O2D_defconfig index 98efde8ea9..3248fc9222 100644 --- a/configs/O2D_defconfig +++ b/configs/O2D_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_O2D=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/O2I_defconfig b/configs/O2I_defconfig index 80bce5d80e..5d51be6ab1 100644 --- a/configs/O2I_defconfig +++ b/configs/O2I_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_O2I=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/O2MNT_O2M110_defconfig b/configs/O2MNT_O2M110_defconfig index e452f90f8e..22e7e98034 100644 --- a/configs/O2MNT_O2M110_defconfig +++ b/configs/O2MNT_O2M110_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_O2MNT=y CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M110\"" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/O2MNT_O2M112_defconfig b/configs/O2MNT_O2M112_defconfig index a1ee009d38..5342719c30 100644 --- a/configs/O2MNT_O2M112_defconfig +++ b/configs/O2MNT_O2M112_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_O2MNT=y CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M112\"" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/O2MNT_O2M113_defconfig b/configs/O2MNT_O2M113_defconfig index 5e8db1ccc8..bcbb598f57 100644 --- a/configs/O2MNT_O2M113_defconfig +++ b/configs/O2MNT_O2M113_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_O2MNT=y CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M113\"" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/O2MNT_defconfig b/configs/O2MNT_defconfig index d0eb289876..a29f70acc0 100644 --- a/configs/O2MNT_defconfig +++ b/configs/O2MNT_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_O2MNT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/O3DNT_defconfig b/configs/O3DNT_defconfig index d50879a285..841129413c 100644 --- a/configs/O3DNT_defconfig +++ b/configs/O3DNT_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_O3DNT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig index b700a9f658..ba89a25a2a 100644 --- a/configs/Orangepi_defconfig +++ b/configs/Orangepi_defconfig @@ -7,8 +7,14 @@ CONFIG_USB2_VBUS_PIN="PH22" CONFIG_VIDEO_VGA=y CONFIG_GMAC_TX_DELAY=3 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig index 8a07baee65..8f03815d91 100644 --- a/configs/Orangepi_mini_defconfig +++ b/configs/Orangepi_mini_defconfig @@ -9,8 +9,14 @@ CONFIG_USB1_VBUS_PIN="PH26" CONFIG_USB2_VBUS_PIN="PH22" CONFIG_GMAC_TX_DELAY=3 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig index b5e4a91aad..d27fd5ea23 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,NAND_SECBOOT,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index fe95616d36..e69f1c493b 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig index f96db97c6b..42f7625c12 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 2e7d281e49..cb86d2a3f6 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index ec52886b65..be09aab644 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig index 1b9347929d..20136e38b4 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SPIFLASH,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 7f8b5dd558..8f2bbc91af 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig index 5888af2cb2..f7609523b7 100644 --- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND_SECBOOT,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index e6bd968854..d00b7d238d 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig index 8a33351c61..0f9092b7a9 100644 --- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index f7fb973d18..643cc88d38 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 4f3891f322..88044b13e0 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig index bede3bda89..7ded62bad5 100644 --- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 97e7382e03..7da4565506 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig index 6a781c2b12..286f8dafd1 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,NAND_SECBOOT,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index ea3456b140..385265df88 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig index 09dafed06f..93e7f894bc 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index f7243acab1..917613989d 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index a9ea8b275c..fd1d4df3c2 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig index 067f9ba8b3..a0d7bacaf1 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SPIFLASH,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 8fed2024a6..9dc5af2e64 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig index 97c46731a4..3aa2ca00ce 100644 --- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND_SECBOOT,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 3e49a24ddc..db41c51f56 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig index fe5ee488fb..80836a33af 100644 --- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 77a1a639b6..4ec3893646 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 27777bcc38..e93861457a 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig index 568934ab71..11f75b7c41 100644 --- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 835f3ca88c..b3a30e771f 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig index 64f77a7c54..59aa9be019 100644 --- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig @@ -3,5 +3,3 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD,36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/P1020MBG-PC_36BIT_defconfig b/configs/P1020MBG-PC_36BIT_defconfig index c55bce63c7..b8d9c53a56 100644 --- a/configs/P1020MBG-PC_36BIT_defconfig +++ b/configs/P1020MBG-PC_36BIT_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig index bcd3513f36..0e64e82108 100644 --- a/configs/P1020MBG-PC_SDCARD_defconfig +++ b/configs/P1020MBG-PC_SDCARD_defconfig @@ -3,5 +3,3 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/P1020MBG-PC_defconfig b/configs/P1020MBG-PC_defconfig index 93b125f281..905b94ca9d 100644 --- a/configs/P1020MBG-PC_defconfig +++ b/configs/P1020MBG-PC_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020MBG" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 346a7020dc..84934a86a5 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 168c4c8fd7..de86b76b9d 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 8b19d3217c..3ed759f696 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 8aa547f611..ca52331bb2 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 61498402ac..8391b4b878 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 00fa45ed5f..7411c674ee 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 1f9c90fe31..dc80723d26 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 9c273d6814..089bfaed5f 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 3cfa7c7940..8f8660cf0a 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 4d7d8a68eb..959d6d3b6c 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index d0625ee287..df4bc85350 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 6847d239ac..2ebb668c70 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig index 3525a2ee58..f94345cdf6 100644 --- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig @@ -3,5 +3,3 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,36BIT,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/P1020UTM-PC_36BIT_defconfig b/configs/P1020UTM-PC_36BIT_defconfig index 1e014f2a2a..ac4bbd3f72 100644 --- a/configs/P1020UTM-PC_36BIT_defconfig +++ b/configs/P1020UTM-PC_36BIT_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig index 11e58033c8..c4cd42e753 100644 --- a/configs/P1020UTM-PC_SDCARD_defconfig +++ b/configs/P1020UTM-PC_SDCARD_defconfig @@ -3,5 +3,3 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/P1020UTM-PC_defconfig b/configs/P1020UTM-PC_defconfig index 8b4a339a88..aae966bbaf 100644 --- a/configs/P1020UTM-PC_defconfig +++ b/configs/P1020UTM-PC_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020UTM" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig index c04b980d5d..73f2f5153d 100644 --- a/configs/P1021RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig index d0d4d3e702..5befdd998c 100644 --- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig index 35ea741233..9838f09ae6 100644 --- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig index 69faff974a..5fbc7ce754 100644 --- a/configs/P1021RDB-PC_36BIT_defconfig +++ b/configs/P1021RDB-PC_36BIT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig index f48692630d..e238e05e49 100644 --- a/configs/P1021RDB-PC_NAND_defconfig +++ b/configs/P1021RDB-PC_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig index 4ab2f6712f..a7a45ecc51 100644 --- a/configs/P1021RDB-PC_SDCARD_defconfig +++ b/configs/P1021RDB-PC_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig index e3790e0a93..59ef5ea43f 100644 --- a/configs/P1021RDB-PC_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig index 6e9e8290ec..543c28d2b4 100644 --- a/configs/P1021RDB-PC_defconfig +++ b/configs/P1021RDB-PC_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig index 02c7a0a709..c0edafceb9 100644 --- a/configs/P1022DS_36BIT_NAND_defconfig +++ b/configs/P1022DS_36BIT_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1022DS=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="36BIT,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig index f0a065eea7..d85530e5a0 100644 --- a/configs/P1022DS_36BIT_SDCARD_defconfig +++ b/configs/P1022DS_36BIT_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig index 9c0862f099..1be12cc65c 100644 --- a/configs/P1022DS_36BIT_SPIFLASH_defconfig +++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="36BIT,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig index 037659ffdc..08d7a6ef70 100644 --- a/configs/P1022DS_36BIT_defconfig +++ b/configs/P1022DS_36BIT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_SYS_EXTRA_OPTIONS="36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig index 0008c52eb2..dbfb5628cf 100644 --- a/configs/P1022DS_NAND_defconfig +++ b/configs/P1022DS_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1022DS=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig index 8efdd909e4..9cbcbd51fa 100644 --- a/configs/P1022DS_SDCARD_defconfig +++ b/configs/P1022DS_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig index db2c3abc64..98a859c3fb 100644 --- a/configs/P1022DS_SPIFLASH_defconfig +++ b/configs/P1022DS_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig index 6cf36de327..69a25f7d2e 100644 --- a/configs/P1022DS_defconfig +++ b/configs/P1022DS_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1023RDB_defconfig b/configs/P1023RDB_defconfig index fa8baa1063..fc15e4bc4c 100644 --- a/configs/P1023RDB_defconfig +++ b/configs/P1023RDB_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1023RDB=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig index 78066a6742..207d3dee10 100644 --- a/configs/P1024RDB_36BIT_defconfig +++ b/configs/P1024RDB_36BIT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig index 498f091c74..f69257c1b8 100644 --- a/configs/P1024RDB_NAND_defconfig +++ b/configs/P1024RDB_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig index 3960c4075f..d847a0a030 100644 --- a/configs/P1024RDB_SDCARD_defconfig +++ b/configs/P1024RDB_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig index 7ee6054451..c22bfe1439 100644 --- a/configs/P1024RDB_SPIFLASH_defconfig +++ b/configs/P1024RDB_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig index 883a56207b..21a84e3bec 100644 --- a/configs/P1024RDB_defconfig +++ b/configs/P1024RDB_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig index 56d46fa5d2..302d6e8b8f 100644 --- a/configs/P1025RDB_36BIT_defconfig +++ b/configs/P1025RDB_36BIT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig index 7d5d4b9882..616225ef78 100644 --- a/configs/P1025RDB_NAND_defconfig +++ b/configs/P1025RDB_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig index 6efa5a36d7..1ba3880984 100644 --- a/configs/P1025RDB_SDCARD_defconfig +++ b/configs/P1025RDB_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig index efcaed8c92..df648aa630 100644 --- a/configs/P1025RDB_SPIFLASH_defconfig +++ b/configs/P1025RDB_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig index 93c48db820..a0d1a2c2b2 100644 --- a/configs/P1025RDB_defconfig +++ b/configs/P1025RDB_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index c283105e93..2c4bea374e 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 96d8a86959..9d110db725 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 501547fd49..c41bbf91c1 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 7ac1ea1c12..8ae1928651 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 8dfdc131af..4492e09b9e 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -4,5 +4,4 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index c21b2beefb..95f3d9123a 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 66c5aa85d2..d6f0548df0 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 53696e10fe..f871019c34 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 3405f82811..028235a8ff 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index bd4502ab6b..ac1d678d41 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig index ed832efaad..d0facae834 100644 --- a/configs/P2041RDB_SECURE_BOOT_defconfig +++ b/configs/P2041RDB_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 5e97cb57cb..30953a7dd9 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig index 9ac10a0692..74abe7dc8d 100644 --- a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig +++ b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 3b358c94f8..b4b1489165 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 5f53ea1931..a076390dd6 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 595306ee6f..c16dc96e11 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig index a1f5c14ef9..7c76951c66 100644 --- a/configs/P3041DS_SECURE_BOOT_defconfig +++ b/configs/P3041DS_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index d4b0fd9596..26e45f6927 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig index eadcb0481f..71db82d0ca 100644 --- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index ffed6a7c00..087953728d 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index f683c38669..1e8bbf7311 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig index 1d4a1286ec..33a9fd6860 100644 --- a/configs/P4080DS_SECURE_BOOT_defconfig +++ b/configs/P4080DS_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 5b5ca776e8..e55be853d1 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig index 84434121bc..b3f6b69806 100644 --- a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 34b6979945..5e5cea969f 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P5020DS_NAND_defconfig b/configs/P5020DS_NAND_defconfig index 55e2e109bc..a071029734 100644 --- a/configs/P5020DS_NAND_defconfig +++ b/configs/P5020DS_NAND_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P5020DS_SDCARD_defconfig b/configs/P5020DS_SDCARD_defconfig index 087815b619..5431491731 100644 --- a/configs/P5020DS_SDCARD_defconfig +++ b/configs/P5020DS_SDCARD_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig index adb65ae2b2..26a418a5cc 100644 --- a/configs/P5020DS_SECURE_BOOT_defconfig +++ b/configs/P5020DS_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P5020DS_SPIFLASH_defconfig b/configs/P5020DS_SPIFLASH_defconfig index 6e86ea0cf9..65f0708ae6 100644 --- a/configs/P5020DS_SPIFLASH_defconfig +++ b/configs/P5020DS_SPIFLASH_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig index 8772c7b565..66b7d6f726 100644 --- a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/P5020DS_defconfig b/configs/P5020DS_defconfig index f4b8b3c83f..a6d88398bf 100644 --- a/configs/P5020DS_defconfig +++ b/configs/P5020DS_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 9f7b45b142..0d6178268a 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index dd78085f98..498fe51291 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig index 2224bb29c6..54d9b8061d 100644 --- a/configs/P5040DS_SECURE_BOOT_defconfig +++ b/configs/P5040DS_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index e3b78968e1..9a37c0e054 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index d2f9c06662..6df742ec60 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/PATI_defconfig b/configs/PATI_defconfig index 14ca871b44..da8525e5ab 100644 --- a/configs/PATI_defconfig +++ b/configs/PATI_defconfig @@ -1,3 +1,15 @@ CONFIG_PPC=y CONFIG_5xx=y CONFIG_TARGET_PATI=y +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/PIP405_defconfig b/configs/PIP405_defconfig index 1aec3cb019..ced7d1a257 100644 --- a/configs/PIP405_defconfig +++ b/configs/PIP405_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_PIP405=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/PLU405_defconfig b/configs/PLU405_defconfig index 459b6908d4..a691e24efd 100644 --- a/configs/PLU405_defconfig +++ b/configs/PLU405_defconfig @@ -1,4 +1,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_PLU405=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/PMC405DE_defconfig b/configs/PMC405DE_defconfig index e7e157f8ef..37b2d23819 100644 --- a/configs/PMC405DE_defconfig +++ b/configs/PMC405DE_defconfig @@ -1,4 +1,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_PMC405DE=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/PMC440_defconfig b/configs/PMC440_defconfig index 779087d817..96ff54c61a 100644 --- a/configs/PMC440_defconfig +++ b/configs/PMC440_defconfig @@ -1,4 +1,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_PMC440=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig index a1a32d534a..3ee42d63d6 100644 --- a/configs/T1023RDB_NAND_defconfig +++ b/configs/T1023RDB_NAND_defconfig @@ -3,5 +3,6 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig index 93b39d6fa9..ed67945abe 100644 --- a/configs/T1023RDB_SDCARD_defconfig +++ b/configs/T1023RDB_SDCARD_defconfig @@ -3,5 +3,6 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig index 35ac2276ae..76e3e91791 100644 --- a/configs/T1023RDB_SECURE_BOOT_defconfig +++ b/configs/T1023RDB_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig index 9fc6576b88..e7f4525944 100644 --- a/configs/T1023RDB_SPIFLASH_defconfig +++ b/configs/T1023RDB_SPIFLASH_defconfig @@ -3,5 +3,6 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig index 7075b281bd..8ff03a5cec 100644 --- a/configs/T1023RDB_defconfig +++ b/configs/T1023RDB_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1024QDS_D4_SECURE_BOOT_defconfig b/configs/T1024QDS_D4_SECURE_BOOT_defconfig index 329dd15be9..06a9619a59 100644 --- a/configs/T1024QDS_D4_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_D4_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig index 57a452ad4c..c49facfb50 100644 --- a/configs/T1024QDS_NAND_defconfig +++ b/configs/T1024QDS_NAND_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig index 6fd626bcd5..3a3beb1f31 100644 --- a/configs/T1024QDS_SDCARD_defconfig +++ b/configs/T1024QDS_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig index 2dc1e64b1d..b0890a43a4 100644 --- a/configs/T1024QDS_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig index 89ce4eb97d..df3ca94485 100644 --- a/configs/T1024QDS_SPIFLASH_defconfig +++ b/configs/T1024QDS_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig index 61f13d3d39..93588b765b 100644 --- a/configs/T1024QDS_defconfig +++ b/configs/T1024QDS_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 13f758634d..6f4f026c89 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 8beb71460e..53c5c8c821 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig index 79f68c60f2..65e9a5a6f2 100644 --- a/configs/T1024RDB_SECURE_BOOT_defconfig +++ b/configs/T1024RDB_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index e323f57743..60aee0d5d8 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 7e69b92457..2da2ea72f3 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1040QDS_D4_defconfig b/configs/T1040QDS_D4_defconfig index bfe077ab50..31b3b10c27 100644 --- a/configs/T1040QDS_D4_defconfig +++ b/configs/T1040QDS_D4_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SYS_FSL_DDR4" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig index 043db10b87..abb876f5fd 100644 --- a/configs/T1040QDS_SECURE_BOOT_defconfig +++ b/configs/T1040QDS_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig index fbfa5fba7f..3766524d36 100644 --- a/configs/T1040QDS_defconfig +++ b/configs/T1040QDS_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig index 70c0b590b2..d4883b8e94 100644 --- a/configs/T1040RDB_NAND_defconfig +++ b/configs/T1040RDB_NAND_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig index 980189c3ea..46e7c72834 100644 --- a/configs/T1040RDB_SDCARD_defconfig +++ b/configs/T1040RDB_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig index 2dd87ed944..8995e89c6b 100644 --- a/configs/T1040RDB_SECURE_BOOT_defconfig +++ b/configs/T1040RDB_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT,T1040RDB" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig index 2efe4756e3..e0956b398e 100644 --- a/configs/T1040RDB_SPIFLASH_defconfig +++ b/configs/T1040RDB_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig index 9db5699ba4..3ae358deaf 100644 --- a/configs/T1040RDB_defconfig +++ b/configs/T1040RDB_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig index f1cebff7f9..04af1b8bd4 100644 --- a/configs/T1042RDB_PI_NAND_defconfig +++ b/configs/T1042RDB_PI_NAND_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig index 0d274340f7..cf093fd959 100644 --- a/configs/T1042RDB_PI_SDCARD_defconfig +++ b/configs/T1042RDB_PI_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig index f6589a8489..aba0d18c13 100644 --- a/configs/T1042RDB_PI_SPIFLASH_defconfig +++ b/configs/T1042RDB_PI_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig index 2b4094ea5a..7ad65ba4b2 100644 --- a/configs/T1042RDB_PI_defconfig +++ b/configs/T1042RDB_PI_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig index bed4c93755..639fc94035 100644 --- a/configs/T1042RDB_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,SECURE_BOOT,T1042RDB" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig index b2387f26d1..670c87af29 100644 --- a/configs/T1042RDB_defconfig +++ b/configs/T1042RDB_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 5ca32a6afa..e6b1f46244 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 0947d33edb..d48eb87a99 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 2d05aa5a48..5f9a72bcda 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 82df11c5dc..c0251af9eb 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index d46934a1b9..018ee6fd75 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 0b9abc0641..eaa0792aee 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index f6c386cd9d..512d60fec1 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index ffef84db5b..d6fc340440 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig index 0c1eaf97dd..28183f60af 100644 --- a/configs/T2080RDB_SECURE_BOOT_defconfig +++ b/configs/T2080RDB_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 84ca68548d..9733b36d5b 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig index 9e147c7a3f..56e5ce19ba 100644 --- a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 7a6f88c557..2475ce3b37 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig index 2c41e9c565..591b700b17 100644 --- a/configs/T2081QDS_NAND_defconfig +++ b/configs/T2081QDS_NAND_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig index 99b74a9d55..45c7bca297 100644 --- a/configs/T2081QDS_SDCARD_defconfig +++ b/configs/T2081QDS_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig index 6d8f16cd83..2784df6e0d 100644 --- a/configs/T2081QDS_SPIFLASH_defconfig +++ b/configs/T2081QDS_SPIFLASH_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig index 6179808113..55fd6cc676 100644 --- a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig index 55fb344c95..5942524da5 100644 --- a/configs/T2081QDS_defconfig +++ b/configs/T2081QDS_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig index 47702eac04..16cda075d9 100644 --- a/configs/T4160QDS_NAND_defconfig +++ b/configs/T4160QDS_NAND_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig index 647637567b..d23c88764a 100644 --- a/configs/T4160QDS_SDCARD_defconfig +++ b/configs/T4160QDS_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig index c4ea42afbc..0fe99d26a6 100644 --- a/configs/T4160QDS_SECURE_BOOT_defconfig +++ b/configs/T4160QDS_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T4160QDS_defconfig b/configs/T4160QDS_defconfig index a2fe94692a..bab171249e 100644 --- a/configs/T4160QDS_defconfig +++ b/configs/T4160QDS_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T4160RDB_defconfig b/configs/T4160RDB_defconfig index c892a02179..9ca984cbe3 100644 --- a/configs/T4160RDB_defconfig +++ b/configs/T4160RDB_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig index af933e04c2..130a614cb3 100644 --- a/configs/T4240QDS_NAND_defconfig +++ b/configs/T4240QDS_NAND_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig index aa98a43784..8eb5577eef 100644 --- a/configs/T4240QDS_SDCARD_defconfig +++ b/configs/T4240QDS_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig index 60d205e773..d983e9aa20 100644 --- a/configs/T4240QDS_SECURE_BOOT_defconfig +++ b/configs/T4240QDS_SECURE_BOOT_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,SECURE_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig index 67dda4c2ea..edd083a6a2 100644 --- a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/T4240QDS_defconfig b/configs/T4240QDS_defconfig index a36e429cc6..cd9df0fbfa 100644 --- a/configs/T4240QDS_defconfig +++ b/configs/T4240QDS_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 5b5b34d765..09f8f6590a 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -3,5 +3,4 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index e65c62c8b8..e1abd8ae75 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -2,5 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_SPI_FLASH=y diff --git a/configs/TQM5200S_HIGHBOOT_defconfig b/configs/TQM5200S_HIGHBOOT_defconfig index e81759af4a..4c38482bc8 100644 --- a/configs/TQM5200S_HIGHBOOT_defconfig +++ b/configs/TQM5200S_HIGHBOOT_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_TQM5200=y CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B,TQM5200S,SYS_TEXT_BASE=0xFFF00000" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM5200S_defconfig b/configs/TQM5200S_defconfig index 4bae198ebf..a01bd39f80 100644 --- a/configs/TQM5200S_defconfig +++ b/configs/TQM5200S_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_TQM5200=y CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B,TQM5200S" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM5200_B_HIGHBOOT_defconfig b/configs/TQM5200_B_HIGHBOOT_defconfig index 5c6474623f..dac1eefc62 100644 --- a/configs/TQM5200_B_HIGHBOOT_defconfig +++ b/configs/TQM5200_B_HIGHBOOT_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_TQM5200=y CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B,SYS_TEXT_BASE=0xFFF00000" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM5200_B_defconfig b/configs/TQM5200_B_defconfig index 331dcab1a7..8417ce2686 100644 --- a/configs/TQM5200_B_defconfig +++ b/configs/TQM5200_B_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_TQM5200=y CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM5200_STK100_defconfig b/configs/TQM5200_STK100_defconfig index e3848340aa..9e381f45d4 100644 --- a/configs/TQM5200_STK100_defconfig +++ b/configs/TQM5200_STK100_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_TQM5200=y CONFIG_SYS_EXTRA_OPTIONS="STK52XX_REV100" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM5200_defconfig b/configs/TQM5200_defconfig index 6a4d25eb8f..d82a5be9b7 100644 --- a/configs/TQM5200_defconfig +++ b/configs/TQM5200_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_TQM5200=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM823L_LCD_defconfig b/configs/TQM823L_LCD_defconfig index 94bda12bb7..ebe9bdf2e2 100644 --- a/configs/TQM823L_LCD_defconfig +++ b/configs/TQM823L_LCD_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM823L=y CONFIG_SYS_EXTRA_OPTIONS="LCD,NEC_NL6448BC20" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM823L_defconfig b/configs/TQM823L_defconfig index 96e16c669d..05e69c3f48 100644 --- a/configs/TQM823L_defconfig +++ b/configs/TQM823L_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM823L=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM823M_defconfig b/configs/TQM823M_defconfig index b4bd8e9f0c..4c9ead835f 100644 --- a/configs/TQM823M_defconfig +++ b/configs/TQM823M_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM823M=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig index d2c4bd575b..c980d95d19 100644 --- a/configs/TQM834x_defconfig +++ b/configs/TQM834x_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_TQM834X=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM850L_defconfig b/configs/TQM850L_defconfig index 06cc72c842..47c4070a6d 100644 --- a/configs/TQM850L_defconfig +++ b/configs/TQM850L_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM850L=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM850M_defconfig b/configs/TQM850M_defconfig index 5f8d89d444..e4784b54bc 100644 --- a/configs/TQM850M_defconfig +++ b/configs/TQM850M_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM850M=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM855L_defconfig b/configs/TQM855L_defconfig index 6858682c7c..e0b03af980 100644 --- a/configs/TQM855L_defconfig +++ b/configs/TQM855L_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM855L=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM855M_defconfig b/configs/TQM855M_defconfig index 460f91bd51..32496bf9a5 100644 --- a/configs/TQM855M_defconfig +++ b/configs/TQM855M_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM855M=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM860L_defconfig b/configs/TQM860L_defconfig index 2178a1a450..b83a07bf88 100644 --- a/configs/TQM860L_defconfig +++ b/configs/TQM860L_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM860L=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM860M_defconfig b/configs/TQM860M_defconfig index d262d6f07b..d95ad7931f 100644 --- a/configs/TQM860M_defconfig +++ b/configs/TQM860M_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM860M=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM862L_defconfig b/configs/TQM862L_defconfig index b85f6befef..75c8801f51 100644 --- a/configs/TQM862L_defconfig +++ b/configs/TQM862L_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM862L=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM862M_defconfig b/configs/TQM862M_defconfig index 81fba41693..d5f822266f 100644 --- a/configs/TQM862M_defconfig +++ b/configs/TQM862M_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM862M=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM866M_defconfig b/configs/TQM866M_defconfig index c644f87440..74f12e224e 100644 --- a/configs/TQM866M_defconfig +++ b/configs/TQM866M_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM866M=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TQM885D_defconfig b/configs/TQM885D_defconfig index a1a2fbb579..bcad969efb 100644 --- a/configs/TQM885D_defconfig +++ b/configs/TQM885D_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM885D=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TTTech_defconfig b/configs/TTTech_defconfig index cec9f2d377..d239a73db6 100644 --- a/configs/TTTech_defconfig +++ b/configs/TTTech_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM823L=y CONFIG_SYS_EXTRA_OPTIONS="LCD,SHARP_LQ104V7DS01" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig index 145692965d..c86900a333 100644 --- a/configs/TWR-P1025_defconfig +++ b/configs/TWR-P1025_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_TWR=y CONFIG_SYS_EXTRA_OPTIONS="TWR_P1025" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/TZX-Q8-713B7_defconfig b/configs/TZX-Q8-713B7_defconfig index 52642d61f5..68961fc54e 100644 --- a/configs/TZX-Q8-713B7_defconfig +++ b/configs/TZX-Q8-713B7_defconfig @@ -12,7 +12,11 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-tzx-q8-713b7" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig index d6ea20e52e..9e41048afe 100644 --- a/configs/UCP1020_SPIFLASH_defconfig +++ b/configs/UCP1020_SPIFLASH_defconfig @@ -2,5 +2,7 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_UCP1020=y CONFIG_TARGET_UCP1020_SPIFLASH=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n" +CONFIG_AUTOBOOT_STOP_STR="\x1b" +CONFIG_SPI_FLASH=y diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig index 50cb7deca1..010b15f767 100644 --- a/configs/UCP1020_defconfig +++ b/configs/UCP1020_defconfig @@ -1,5 +1,7 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_UCP1020=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n" +CONFIG_AUTOBOOT_STOP_STR="\x1b" +CONFIG_SPI_FLASH=y diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig index bd6b66fbfb..c3b13b7bee 100644 --- a/configs/UTOO_P66_defconfig +++ b/configs/UTOO_P66_defconfig @@ -16,9 +16,11 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_TL059WV5C0=y CONFIG_USB_MUSB_SUNXI=y -# CONFIG_DM_SERIAL is not set CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-utoo-p66" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y diff --git a/configs/VCMA9_defconfig b/configs/VCMA9_defconfig index 3cc4185bcb..8885f1a97e 100644 --- a/configs/VCMA9_defconfig +++ b/configs/VCMA9_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_VCMA9=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/VOM405_defconfig b/configs/VOM405_defconfig index e439997214..ba3ade0594 100644 --- a/configs/VOM405_defconfig +++ b/configs/VOM405_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_VOM405=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig index 2beda9edba..d9180c7fe5 100644 --- a/configs/Wexler_TAB7200_defconfig +++ b/configs/Wexler_TAB7200_defconfig @@ -7,7 +7,13 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wexler-tab7200" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig index e8fc4f0ec2..bb8dd29937 100644 --- a/configs/Wits_Pro_A20_DKT_defconfig +++ b/configs/Wits_Pro_A20_DKT_defconfig @@ -9,8 +9,14 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wits-pro-a20-dkt" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig index e684267736..aab580e05e 100644 --- a/configs/Yones_Toptech_BD1078_defconfig +++ b/configs/Yones_Toptech_BD1078_defconfig @@ -18,7 +18,11 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-yones-toptech-bd1078" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y diff --git a/configs/a3m071_defconfig b/configs/a3m071_defconfig index 1a052e4ce0..3a6188e78b 100644 --- a/configs/a3m071_defconfig +++ b/configs/a3m071_defconfig @@ -2,4 +2,5 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_A3M071=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_LIB_RAND=y diff --git a/configs/a4m072_defconfig b/configs/a4m072_defconfig index a91c89b57d..4a02293b3c 100644 --- a/configs/a4m072_defconfig +++ b/configs/a4m072_defconfig @@ -1,4 +1,7 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_A4M072=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="asdfg" +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/a4m2k_defconfig b/configs/a4m2k_defconfig index 6efb1fdafd..22db933413 100644 --- a/configs/a4m2k_defconfig +++ b/configs/a4m2k_defconfig @@ -3,4 +3,5 @@ CONFIG_MPC5xxx=y CONFIG_TARGET_A3M071=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="A4M2K" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_LIB_RAND=y diff --git a/configs/ac14xx_defconfig b/configs/ac14xx_defconfig index 121883f875..37fb0e0ec7 100644 --- a/configs/ac14xx_defconfig +++ b/configs/ac14xx_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC512X=y CONFIG_TARGET_AC14XX=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/acadia_defconfig b/configs/acadia_defconfig index e869b26f23..26221ce4e0 100644 --- a/configs/acadia_defconfig +++ b/configs/acadia_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_ACADIA=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/adp-ag101_defconfig b/configs/adp-ag101_defconfig index 39a0510163..e550f71ebb 100644 --- a/configs/adp-ag101_defconfig +++ b/configs/adp-ag101_defconfig @@ -1,3 +1,3 @@ CONFIG_NDS32=y CONFIG_TARGET_ADP_AG101=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig index 7ef93b3f2b..740cb57df0 100644 --- a/configs/adp-ag101p_defconfig +++ b/configs/adp-ag101p_defconfig @@ -1,3 +1,3 @@ CONFIG_NDS32=y CONFIG_TARGET_ADP_AG101P=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/adp-ag102_defconfig b/configs/adp-ag102_defconfig index 217016be00..721f61d7f9 100644 --- a/configs/adp-ag102_defconfig +++ b/configs/adp-ag102_defconfig @@ -1,3 +1,5 @@ CONFIG_NDS32=y CONFIG_TARGET_ADP_AG102=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/alpr_defconfig b/configs/alpr_defconfig index 6865410f07..b7cd74da3a 100644 --- a/configs/alpr_defconfig +++ b/configs/alpr_defconfig @@ -1,4 +1,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_ALPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/alt_defconfig b/configs/alt_defconfig index 0006ebafbc..f4fea7f2c3 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -1,5 +1,20 @@ CONFIG_ARM=y CONFIG_RMOBILE=y CONFIG_TARGET_ALT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_SPI_FLASH=y CONFIG_SH_SDHI=y diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig new file mode 100644 index 0000000000..bf73919c06 --- /dev/null +++ b/configs/am335x_baltos_defconfig @@ -0,0 +1,11 @@ +CONFIG_ARM=y +CONFIG_TARGET_AM335X_BALTOS=y +CONFIG_SPL=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SYS_EXTRA_OPTIONS="NAND" +CONFIG_CONS_INDEX=1 +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig index 07ebb178c7..60339c8725 100644 --- a/configs/am335x_boneblack_defconfig +++ b/configs/am335x_boneblack_defconfig @@ -4,4 +4,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index a8584e9b84..b141255632 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -8,5 +8,9 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT,ENABLE_VBOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y +CONFIG_SPI_FLASH=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index f06baa69ab..96599c6a3f 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -4,4 +4,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SYS_EXTRA_OPTIONS="NAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig index c288528c76..6a39041a18 100644 --- a/configs/am335x_evm_nor_defconfig +++ b/configs/am335x_evm_nor_defconfig @@ -5,4 +5,6 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SYS_EXTRA_OPTIONS="NAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig index 49ea2f8435..9fdffca585 100644 --- a/configs/am335x_evm_norboot_defconfig +++ b/configs/am335x_evm_norboot_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_AM335X_EVM=y CONFIG_NOR=y CONFIG_NOR_BOOT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index 56e9ea1666..bbeb3c9498 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -4,4 +4,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SYS_EXTRA_OPTIONS="SPI_BOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig index 88598b0da5..c6109f143f 100644 --- a/configs/am335x_evm_usbspl_defconfig +++ b/configs/am335x_evm_usbspl_defconfig @@ -4,4 +4,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SYS_EXTRA_OPTIONS="NAND,SPL_USBETH_SUPPORT" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/am335x_igep0033_defconfig b/configs/am335x_igep0033_defconfig index 3d8d285a52..a31982a51a 100644 --- a/configs/am335x_igep0033_defconfig +++ b/configs/am335x_igep0033_defconfig @@ -3,4 +3,6 @@ CONFIG_TARGET_AM335X_IGEP0033=y CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_ADDR=0x82000000 -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_defconfig index abdd345ea3..a44ffe74a4 100644 --- a/configs/am3517_crane_defconfig +++ b/configs/am3517_crane_defconfig @@ -2,3 +2,10 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_AM3517_CRANE=y CONFIG_SPL=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 3b71cc61e7..4589b30a11 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_AM3517_EVM=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 4ad266717a..407d67c476 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -1,5 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_AM43XX_EVM=y CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" -CONFIG_CMD_NET=y +CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/am43xx_evm_ethboot_defconfig b/configs/am43xx_evm_ethboot_defconfig new file mode 100644 index 0000000000..2d1a301932 --- /dev/null +++ b/configs/am43xx_evm_ethboot_defconfig @@ -0,0 +1,8 @@ +CONFIG_ARM=y +CONFIG_TARGET_AM43XX_EVM=y +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND,SPL_ETH_SUPPORT" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index 6b06cffc5a..ff0109f2d9 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -1,4 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_AM43XX_EVM=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,QSPI,QSPI_BOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig new file mode 100644 index 0000000000..2a6c3dcbe1 --- /dev/null +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -0,0 +1,8 @@ +CONFIG_ARM=y +CONFIG_TARGET_AM43XX_EVM=y +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND,SPL_USB_HOST_SUPPORT" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig index 705c4007b1..47c4f3d21f 100644 --- a/configs/amcore_defconfig +++ b/configs/amcore_defconfig @@ -1,2 +1,8 @@ CONFIG_M68K=y CONFIG_TARGET_AMCORE=y +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/ap325rxa_defconfig b/configs/ap325rxa_defconfig index c34d7e98ef..8c22020a70 100644 --- a/configs/ap325rxa_defconfig +++ b/configs/ap325rxa_defconfig @@ -1,3 +1,18 @@ CONFIG_SH=y CONFIG_TARGET_AP325RXA=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/ap_sh4a_4a_defconfig b/configs/ap_sh4a_4a_defconfig index 16c1132531..51d5f9e874 100644 --- a/configs/ap_sh4a_4a_defconfig +++ b/configs/ap_sh4a_4a_defconfig @@ -1,3 +1,20 @@ CONFIG_SH=y CONFIG_TARGET_AP_SH4A_4A=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 9ec73f2689..fa9f365653 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -3,5 +3,12 @@ CONFIG_TEGRA=y CONFIG_TEGRA30=y CONFIG_TARGET_APALIS_T30=y CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig index 231ef6d355..854a2b7450 100644 --- a/configs/apf27_defconfig +++ b/configs/apf27_defconfig @@ -1,5 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_APF27=y CONFIG_SPL=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set diff --git a/configs/apx4devkit_defconfig b/configs/apx4devkit_defconfig index e88794a90d..5727929487 100644 --- a/configs/apx4devkit_defconfig +++ b/configs/apx4devkit_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_APX4DEVKIT=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/arcangel4-be_defconfig b/configs/arcangel4-be_defconfig index 2f9d0c8bd5..7335aac5a9 100644 --- a/configs/arcangel4-be_defconfig +++ b/configs/arcangel4-be_defconfig @@ -2,10 +2,13 @@ CONFIG_ARC=y CONFIG_CPU_BIG_ENDIAN=y CONFIG_TARGET_ARCANGEL4=y CONFIG_SYS_CLK_FREQ=70000000 -CONFIG_DM_SERIAL=y CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DEFAULT_DEVICE_TREE="arcangel4" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DM=y +CONFIG_DM_SERIAL=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/arcangel4_defconfig b/configs/arcangel4_defconfig index f1bfba0da4..5683b81ab4 100644 --- a/configs/arcangel4_defconfig +++ b/configs/arcangel4_defconfig @@ -1,10 +1,13 @@ CONFIG_ARC=y CONFIG_TARGET_ARCANGEL4=y CONFIG_SYS_CLK_FREQ=70000000 -CONFIG_DM_SERIAL=y CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DEFAULT_DEVICE_TREE="arcangel4" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DM=y +CONFIG_DM_SERIAL=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/arches_defconfig b/configs/arches_defconfig index 469dace8b1..f979a64560 100644 --- a/configs/arches_defconfig +++ b/configs/arches_defconfig @@ -3,6 +3,5 @@ CONFIG_4xx=y CONFIG_TARGET_CANYONLANDS=y CONFIG_ARCHES=y CONFIG_DEFAULT_DEVICE_TREE="arches" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y diff --git a/configs/aria_defconfig b/configs/aria_defconfig index 85d673dd37..1c073bf58c 100644 --- a/configs/aria_defconfig +++ b/configs/aria_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC512X=y CONFIG_TARGET_ARIA=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index af92f69ad5..e676f0ec0d 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_ARISTAINETOS2=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig index 306d4a86d8..f5b0b6bf5a 100644 --- a/configs/aristainetos_defconfig +++ b/configs/aristainetos_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_ARISTAINETOS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos.cfg,MX6DL" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig index e85928185f..240d72d23c 100644 --- a/configs/armadillo-800eva_defconfig +++ b/configs/armadillo-800eva_defconfig @@ -1,4 +1,20 @@ CONFIG_ARM=y CONFIG_RMOBILE=y CONFIG_TARGET_ARMADILLO_800EVA=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index 43f39f288a..aa489cfc2b 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -3,10 +3,13 @@ CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_ARNDALE=y CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale" CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_SOUND=y CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_SAMSUNG=y CONFIG_SOUND_MAX98095=y CONFIG_SOUND_WM8994=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/aspenite_defconfig b/configs/aspenite_defconfig index 0b341d6432..c606244433 100644 --- a/configs/aspenite_defconfig +++ b/configs/aspenite_defconfig @@ -1,2 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_ASPENITE=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index 6807aee99b..f394f4df57 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -1,2 +1,5 @@ CONFIG_M68K=y CONFIG_TARGET_ASTRO_MCF5373L=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/at91rm9200ek_defconfig b/configs/at91rm9200ek_defconfig index 932a48f0c8..74d4f3a748 100644 --- a/configs/at91rm9200ek_defconfig +++ b/configs/at91rm9200ek_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91RM9200EK=y -CONFIG_CMD_NET=y +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91rm9200ek_ram_defconfig b/configs/at91rm9200ek_ram_defconfig index 44b6fb96cc..f499453ed1 100644 --- a/configs/at91rm9200ek_ram_defconfig +++ b/configs/at91rm9200ek_ram_defconfig @@ -2,4 +2,5 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91RM9200EK=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index 5f629b6479..96c5eeef33 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index 05a4d2d345..6330c3e482 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 883d363ceb..ae2defd029 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index e465319d8f..838b235fe3 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 883fe86b96..6104479479 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index 9c0dc1aa20..4015c9f02a 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index fac7637258..d9003ff94b 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index fac7637258..d9003ff94b 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index 448695719d..600c5dd4fa 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index 6bc4f40b03..2e34b79c1b 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_BOOT_NORFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index 1b37f4e3cd..f72ed85a9e 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NORFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 3cb93e9ead..5f8d8031d3 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 2c1d9f6059..3ed763ecf5 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index 06fb78ff2a..c27e39ae7a 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index d3197b463d..d58de8eee3 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index 8d08dc12ce..4b2883921d 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index 62b8ed3830..ee86dad1ae 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index dba8f774a7..39d4b0970e 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index e1b99d3f58..d636485140 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index a9ab01a497..1472d20ecf 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -3,4 +3,10 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9M10G45EK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index b57f2ca815..526419cac0 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -3,4 +3,10 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9M10G45EK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 463e23ccf7..c549baf39b 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_MMC" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index a554f83bc1..756db2a7e0 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -3,4 +3,8 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index b4bddbc5a8..0430de9bd1 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -3,4 +3,8 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_SPIFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index 967d28aee1..c555caaed6 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -3,3 +3,12 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9RLEK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH" CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index 95a71df262..5cb565574c 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -3,3 +3,12 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9RLEK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC" CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index 885214d078..3e3528efb1 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -3,3 +3,12 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9RLEK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH" CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 66627216ff..c757fc4efe 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_DATAFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 85b24297a5..82e67f3bf3 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_MMC" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index a1d3f2d9fa..b45d8d0cf5 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -3,4 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 27e4f181aa..f33a2fd1e4 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -3,4 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_SPIFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index 9577c0fa4f..585d564bea 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index d72737b849..1c38777a77 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index ac88c96c6e..5e9a08000b 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -2,4 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/atngw100_defconfig b/configs/atngw100_defconfig index b00ae3a098..0f5be56447 100644 --- a/configs/atngw100_defconfig +++ b/configs/atngw100_defconfig @@ -1,3 +1,11 @@ CONFIG_AVR32=y CONFIG_TARGET_ATNGW100=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/atngw100mkii_defconfig b/configs/atngw100mkii_defconfig index 6caf691d00..b4d8d1c143 100644 --- a/configs/atngw100mkii_defconfig +++ b/configs/atngw100mkii_defconfig @@ -1,3 +1,10 @@ CONFIG_AVR32=y CONFIG_TARGET_ATNGW100MKII=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/atstk1002_defconfig b/configs/atstk1002_defconfig index e407dc56a1..bb0406e1ab 100644 --- a/configs/atstk1002_defconfig +++ b/configs/atstk1002_defconfig @@ -1,3 +1,10 @@ CONFIG_AVR32=y CONFIG_TARGET_ATSTK1002=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/atstk1003_defconfig b/configs/atstk1003_defconfig deleted file mode 100644 index b704532dbf..0000000000 --- a/configs/atstk1003_defconfig +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_AVR32=y -CONFIG_TARGET_ATSTK1003=y diff --git a/configs/atstk1004_defconfig b/configs/atstk1004_defconfig deleted file mode 100644 index 76502549c1..0000000000 --- a/configs/atstk1004_defconfig +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_AVR32=y -CONFIG_TARGET_ATSTK1004=y diff --git a/configs/atstk1006_defconfig b/configs/atstk1006_defconfig deleted file mode 100644 index 31482fcee2..0000000000 --- a/configs/atstk1006_defconfig +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_AVR32=y -CONFIG_TARGET_ATSTK1006=y -CONFIG_CMD_NET=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index d7dd3fdc34..78fcb7629b 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -3,4 +3,11 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_TAURUS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index 61c56e688d..04aec0b095 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -3,7 +3,10 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARC_CACHE_LINE_SHIFT=5 CONFIG_TARGET_AXS101=y CONFIG_SYS_CLK_FREQ=750000000 -CONFIG_NETDEVICES=y CONFIG_SYS_TEXT_BASE=0x81000000 -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index 444a95d8b0..8315b61358 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -2,7 +2,10 @@ CONFIG_ARC=y CONFIG_ISA_ARCV2=y CONFIG_TARGET_AXS101=y CONFIG_SYS_CLK_FREQ=50000000 -CONFIG_NETDEVICES=y CONFIG_SYS_TEXT_BASE=0x81000000 -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig index 80d2bd58aa..c84e82eae9 100644 --- a/configs/ba10_tv_box_defconfig +++ b/configs/ba10_tv_box_defconfig @@ -5,7 +5,13 @@ CONFIG_DRAM_CLK=384 CONFIG_DRAM_EMR1=4 CONFIG_USB2_VBUS_PIN="PH12" CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-ba10-tvbox" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/balloon3_defconfig b/configs/balloon3_defconfig index a1f4adbb1b..bf524ce868 100644 --- a/configs/balloon3_defconfig +++ b/configs/balloon3_defconfig @@ -1,2 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_BALLOON3=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/bamboo_defconfig b/configs/bamboo_defconfig index 420803cb36..1d66807df8 100644 --- a/configs/bamboo_defconfig +++ b/configs/bamboo_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_BAMBOO=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/bcm11130_defconfig b/configs/bcm11130_defconfig index ff2144f1ab..e7a9aa699b 100644 --- a/configs/bcm11130_defconfig +++ b/configs/bcm11130_defconfig @@ -1,3 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_BCM28155_AP=y CONFIG_SYS_EXTRA_OPTIONS="SYS_MMC_ENV_DEV=0" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/bcm11130_nand_defconfig b/configs/bcm11130_nand_defconfig index a21e623c0a..f50ffead72 100644 --- a/configs/bcm11130_nand_defconfig +++ b/configs/bcm11130_nand_defconfig @@ -1,3 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_BCM28155_AP=y CONFIG_SYS_EXTRA_OPTIONS="NAND" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/bcm28155_ap_defconfig b/configs/bcm28155_ap_defconfig index 0a1c592472..c82383ee06 100644 --- a/configs/bcm28155_ap_defconfig +++ b/configs/bcm28155_ap_defconfig @@ -1,2 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_BCM28155_AP=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/bcm28155_w1d_defconfig b/configs/bcm28155_w1d_defconfig index 3ab05f6435..bc0d8d2716 100644 --- a/configs/bcm28155_w1d_defconfig +++ b/configs/bcm28155_w1d_defconfig @@ -1,3 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_BCM28155_AP=y CONFIG_SYS_EXTRA_OPTIONS="BCM_SF2_ETH,BCM_SF2_ETH_GMAC" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/bcm911360_entphn-ns_defconfig b/configs/bcm911360_entphn-ns_defconfig index 1e23da39cf..4a7e1bc5f8 100644 --- a/configs/bcm911360_entphn-ns_defconfig +++ b/configs/bcm911360_entphn-ns_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_BCMCYGNUS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x20000000,ARMV7_NONSEC" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/bcm911360_entphn_defconfig b/configs/bcm911360_entphn_defconfig index 86d233f16e..a0d291cbf0 100644 --- a/configs/bcm911360_entphn_defconfig +++ b/configs/bcm911360_entphn_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_BCMCYGNUS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x20000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/bcm911360k_defconfig b/configs/bcm911360k_defconfig index a7feb8696d..df88a5724a 100644 --- a/configs/bcm911360k_defconfig +++ b/configs/bcm911360k_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_BCMCYGNUS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x40000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/bcm958300k-ns_defconfig b/configs/bcm958300k-ns_defconfig index 52551ad5bf..d9105a6167 100644 --- a/configs/bcm958300k-ns_defconfig +++ b/configs/bcm958300k-ns_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_BCMCYGNUS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x40000000,ARMV7_NONSEC" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/bcm958300k_defconfig b/configs/bcm958300k_defconfig index a7feb8696d..df88a5724a 100644 --- a/configs/bcm958300k_defconfig +++ b/configs/bcm958300k_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_BCMCYGNUS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x40000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/bcm958305k_defconfig b/configs/bcm958305k_defconfig index a7feb8696d..df88a5724a 100644 --- a/configs/bcm958305k_defconfig +++ b/configs/bcm958305k_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_BCMCYGNUS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x40000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/bcm958622hr_defconfig b/configs/bcm958622hr_defconfig index 844a1519fb..2272462ff6 100644 --- a/configs/bcm958622hr_defconfig +++ b/configs/bcm958622hr_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_BCMNSP=y CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x01000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/bct-brettl2_defconfig b/configs/bct-brettl2_defconfig index b585aa703c..9e6f1ee82c 100644 --- a/configs/bct-brettl2_defconfig +++ b/configs/bct-brettl2_defconfig @@ -1,5 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BCT_BRETTL2=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/beagle_x15_defconfig b/configs/beagle_x15_defconfig index bf224fca6b..3b3c0272bf 100644 --- a/configs/beagle_x15_defconfig +++ b/configs/beagle_x15_defconfig @@ -3,4 +3,6 @@ CONFIG_OMAP54XX=y CONFIG_TARGET_BEAGLE_X15=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=3" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index a73d151b5a..ad74b85f35 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -3,4 +3,14 @@ CONFIG_TEGRA=y CONFIG_TEGRA30=y CONFIG_TARGET_BEAVER=y CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/bf506f-ezkit_defconfig b/configs/bf506f-ezkit_defconfig index f164e06b54..0decb538cc 100644 --- a/configs/bf506f-ezkit_defconfig +++ b/configs/bf506f-ezkit_defconfig @@ -1,5 +1,26 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF506F_EZKIT=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/bf518f-ezbrd_defconfig b/configs/bf518f-ezbrd_defconfig index 8406294095..c3169143e7 100644 --- a/configs/bf518f-ezbrd_defconfig +++ b/configs/bf518f-ezbrd_defconfig @@ -1,5 +1,6 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF518F_EZBRD=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPI_FLASH=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf525-ucr2_defconfig b/configs/bf525-ucr2_defconfig index 692e006fc5..6406f20d06 100644 --- a/configs/bf525-ucr2_defconfig +++ b/configs/bf525-ucr2_defconfig @@ -1,2 +1,8 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF525_UCR2=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPI_FLASH=y diff --git a/configs/bf526-ezbrd_defconfig b/configs/bf526-ezbrd_defconfig index f557db07cf..c8dab57190 100644 --- a/configs/bf526-ezbrd_defconfig +++ b/configs/bf526-ezbrd_defconfig @@ -1,5 +1,6 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF526_EZBRD=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPI_FLASH=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf527-ad7160-eval_defconfig b/configs/bf527-ad7160-eval_defconfig index 47f53c9d81..b03a2ac1de 100644 --- a/configs/bf527-ad7160-eval_defconfig +++ b/configs/bf527-ad7160-eval_defconfig @@ -1,3 +1,8 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF527_AD7160_EVAL=y +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPI_FLASH=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf527-ezkit-v2_defconfig b/configs/bf527-ezkit-v2_defconfig index f963502b8c..74f352edc3 100644 --- a/configs/bf527-ezkit-v2_defconfig +++ b/configs/bf527-ezkit-v2_defconfig @@ -1,5 +1,7 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF527_EZKIT=y CONFIG_SYS_EXTRA_OPTIONS="BF527_EZKIT_REV_2_1" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y +CONFIG_LIB_RAND=y diff --git a/configs/bf527-ezkit_defconfig b/configs/bf527-ezkit_defconfig index 25ef5a9ba2..2e75225c10 100644 --- a/configs/bf527-ezkit_defconfig +++ b/configs/bf527-ezkit_defconfig @@ -1,5 +1,6 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF527_EZKIT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPI_FLASH=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf527-sdp_defconfig b/configs/bf527-sdp_defconfig index 57f47e9fc8..cb43de1b72 100644 --- a/configs/bf527-sdp_defconfig +++ b/configs/bf527-sdp_defconfig @@ -1,3 +1,8 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF527_SDP=y +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPI_FLASH=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf533-ezkit_defconfig b/configs/bf533-ezkit_defconfig index 66c11451af..54a09aa479 100644 --- a/configs/bf533-ezkit_defconfig +++ b/configs/bf533-ezkit_defconfig @@ -1,4 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF533_EZKIT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y +CONFIG_LIB_RAND=y diff --git a/configs/bf533-stamp_defconfig b/configs/bf533-stamp_defconfig index ca1202d849..154dc26909 100644 --- a/configs/bf533-stamp_defconfig +++ b/configs/bf533-stamp_defconfig @@ -1,4 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF533_STAMP=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y +CONFIG_LIB_RAND=y diff --git a/configs/bf537-minotaur_defconfig b/configs/bf537-minotaur_defconfig index 8e4ea92848..57e9a246b0 100644 --- a/configs/bf537-minotaur_defconfig +++ b/configs/bf537-minotaur_defconfig @@ -1,4 +1,7 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF537_MINOTAUR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPI_FLASH=y diff --git a/configs/bf537-pnav_defconfig b/configs/bf537-pnav_defconfig index 405471fd0b..3fa1758bee 100644 --- a/configs/bf537-pnav_defconfig +++ b/configs/bf537-pnav_defconfig @@ -1,4 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF537_PNAV=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPI_FLASH=y diff --git a/configs/bf537-srv1_defconfig b/configs/bf537-srv1_defconfig index 19d68329e4..51022d80d9 100644 --- a/configs/bf537-srv1_defconfig +++ b/configs/bf537-srv1_defconfig @@ -1,4 +1,7 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF537_SRV1=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPI_FLASH=y diff --git a/configs/bf537-stamp_defconfig b/configs/bf537-stamp_defconfig index 753bbc48ae..294d0d9d5f 100644 --- a/configs/bf537-stamp_defconfig +++ b/configs/bf537-stamp_defconfig @@ -1,5 +1,6 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF537_STAMP=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPI_FLASH=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf538f-ezkit_defconfig b/configs/bf538f-ezkit_defconfig index 84449ec42d..6cb6c6bf31 100644 --- a/configs/bf538f-ezkit_defconfig +++ b/configs/bf538f-ezkit_defconfig @@ -1,4 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF538F_EZKIT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y +CONFIG_LIB_RAND=y diff --git a/configs/bf548-ezkit_defconfig b/configs/bf548-ezkit_defconfig index 46c8fe2cf1..1ded34d0de 100644 --- a/configs/bf548-ezkit_defconfig +++ b/configs/bf548-ezkit_defconfig @@ -1,4 +1,6 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF548_EZKIT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y +CONFIG_LIB_RAND=y diff --git a/configs/bf561-acvilon_defconfig b/configs/bf561-acvilon_defconfig index b558066d8f..897e44f5ac 100644 --- a/configs/bf561-acvilon_defconfig +++ b/configs/bf561-acvilon_defconfig @@ -1,4 +1,8 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF561_ACVILON=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y +CONFIG_LIB_RAND=y diff --git a/configs/bf561-ezkit_defconfig b/configs/bf561-ezkit_defconfig index 0ef1a1cdb0..fa4b611f6f 100644 --- a/configs/bf561-ezkit_defconfig +++ b/configs/bf561-ezkit_defconfig @@ -1,4 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF561_EZKIT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y +CONFIG_LIB_RAND=y diff --git a/configs/bf609-ezkit_defconfig b/configs/bf609-ezkit_defconfig index 72e0606f7c..bb5efa9ce7 100644 --- a/configs/bf609-ezkit_defconfig +++ b/configs/bf609-ezkit_defconfig @@ -1,5 +1,7 @@ CONFIG_BLACKFIN=y -CONFIG_NETDEVICES=y CONFIG_TARGET_BF609_EZKIT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y +CONFIG_LIB_RAND=y diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig index 3e57959779..8e0fac8526 100644 --- a/configs/bg0900_defconfig +++ b/configs/bg0900_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_BG0900=y CONFIG_SPL=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig index 4d79c793e7..244c7706a9 100644 --- a/configs/birdland_bav335a_defconfig +++ b/configs/birdland_bav335a_defconfig @@ -3,4 +3,7 @@ CONFIG_TARGET_BAV335X=y CONFIG_BAV_VERSION=1 CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig index f8745eed84..a86b203af9 100644 --- a/configs/birdland_bav335b_defconfig +++ b/configs/birdland_bav335b_defconfig @@ -3,4 +3,7 @@ CONFIG_TARGET_BAV335X=y CONFIG_BAV_VERSION=2 CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/blackstamp_defconfig b/configs/blackstamp_defconfig index c19a8f0006..762eef38cd 100644 --- a/configs/blackstamp_defconfig +++ b/configs/blackstamp_defconfig @@ -1,3 +1,6 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BLACKSTAMP=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/blackvme_defconfig b/configs/blackvme_defconfig index 93b5ce589a..53f4a0d889 100644 --- a/configs/blackvme_defconfig +++ b/configs/blackvme_defconfig @@ -1,3 +1,6 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BLACKVME=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/br4_defconfig b/configs/br4_defconfig index e6970a40de..b129899e8b 100644 --- a/configs/br4_defconfig +++ b/configs/br4_defconfig @@ -1,4 +1,8 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BR4=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y +CONFIG_LIB_RAND=y diff --git a/configs/bubinga_defconfig b/configs/bubinga_defconfig index 3b15eaa58d..65ea4d1f7c 100644 --- a/configs/bubinga_defconfig +++ b/configs/bubinga_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_BUBINGA=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/caddy2_defconfig b/configs/caddy2_defconfig index ccc27c21d0..35efa7f4de 100644 --- a/configs/caddy2_defconfig +++ b/configs/caddy2_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_VME8349=y CONFIG_SYS_EXTRA_OPTIONS="CADDY2" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig index d2d47ae16a..b837de32a4 100644 --- a/configs/cairo_defconfig +++ b/configs/cairo_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_CAIRO=y CONFIG_SPL=y -CONFIG_CMD_SETEXPR=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_NET is not set diff --git a/configs/calimain_defconfig b/configs/calimain_defconfig index a601b0381d..35f73e3f88 100644 --- a/configs/calimain_defconfig +++ b/configs/calimain_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_CALIMAIN=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_STOP_STR="\x0b" +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cam5200_defconfig b/configs/cam5200_defconfig index e1796e3460..eda131a396 100644 --- a/configs/cam5200_defconfig +++ b/configs/cam5200_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_TQM5200=y CONFIG_SYS_EXTRA_OPTIONS="CAM5200,TQM5200S,TQM5200_B" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cam5200_niosflash_defconfig b/configs/cam5200_niosflash_defconfig index c3824866a1..aa7c70a9a0 100644 --- a/configs/cam5200_niosflash_defconfig +++ b/configs/cam5200_niosflash_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_TQM5200=y CONFIG_SYS_EXTRA_OPTIONS="CAM5200,TQM5200S,TQM5200_B,CAM5200_NIOSFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cam_enc_4xx_defconfig b/configs/cam_enc_4xx_defconfig index 261f155d36..f7f6f12b93 100644 --- a/configs/cam_enc_4xx_defconfig +++ b/configs/cam_enc_4xx_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_CAM_ENC_4XX=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/canmb_defconfig b/configs/canmb_defconfig index c0052990a3..b1ec147ad5 100644 --- a/configs/canmb_defconfig +++ b/configs/canmb_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_CANMB=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/canyonlands_defconfig b/configs/canyonlands_defconfig index 12d335233d..09172b1dfd 100644 --- a/configs/canyonlands_defconfig +++ b/configs/canyonlands_defconfig @@ -3,7 +3,6 @@ CONFIG_4xx=y CONFIG_TARGET_CANYONLANDS=y CONFIG_CANYONLANDS=y CONFIG_DEFAULT_DEVICE_TREE="canyonlands" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index 3f14178432..c0e98a5d70 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -3,4 +3,14 @@ CONFIG_TEGRA=y CONFIG_TEGRA30=y CONFIG_TARGET_CARDHU=y CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/cgtqmx6qeval_defconfig b/configs/cgtqmx6qeval_defconfig index 58b98b7238..e1eb871b4a 100644 --- a/configs/cgtqmx6qeval_defconfig +++ b/configs/cgtqmx6qeval_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_CGTQMX6EVAL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/congatec/cgtqmx6eval/imximage.cfg,MX6Q" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/charon_defconfig b/configs/charon_defconfig index 250e9492d2..d67cc55b1a 100644 --- a/configs/charon_defconfig +++ b/configs/charon_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_CHARON=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 4f7f779e18..018fe91e89 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -3,9 +3,18 @@ CONFIG_VENDOR_GOOGLE=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_TARGET_CHROMEBOOK_LINK=y CONFIG_HAVE_MRC=y -CONFIG_FRAMEBUFFER_SET_VESA_MODE=y -CONFIG_FRAMEBUFFER_VESA_MODE_11A=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y CONFIG_DM_PCI=y +CONFIG_SPI_FLASH=y CONFIG_VIDEO_VESA=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_11A=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_SYS_VSNPRINTF=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index 941033f6a7..2ac23ed97f 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -3,9 +3,18 @@ CONFIG_VENDOR_GOOGLE=y CONFIG_DEFAULT_DEVICE_TREE="chromebox_panther" CONFIG_TARGET_CHROMEBOX_PANTHER=y CONFIG_HAVE_MRC=y -CONFIG_FRAMEBUFFER_SET_VESA_MODE=y -CONFIG_FRAMEBUFFER_VESA_MODE_11A=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y CONFIG_DM_PCI=y +CONFIG_SPI_FLASH=y CONFIG_VIDEO_VESA=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_11A=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_SYS_VSNPRINTF=y diff --git a/configs/cm-bf527_defconfig b/configs/cm-bf527_defconfig index 1394c5a1e8..88d7f086e4 100644 --- a/configs/cm-bf527_defconfig +++ b/configs/cm-bf527_defconfig @@ -1,5 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_CM_BF527=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/cm-bf533_defconfig b/configs/cm-bf533_defconfig index 42d568e473..753ffe1559 100644 --- a/configs/cm-bf533_defconfig +++ b/configs/cm-bf533_defconfig @@ -1,4 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_CM_BF533=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y +CONFIG_LIB_RAND=y diff --git a/configs/cm-bf537e_defconfig b/configs/cm-bf537e_defconfig index 0264d2fb70..137f19a93b 100644 --- a/configs/cm-bf537e_defconfig +++ b/configs/cm-bf537e_defconfig @@ -1,5 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_CM_BF537E=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/cm-bf537u_defconfig b/configs/cm-bf537u_defconfig index 90f506639a..143b583e53 100644 --- a/configs/cm-bf537u_defconfig +++ b/configs/cm-bf537u_defconfig @@ -1,5 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_CM_BF537U=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/cm-bf548_defconfig b/configs/cm-bf548_defconfig index 906a9bd743..949612d053 100644 --- a/configs/cm-bf548_defconfig +++ b/configs/cm-bf548_defconfig @@ -1,4 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_CM_BF548=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y +CONFIG_LIB_RAND=y diff --git a/configs/cm-bf561_defconfig b/configs/cm-bf561_defconfig index 023cc65ecc..68d4bb9b16 100644 --- a/configs/cm-bf561_defconfig +++ b/configs/cm-bf561_defconfig @@ -1,4 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_CM_BF561=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y +CONFIG_LIB_RAND=y diff --git a/configs/cm5200_defconfig b/configs/cm5200_defconfig index 5a44476db0..76c7b06f90 100644 --- a/configs/cm5200_defconfig +++ b/configs/cm5200_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_CM5200=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 4db785dc69..6be5c179ee 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -2,4 +2,11 @@ CONFIG_ARM=y CONFIG_TARGET_CM_FX6=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL,SPL" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index b390079eb5..9ebd3270d2 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_CM_T335=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig index c3d02e5d59..57b44ba5ab 100644 --- a/configs/cm_t3517_defconfig +++ b/configs/cm_t3517_defconfig @@ -1,4 +1,7 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_CM_T3517=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig index bbc60ff2ba..c8dc1244f3 100644 --- a/configs/cm_t35_defconfig +++ b/configs/cm_t35_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_CM_T35=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig index 762a21645c..af7c880143 100644 --- a/configs/cm_t54_defconfig +++ b/configs/cm_t54_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_OMAP54XX=y CONFIG_TARGET_CM_T54=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/cmi_mpc5xx_defconfig b/configs/cmi_mpc5xx_defconfig index 5c855b137b..abebfab999 100644 --- a/configs/cmi_mpc5xx_defconfig +++ b/configs/cmi_mpc5xx_defconfig @@ -1,3 +1,6 @@ CONFIG_PPC=y CONFIG_5xx=y CONFIG_TARGET_CMI_MPC5XX=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig index 007e30b8a3..2ccb80c6f9 100644 --- a/configs/cobra5272_defconfig +++ b/configs/cobra5272_defconfig @@ -1,3 +1,5 @@ CONFIG_M68K=y CONFIG_TARGET_COBRA5272=y -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig index de2ad14d7e..3963a50995 100644 --- a/configs/colibri_pxa270_defconfig +++ b/configs/colibri_pxa270_defconfig @@ -1,3 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_COLIBRI_PXA270=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index 292eccbe91..4e1369bcf7 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -3,5 +3,12 @@ CONFIG_TEGRA=y CONFIG_TEGRA20=y CONFIG_TARGET_COLIBRI_T20=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index 54d73a2c22..45cf20aebd 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -3,5 +3,12 @@ CONFIG_TEGRA=y CONFIG_TEGRA30=y CONFIG_TARGET_COLIBRI_T30=y CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index b2d1ed803f..ffb3b4fd85 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_COLIBRI_VF=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,ENV_IS_IN_NAND,IMX_NAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_DM=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y diff --git a/configs/colibri_vf_dtb_defconfig b/configs/colibri_vf_dtb_defconfig new file mode 100644 index 0000000000..49f2105c0c --- /dev/null +++ b/configs/colibri_vf_dtb_defconfig @@ -0,0 +1,11 @@ +CONFIG_ARM=y +CONFIG_TARGET_COLIBRI_VF=y +CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,ENV_IS_IN_NAND,IMX_NAND" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_NAND_VF610_NFC=y +CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig index 63b24c02b9..37ead03a43 100644 --- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_CONTROLCENTERD=y CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD,DEVELOP" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig index ef64586635..7166edbf9d 100644 --- a/configs/controlcenterd_36BIT_SDCARD_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_CONTROLCENTERD=y CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig index f61fcf8813..d99fcd4513 100644 --- a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig +++ b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig @@ -3,4 +3,6 @@ CONFIG_MPC85xx=y CONFIG_TARGET_CONTROLCENTERD=y CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH,DEVELOP" # CONFIG_CMD_BOOTM is not set -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/controlcenterd_TRAILBLAZER_defconfig b/configs/controlcenterd_TRAILBLAZER_defconfig index 4fc8b04ae4..3557aea1eb 100644 --- a/configs/controlcenterd_TRAILBLAZER_defconfig +++ b/configs/controlcenterd_TRAILBLAZER_defconfig @@ -3,4 +3,6 @@ CONFIG_MPC85xx=y CONFIG_TARGET_CONTROLCENTERD=y CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH" # CONFIG_CMD_BOOTM is not set -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig index 9bed74c3ca..581df0a76a 100644 --- a/configs/coreboot-x86_defconfig +++ b/configs/coreboot-x86_defconfig @@ -1,5 +1,16 @@ CONFIG_X86=y +CONFIG_VENDOR_COREBOOT=y CONFIG_TARGET_COREBOOT=y -CONFIG_CMD_NET=y +CONFIG_TSC_CALIBRATION_BYPASS=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y CONFIG_DM_PCI=y +CONFIG_SPI_FLASH=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_SYS_VSNPRINTF=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index eb11174a06..13afb0857a 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -3,4 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_CORVUS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cpu9260_128M_defconfig b/configs/cpu9260_128M_defconfig index 7e93b3e290..f423980c4e 100644 --- a/configs/cpu9260_128M_defconfig +++ b/configs/cpu9260_128M_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y CONFIG_SYS_EXTRA_OPTIONS="CPU9260,CPU9260_128M" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cpu9260_defconfig b/configs/cpu9260_defconfig index a1f4398c7b..88afe9fff5 100644 --- a/configs/cpu9260_defconfig +++ b/configs/cpu9260_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y CONFIG_SYS_EXTRA_OPTIONS="CPU9260" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cpu9260_nand_128M_defconfig b/configs/cpu9260_nand_128M_defconfig index 135e1faa13..f59b0002ba 100644 --- a/configs/cpu9260_nand_128M_defconfig +++ b/configs/cpu9260_nand_128M_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y CONFIG_SYS_EXTRA_OPTIONS="CPU9260,CPU9260_128M,NANDBOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cpu9260_nand_defconfig b/configs/cpu9260_nand_defconfig index 4aadb29d79..e914c2b644 100644 --- a/configs/cpu9260_nand_defconfig +++ b/configs/cpu9260_nand_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y CONFIG_SYS_EXTRA_OPTIONS="CPU9260,NANDBOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cpu9G20_128M_defconfig b/configs/cpu9G20_128M_defconfig index aa95f79eab..d215cc04fb 100644 --- a/configs/cpu9G20_128M_defconfig +++ b/configs/cpu9G20_128M_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y CONFIG_SYS_EXTRA_OPTIONS="CPU9G20,CPU9G20_128M" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cpu9G20_defconfig b/configs/cpu9G20_defconfig index a13f6cbb6e..51b19f0e69 100644 --- a/configs/cpu9G20_defconfig +++ b/configs/cpu9G20_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y CONFIG_SYS_EXTRA_OPTIONS="CPU9G20" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cpu9G20_nand_128M_defconfig b/configs/cpu9G20_nand_128M_defconfig index a7d473e748..da4cbdd818 100644 --- a/configs/cpu9G20_nand_128M_defconfig +++ b/configs/cpu9G20_nand_128M_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y CONFIG_SYS_EXTRA_OPTIONS="CPU9G20,CPU9G20_128M,NANDBOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cpu9G20_nand_defconfig b/configs/cpu9G20_nand_defconfig index d021c8dd71..b9e4b3c990 100644 --- a/configs/cpu9G20_nand_defconfig +++ b/configs/cpu9G20_nand_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y CONFIG_SYS_EXTRA_OPTIONS="CPU9G20,NANDBOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/cpuat91_defconfig b/configs/cpuat91_defconfig index 7a87f4ae11..cfc62aaa77 100644 --- a/configs/cpuat91_defconfig +++ b/configs/cpuat91_defconfig @@ -1,4 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_CPUAT91=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/cpuat91_ram_defconfig b/configs/cpuat91_ram_defconfig index 7b92ed6826..188c2b91f8 100644 --- a/configs/cpuat91_ram_defconfig +++ b/configs/cpuat91_ram_defconfig @@ -2,4 +2,12 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_CPUAT91=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT" -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index d3a370d807..f3fb206b0e 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -3,5 +3,14 @@ CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="crownbay" CONFIG_TARGET_CROWNBAY=y CONFIG_GENERATE_PIRQ_TABLE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y +CONFIG_SPI_FLASH=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_SYS_VSNPRINTF=y diff --git a/configs/csb272_defconfig b/configs/csb272_defconfig index 5ac3c1973d..c9cc680951 100644 --- a/configs/csb272_defconfig +++ b/configs/csb272_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_CSB272=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/csb472_defconfig b/configs/csb472_defconfig index 7c43e575f5..e46b965517 100644 --- a/configs/csb472_defconfig +++ b/configs/csb472_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_CSB472=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index a28032ef09..d5f783f46e 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NET2BIG_V2=y CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/da830evm_defconfig b/configs/da830evm_defconfig index 846b75cff0..e0c8e25b6d 100644 --- a/configs/da830evm_defconfig +++ b/configs/da830evm_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DA830EVM=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig index b3def2094c..ffdabab149 100644 --- a/configs/da850_am18xxevm_defconfig +++ b/configs/da850_am18xxevm_defconfig @@ -3,4 +3,7 @@ CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DA850EVM=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index e01276380f..41395e3f93 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -3,4 +3,7 @@ CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DA850EVM=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 22afff5ea4..a1cba1afa0 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -2,4 +2,5 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DA850EVM=y CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH,USE_NOR,DIRECT_NOR_BOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index 67b8c9ae99..e7443f8be5 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -3,4 +3,14 @@ CONFIG_TEGRA=y CONFIG_TEGRA114=y CONFIG_TARGET_DALMORE=y CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/davinci_dm355evm_defconfig b/configs/davinci_dm355evm_defconfig index 874decb992..f10b643775 100644 --- a/configs/davinci_dm355evm_defconfig +++ b/configs/davinci_dm355evm_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DAVINCI_DM355EVM=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/davinci_dm355leopard_defconfig b/configs/davinci_dm355leopard_defconfig index 2655001a99..7b33f6df46 100644 --- a/configs/davinci_dm355leopard_defconfig +++ b/configs/davinci_dm355leopard_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DAVINCI_DM355LEOPARD=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/davinci_dm365evm_defconfig b/configs/davinci_dm365evm_defconfig index b7ccfae6a9..f139b58c48 100644 --- a/configs/davinci_dm365evm_defconfig +++ b/configs/davinci_dm365evm_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DAVINCI_DM365EVM=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/davinci_dm6467Tevm_defconfig b/configs/davinci_dm6467Tevm_defconfig index 87bc0776d8..3749b81ac5 100644 --- a/configs/davinci_dm6467Tevm_defconfig +++ b/configs/davinci_dm6467Tevm_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DAVINCI_DM6467EVM=y CONFIG_SYS_EXTRA_OPTIONS="DAVINCI_DM6467TEVM,REFCLK_FREQ=33000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/davinci_dm6467evm_defconfig b/configs/davinci_dm6467evm_defconfig index b7f94b208f..2a5262a2d1 100644 --- a/configs/davinci_dm6467evm_defconfig +++ b/configs/davinci_dm6467evm_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DAVINCI_DM6467EVM=y CONFIG_SYS_EXTRA_OPTIONS="REFCLK_FREQ=27000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/davinci_dvevm_defconfig b/configs/davinci_dvevm_defconfig index 0ef66456c7..aa30d1bcf4 100644 --- a/configs/davinci_dvevm_defconfig +++ b/configs/davinci_dvevm_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DAVINCI_DVEVM=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/davinci_schmoogie_defconfig b/configs/davinci_schmoogie_defconfig index ef7f8bb575..7c11c8c16d 100644 --- a/configs/davinci_schmoogie_defconfig +++ b/configs/davinci_schmoogie_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DAVINCI_SCHMOOGIE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/davinci_sffsdr_defconfig b/configs/davinci_sffsdr_defconfig index 4c1e4114a4..7aca6061aa 100644 --- a/configs/davinci_sffsdr_defconfig +++ b/configs/davinci_sffsdr_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DAVINCI_SFFSDR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/davinci_sonata_defconfig b/configs/davinci_sonata_defconfig index dd90bc08ff..6014eee467 100644 --- a/configs/davinci_sonata_defconfig +++ b/configs/davinci_sonata_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DAVINCI_SONATA=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 5f53522252..569ddfdda0 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -1,3 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_DB_88F6820_GP=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 637694ba48..d11377f0ed 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -1,4 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_DB_MV784MP_GP=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/dbau1000_defconfig b/configs/dbau1000_defconfig index fb6c4afb8a..58da5b7ba2 100644 --- a/configs/dbau1000_defconfig +++ b/configs/dbau1000_defconfig @@ -1,4 +1,12 @@ CONFIG_MIPS=y CONFIG_TARGET_DBAU1X00=y CONFIG_SYS_EXTRA_OPTIONS="DBAU1000" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/dbau1100_defconfig b/configs/dbau1100_defconfig index cda1332d37..14aeb4c948 100644 --- a/configs/dbau1100_defconfig +++ b/configs/dbau1100_defconfig @@ -1,4 +1,12 @@ CONFIG_MIPS=y CONFIG_TARGET_DBAU1X00=y CONFIG_DBAU1100=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/dbau1500_defconfig b/configs/dbau1500_defconfig index f6f220273f..699b968f1e 100644 --- a/configs/dbau1500_defconfig +++ b/configs/dbau1500_defconfig @@ -1,4 +1,12 @@ CONFIG_MIPS=y CONFIG_TARGET_DBAU1X00=y CONFIG_DBAU1500=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/dbau1550_defconfig b/configs/dbau1550_defconfig index 85875a99a8..6b17da745b 100644 --- a/configs/dbau1550_defconfig +++ b/configs/dbau1550_defconfig @@ -1,4 +1,10 @@ CONFIG_MIPS=y CONFIG_TARGET_DBAU1X00=y CONFIG_DBAU1550=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/dbau1550_el_defconfig b/configs/dbau1550_el_defconfig index 5b229787f2..845bc87834 100644 --- a/configs/dbau1550_el_defconfig +++ b/configs/dbau1550_el_defconfig @@ -2,4 +2,10 @@ CONFIG_MIPS=y CONFIG_TARGET_DBAU1X00=y CONFIG_DBAU1550=y CONFIG_SYS_LITTLE_ENDIAN=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/devconcenter_defconfig b/configs/devconcenter_defconfig index 99d57ea2a7..ecf766ef9b 100644 --- a/configs/devconcenter_defconfig +++ b/configs/devconcenter_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_INTIP=y CONFIG_SYS_EXTRA_OPTIONS="DEVCONCENTER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index 3da2c61722..f0c4ee12d6 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_DEVKIT3250=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index f592124318..60ead72256 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_DEVKIT8000=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/dig297_defconfig b/configs/dig297_defconfig index a50ca2bafe..483c20e930 100644 --- a/configs/dig297_defconfig +++ b/configs/dig297_defconfig @@ -1,4 +1,9 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_DIG297=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/digsy_mtc_RAMBOOT_defconfig b/configs/digsy_mtc_RAMBOOT_defconfig index daaf1dcf4a..17ac961f34 100644 --- a/configs/digsy_mtc_RAMBOOT_defconfig +++ b/configs/digsy_mtc_RAMBOOT_defconfig @@ -2,4 +2,8 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_DIGSY_MTC=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00100000" -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/digsy_mtc_defconfig b/configs/digsy_mtc_defconfig index c1706d1bd1..913ba7e87a 100644 --- a/configs/digsy_mtc_defconfig +++ b/configs/digsy_mtc_defconfig @@ -1,4 +1,7 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_DIGSY_MTC=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR=" " +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/digsy_mtc_rev5_RAMBOOT_defconfig b/configs/digsy_mtc_rev5_RAMBOOT_defconfig index 6a4869dc03..408cff5b57 100644 --- a/configs/digsy_mtc_rev5_RAMBOOT_defconfig +++ b/configs/digsy_mtc_rev5_RAMBOOT_defconfig @@ -2,4 +2,8 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_DIGSY_MTC=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00100000,DIGSY_REV5" -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/digsy_mtc_rev5_defconfig b/configs/digsy_mtc_rev5_defconfig index 9370fdd30e..e950eb3871 100644 --- a/configs/digsy_mtc_rev5_defconfig +++ b/configs/digsy_mtc_rev5_defconfig @@ -2,4 +2,8 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_DIGSY_MTC=y CONFIG_SYS_EXTRA_OPTIONS="DIGSY_REV5" -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/dlvision-10g_defconfig b/configs/dlvision-10g_defconfig index b067c8697d..4ed14f85d5 100644 --- a/configs/dlvision-10g_defconfig +++ b/configs/dlvision-10g_defconfig @@ -1,5 +1,6 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_DLVISION_10G=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_NFS is not set diff --git a/configs/dlvision_defconfig b/configs/dlvision_defconfig index c3817578c2..7982c17c38 100644 --- a/configs/dlvision_defconfig +++ b/configs/dlvision_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_DLVISION=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_NFS is not set diff --git a/configs/dnp5370_defconfig b/configs/dnp5370_defconfig index e8aba3d029..b809dfa493 100644 --- a/configs/dnp5370_defconfig +++ b/configs/dnp5370_defconfig @@ -1,4 +1,4 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_DNP5370=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index 8f505248b4..c56dc5ba07 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_DNS325=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index 523a3ed7da..40f6e0f5a3 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_DOCKSTAR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 682a6cc082..1a0e01fe9a 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -3,4 +3,8 @@ CONFIG_OMAP54XX=y CONFIG_TARGET_DRA7XX_EVM=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPI_FLASH=y diff --git a/configs/dra7xx_evm_qspiboot_defconfig b/configs/dra7xx_evm_qspiboot_defconfig index 86dad8859c..90e3cf4ad4 100644 --- a/configs/dra7xx_evm_qspiboot_defconfig +++ b/configs/dra7xx_evm_qspiboot_defconfig @@ -3,4 +3,8 @@ CONFIG_OMAP54XX=y CONFIG_TARGET_DRA7XX_EVM=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,QSPI_BOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPI_FLASH=y diff --git a/configs/dra7xx_evm_uart3_defconfig b/configs/dra7xx_evm_uart3_defconfig index c4bd587262..474cada18e 100644 --- a/configs/dra7xx_evm_uart3_defconfig +++ b/configs/dra7xx_evm_uart3_defconfig @@ -3,4 +3,8 @@ CONFIG_OMAP54XX=y CONFIG_TARGET_DRA7XX_EVM=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=3,SPL_YMODEM_SUPPORT" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPI_FLASH=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index 4c514a39ef..8b177b3a46 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -1,4 +1,10 @@ CONFIG_ARM=y CONFIG_TARGET_DRACO=y CONFIG_SPL=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" +CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 0d0dfe9dbb..501fbbfd33 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -1,4 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_DREAMPLUG=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/duovero_defconfig b/configs/duovero_defconfig index 59863dd3b2..57410d3b93 100644 --- a/configs/duovero_defconfig +++ b/configs/duovero_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_OMAP44XX=y CONFIG_TARGET_DUOVERO=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/dxr2_defconfig b/configs/dxr2_defconfig deleted file mode 100644 index c2a14b794c..0000000000 --- a/configs/dxr2_defconfig +++ /dev/null @@ -1,4 +0,0 @@ -CONFIG_ARM=y -CONFIG_TARGET_DXR2=y -CONFIG_SPL=y -CONFIG_CMD_NET=y diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig index 87c64fdd1d..388dfec0c2 100644 --- a/configs/ea20_defconfig +++ b/configs/ea20_defconfig @@ -1,4 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_EA20=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index ed9c66a6ed..1e19d3a106 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -1,4 +1,5 @@ CONFIG_M68K=y CONFIG_TARGET_EB_CPU5282=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFF000000,SYS_MONITOR_BASE=0xFF000400" -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index 567f0b0173..5af19a0694 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -1,4 +1,5 @@ CONFIG_M68K=y CONFIG_TARGET_EB_CPU5282=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xF0000000,SYS_MONITOR_BASE=0xF0000418" -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/eb_cpux9k2_defconfig b/configs/eb_cpux9k2_defconfig index e7f62c771b..bff65951a5 100644 --- a/configs/eb_cpux9k2_defconfig +++ b/configs/eb_cpux9k2_defconfig @@ -1,4 +1,4 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_EB_CPUX9K2=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/eb_cpux9k2_ram_defconfig b/configs/eb_cpux9k2_ram_defconfig index 2716774444..47c2178f16 100644 --- a/configs/eb_cpux9k2_ram_defconfig +++ b/configs/eb_cpux9k2_ram_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_EB_CPUX9K2=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ebony_defconfig b/configs/ebony_defconfig index 6165a7be3c..db93555b9e 100644 --- a/configs/ebony_defconfig +++ b/configs/ebony_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_EBONY=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig index 44b096b04f..c43603b64b 100644 --- a/configs/eco5pk_defconfig +++ b/configs/eco5pk_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_ECO5PK=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ecovec_defconfig b/configs/ecovec_defconfig index 5e11e44be0..de4617c0e3 100644 --- a/configs/ecovec_defconfig +++ b/configs/ecovec_defconfig @@ -1,3 +1,20 @@ CONFIG_SH=y CONFIG_TARGET_ECOVEC=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/edb9315a_defconfig b/configs/edb9315a_defconfig index 839efb5245..452bf0de63 100644 --- a/configs/edb9315a_defconfig +++ b/configs/edb9315a_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_EDB93XX=y CONFIG_SYS_EXTRA_OPTIONS="MK_edb9315a" -CONFIG_CMD_NET=y +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index 510bcce437..80ff33f467 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_ORION5X=y CONFIG_TARGET_EDMINIV2=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/enbw_cmc_defconfig b/configs/enbw_cmc_defconfig index d8e03c04ff..90249f3772 100644 --- a/configs/enbw_cmc_defconfig +++ b/configs/enbw_cmc_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_ENBW_CMC=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/espt_defconfig b/configs/espt_defconfig index 150936e9d5..fbb712daa0 100644 --- a/configs/espt_defconfig +++ b/configs/espt_defconfig @@ -1,3 +1,20 @@ CONFIG_SH=y CONFIG_TARGET_ESPT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index 8f18999c61..d2379ec1cb 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -2,5 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_ETHERNUT5=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SPI_FLASH=y diff --git a/configs/favr-32-ezkit_defconfig b/configs/favr-32-ezkit_defconfig deleted file mode 100644 index fabb50c249..0000000000 --- a/configs/favr-32-ezkit_defconfig +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_AVR32=y -CONFIG_TARGET_FAVR_32_EZKIT=y -CONFIG_CMD_NET=y diff --git a/configs/flea3_defconfig b/configs/flea3_defconfig index 22844cc612..7ea5da2961 100644 --- a/configs/flea3_defconfig +++ b/configs/flea3_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_FLEA3=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/fo300_defconfig b/configs/fo300_defconfig index dbf0ef5c8d..b8e5c80997 100644 --- a/configs/fo300_defconfig +++ b/configs/fo300_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_TQM5200=y CONFIG_SYS_EXTRA_OPTIONS="FO300" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/forfun_q88db_defconfig b/configs/forfun_q88db_defconfig index d6e6bd6bfa..85c807a9fa 100644 --- a/configs/forfun_q88db_defconfig +++ b/configs/forfun_q88db_defconfig @@ -11,7 +11,11 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-forfun-q88db" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y diff --git a/configs/fx12mm_defconfig b/configs/fx12mm_defconfig index a84dc6545a..1013b70849 100644 --- a/configs/fx12mm_defconfig +++ b/configs/fx12mm_defconfig @@ -2,3 +2,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_FX12MM=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,INIT_TLB=board/xilinx/ppc405-generic/init.o" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/fx12mm_flash_defconfig b/configs/fx12mm_flash_defconfig index cd28f33b6a..60eee6731e 100644 --- a/configs/fx12mm_flash_defconfig +++ b/configs/fx12mm_flash_defconfig @@ -2,3 +2,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_FX12MM=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig index 3beed582c6..315627d090 100644 --- a/configs/ga10h_v1_1_defconfig +++ b/configs/ga10h_v1_1_defconfig @@ -14,10 +14,14 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_USB_MUSB_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ippo-q8h-v1.2-lcd1024x600" +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ga10h-v1.1" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y CONFIG_AXP221_DLDO1_VOLT=3300 CONFIG_AXP221_ALDO1_VOLT=3000 diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index c0a937f91e..1ced47e7b8 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -1,8 +1,19 @@ CONFIG_X86=y -CONFIG_NETDEVICES=y CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="galileo" CONFIG_TARGET_GALILEO=y -CONFIG_CMD_NET=y +CONFIG_GENERATE_PIRQ_TABLE=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y +CONFIG_SPI_FLASH=y +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_SYS_VSNPRINTF=y diff --git a/configs/gdppc440etx_defconfig b/configs/gdppc440etx_defconfig index c6c7161c26..2dfebbbb8d 100644 --- a/configs/gdppc440etx_defconfig +++ b/configs/gdppc440etx_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_GDPPC440ETX=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/configs/glacier_defconfig b/configs/glacier_defconfig index 926d391cde..d318f82c4c 100644 --- a/configs/glacier_defconfig +++ b/configs/glacier_defconfig @@ -3,7 +3,5 @@ CONFIG_4xx=y CONFIG_TARGET_CANYONLANDS=y CONFIG_GLACIER=y CONFIG_DEFAULT_DEVICE_TREE="glacier" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/glacier_ramboot_defconfig b/configs/glacier_ramboot_defconfig index f4041e89fc..98bcaf4665 100644 --- a/configs/glacier_ramboot_defconfig +++ b/configs/glacier_ramboot_defconfig @@ -4,7 +4,5 @@ CONFIG_TARGET_CANYONLANDS=y CONFIG_GLACIER=y CONFIG_DEFAULT_DEVICE_TREE="glacier" CONFIG_SYS_EXTRA_OPTIONS="SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/canyonlands/u-boot-ram.lds" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index c6c3ef7439..d1b9ba1d4f 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_GOFLEXHOME=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 6d0c3ae5a2..bece0aa6a3 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -1,5 +1,20 @@ CONFIG_ARM=y CONFIG_RMOBILE=y CONFIG_TARGET_GOSE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_SPI_FLASH=y CONFIG_SH_SDHI=y diff --git a/configs/gplugd_defconfig b/configs/gplugd_defconfig index a92b4e4944..ab3f760982 100644 --- a/configs/gplugd_defconfig +++ b/configs/gplugd_defconfig @@ -1,3 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_GPLUGD=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/gr_cpci_ax2000_defconfig b/configs/gr_cpci_ax2000_defconfig index f2fb54476e..f003d775a4 100644 --- a/configs/gr_cpci_ax2000_defconfig +++ b/configs/gr_cpci_ax2000_defconfig @@ -1,4 +1,4 @@ CONFIG_SPARC=y CONFIG_TARGET_GR_CPCI_AX2000=y CONFIG_SYS_TEXT_BASE=0x00000000 -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/gr_ep2s60_defconfig b/configs/gr_ep2s60_defconfig index 7afd10986e..bbf18081c8 100644 --- a/configs/gr_ep2s60_defconfig +++ b/configs/gr_ep2s60_defconfig @@ -1,4 +1,4 @@ CONFIG_SPARC=y CONFIG_TARGET_GR_EP2S60=y CONFIG_SYS_TEXT_BASE=0x00000000 -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/gr_xc3s_1500_defconfig b/configs/gr_xc3s_1500_defconfig index cac67c23f4..5c1442dd04 100644 --- a/configs/gr_xc3s_1500_defconfig +++ b/configs/gr_xc3s_1500_defconfig @@ -1,4 +1,4 @@ CONFIG_SPARC=y CONFIG_TARGET_GR_XC3S_1500=y CONFIG_SYS_TEXT_BASE=0x00000000 -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/grasshopper_defconfig b/configs/grasshopper_defconfig index 451ce9f12c..2d9c8ade77 100644 --- a/configs/grasshopper_defconfig +++ b/configs/grasshopper_defconfig @@ -1,3 +1,8 @@ CONFIG_AVR32=y CONFIG_TARGET_GRASSHOPPER=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/grsim_defconfig b/configs/grsim_defconfig index d114a86f1b..b83abb6505 100644 --- a/configs/grsim_defconfig +++ b/configs/grsim_defconfig @@ -1,4 +1,13 @@ CONFIG_SPARC=y CONFIG_TARGET_GRSIM=y CONFIG_SYS_TEXT_BASE=0x00000000 -CONFIG_CMD_NET=y +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_MEMORY is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/grsim_leon2_defconfig b/configs/grsim_leon2_defconfig index f28ad4a0b9..756a786fa5 100644 --- a/configs/grsim_leon2_defconfig +++ b/configs/grsim_leon2_defconfig @@ -1,3 +1,14 @@ CONFIG_SPARC=y CONFIG_TARGET_GRSIM_LEON2=y CONFIG_SYS_TEXT_BASE=0x00000000 +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_MEMORY is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index 8d3d8c2d13..20b83e355b 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_GURUPLUG=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/gwventana_defconfig b/configs/gwventana_defconfig index 5cfe9830e2..401f77e189 100644 --- a/configs/gwventana_defconfig +++ b/configs/gwventana_defconfig @@ -1,9 +1,10 @@ CONFIG_ARM=y CONFIG_TARGET_GW_VENTANA=y -CONFIG_SYS_MALLOC_F=y CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_DM=y +CONFIG_DM_SERIAL=y diff --git a/configs/h2200_defconfig b/configs/h2200_defconfig index 40c28eed0a..f90a4a6f11 100644 --- a/configs/h2200_defconfig +++ b/configs/h2200_defconfig @@ -1,3 +1,19 @@ CONFIG_ARM=y CONFIG_TARGET_H2200=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_MEMORY is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/haleakala_defconfig b/configs/haleakala_defconfig index ba337490ef..81e3398886 100644 --- a/configs/haleakala_defconfig +++ b/configs/haleakala_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_KILAUEA=y CONFIG_SYS_EXTRA_OPTIONS="HALEAKALA" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/hammerhead_defconfig b/configs/hammerhead_defconfig deleted file mode 100644 index 1130d92988..0000000000 --- a/configs/hammerhead_defconfig +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_AVR32=y -CONFIG_TARGET_HAMMERHEAD=y -CONFIG_CMD_NET=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index aa556a1a6f..d88a082a50 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -3,4 +3,13 @@ CONFIG_TEGRA=y CONFIG_TEGRA20=y CONFIG_TARGET_HARMONY=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-harmony" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig index e1875dbb67..f7042e24bd 100644 --- a/configs/highbank_defconfig +++ b/configs/highbank_defconfig @@ -1,3 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_HIGHBANK=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds...\nPress <s> to stop or <d> to delay\n" +CONFIG_AUTOBOOT_KEYED_CTRLC=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig index 4f2a55dae7..6b2b5d34d7 100644 --- a/configs/hrcon_defconfig +++ b/configs/hrcon_defconfig @@ -1,4 +1,6 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_HRCON=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig index ec3c3e0446..3a69422480 100644 --- a/configs/i12-tvbox_defconfig +++ b/configs/i12-tvbox_defconfig @@ -3,8 +3,14 @@ CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,MACPWR=SUNXI_GPH(21),USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig index 919be44ec7..54de300aa8 100644 --- a/configs/iNet_3F_defconfig +++ b/configs/iNet_3F_defconfig @@ -13,7 +13,11 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3f" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig index b195f78436..e1beac88c1 100644 --- a/configs/iNet_3W_defconfig +++ b/configs/iNet_3W_defconfig @@ -13,7 +13,11 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3w" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig index b12af76d96..627e2110af 100644 --- a/configs/iNet_86VS_defconfig +++ b/configs/iNet_86VS_defconfig @@ -11,7 +11,11 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_USB_MUSB_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-86vs" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index ea4756f8f5..e418d8f1ad 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_IB62X0=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ibf-dsp561_defconfig b/configs/ibf-dsp561_defconfig index eb80798a94..e654a4bc36 100644 --- a/configs/ibf-dsp561_defconfig +++ b/configs/ibf-dsp561_defconfig @@ -1,3 +1,4 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_IBF_DSP561=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_LIB_RAND=y diff --git a/configs/icon_defconfig b/configs/icon_defconfig index e4ca30acd4..771a093250 100644 --- a/configs/icon_defconfig +++ b/configs/icon_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_ICON=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index a96b81072a..49d4fa0d20 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_ICONNECT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index 21977c876b..821c6fa342 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -4,4 +4,7 @@ CONFIG_TARGET_IDS8313=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFFF00000" -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Enter password - autoboot in %d seconds...\n" +CONFIG_AUTOBOOT_DELAY_STR="ids" +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/igep0020_defconfig b/configs/igep0020_defconfig index fc8d9c1af7..e45e83c6d3 100644 --- a/configs/igep0020_defconfig +++ b/configs/igep0020_defconfig @@ -3,4 +3,6 @@ CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_IGEP00X0=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_ONENAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/igep0020_nand_defconfig b/configs/igep0020_nand_defconfig index bf3581d955..75fabef0d6 100644 --- a/configs/igep0020_nand_defconfig +++ b/configs/igep0020_nand_defconfig @@ -3,4 +3,6 @@ CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_IGEP00X0=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_NAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/igep0030_defconfig b/configs/igep0030_defconfig index cd9753dfc3..1bb7a6f04d 100644 --- a/configs/igep0030_defconfig +++ b/configs/igep0030_defconfig @@ -3,4 +3,6 @@ CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_IGEP00X0=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_ONENAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/igep0030_nand_defconfig b/configs/igep0030_nand_defconfig index 8bdd1eb145..ed017664e9 100644 --- a/configs/igep0030_nand_defconfig +++ b/configs/igep0030_nand_defconfig @@ -3,4 +3,6 @@ CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_IGEP00X0=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_NAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/igep0032_defconfig b/configs/igep0032_defconfig index ded479ac6f..bfa15d7b47 100644 --- a/configs/igep0032_defconfig +++ b/configs/igep0032_defconfig @@ -3,4 +3,6 @@ CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_IGEP00X0=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0032,BOOT_ONENAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ima3-mx53_defconfig b/configs/ima3-mx53_defconfig index 3190b712e8..ef15127af6 100644 --- a/configs/ima3-mx53_defconfig +++ b/configs/ima3-mx53_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_IMA3_MX53=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/esg/ima3-mx53/imximage.cfg" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/imx27lite_defconfig b/configs/imx27lite_defconfig index b83cd24c80..b02955d6c7 100644 --- a/configs/imx27lite_defconfig +++ b/configs/imx27lite_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_IMX27LITE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/imx31_litekit_defconfig b/configs/imx31_litekit_defconfig index 8373c045a6..b197935bd0 100644 --- a/configs/imx31_litekit_defconfig +++ b/configs/imx31_litekit_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_IMX31_LITEKIT=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/imx31_phycore_defconfig b/configs/imx31_phycore_defconfig index a388ea7153..161a604225 100644 --- a/configs/imx31_phycore_defconfig +++ b/configs/imx31_phycore_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_IMX31_PHYCORE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/imx31_phycore_eet_defconfig b/configs/imx31_phycore_eet_defconfig index b4d37fd061..445c040f28 100644 --- a/configs/imx31_phycore_eet_defconfig +++ b/configs/imx31_phycore_eet_defconfig @@ -1,4 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_IMX31_PHYCORE=y CONFIG_SYS_EXTRA_OPTIONS="IMX31_PHYCORE_EET" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 35aabc8f32..f314059a80 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NETSPACE_V2=y CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/inka4x0_defconfig b/configs/inka4x0_defconfig index 2c3b9e060d..4c1016ac8f 100644 --- a/configs/inka4x0_defconfig +++ b/configs/inka4x0_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_INKA4X0=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index fccbb3f350..369add7f73 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_CM720T=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index f2e1fcb499..aa27cbdd22 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_CM920T=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index 060c18cfe8..8155b67a1e 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_CM926EJ_S=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index dc933c5101..b3b5edf99b 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_CM946ES=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig index 5635cb149d..5ab7c271b0 100644 --- a/configs/integratorcp_cm1136_defconfig +++ b/configs/integratorcp_cm1136_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CM1136=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig index 25041ffea6..d0ed78d3dd 100644 --- a/configs/integratorcp_cm920t_defconfig +++ b/configs/integratorcp_cm920t_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CM920T=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig index 5c823260d4..9aa86029e5 100644 --- a/configs/integratorcp_cm926ejs_defconfig +++ b/configs/integratorcp_cm926ejs_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CM926EJ_S=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig index cd4c94aea6..ef9d7d6c1c 100644 --- a/configs/integratorcp_cm946es_defconfig +++ b/configs/integratorcp_cm946es_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CM946ES=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/intip_defconfig b/configs/intip_defconfig index 476616cd97..898f54489d 100644 --- a/configs/intip_defconfig +++ b/configs/intip_defconfig @@ -2,5 +2,5 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_INTIP=y CONFIG_SYS_EXTRA_OPTIONS="INTIB" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/configs/io64_defconfig b/configs/io64_defconfig index 7f1825adab..52829dabb6 100644 --- a/configs/io64_defconfig +++ b/configs/io64_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_IO64=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/configs/io_defconfig b/configs/io_defconfig index 7713232336..722d95a73a 100644 --- a/configs/io_defconfig +++ b/configs/io_defconfig @@ -1,5 +1,6 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_IO=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_NFS is not set diff --git a/configs/iocon_defconfig b/configs/iocon_defconfig index 95758cf868..89e5cf5410 100644 --- a/configs/iocon_defconfig +++ b/configs/iocon_defconfig @@ -1,5 +1,6 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_IOCON=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_NFS is not set diff --git a/configs/ip04_defconfig b/configs/ip04_defconfig index 22bb8b8d86..0b6de77e82 100644 --- a/configs/ip04_defconfig +++ b/configs/ip04_defconfig @@ -1,5 +1,8 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_IP04=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPI_FLASH=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/ipam390_defconfig b/configs/ipam390_defconfig index 82336772c9..c053b3898f 100644 --- a/configs/ipam390_defconfig +++ b/configs/ipam390_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_IPAM390=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ipek01_defconfig b/configs/ipek01_defconfig index 099bf649ee..c8ddbc5dfc 100644 --- a/configs/ipek01_defconfig +++ b/configs/ipek01_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_IPEK01=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig index 86be75c0d3..4b09a33502 100644 --- a/configs/jesurun_q5_defconfig +++ b/configs/jesurun_q5_defconfig @@ -3,7 +3,13 @@ CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=312 CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,USB_EHCI,MACPWR=SUNXI_GPH(19)" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index dc68c6deb7..7085469bb6 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -3,4 +3,14 @@ CONFIG_TEGRA=y CONFIG_TEGRA124=y CONFIG_TARGET_JETSON_TK1=y CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/jornada_defconfig b/configs/jornada_defconfig index ad1c3382b7..735c75f9a4 100644 --- a/configs/jornada_defconfig +++ b/configs/jornada_defconfig @@ -1,2 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_JORNADA=y +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/jupiter_defconfig b/configs/jupiter_defconfig index 02c63e14e8..a3c259f0a0 100644 --- a/configs/jupiter_defconfig +++ b/configs/jupiter_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_JUPITER=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 8dc8d69846..f42288697b 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_KEYSTONE=y CONFIG_TARGET_K2E_EVM=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 0976598637..297183f921 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_KEYSTONE=y CONFIG_TARGET_K2HK_EVM=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 45c600b4f1..7aa538d791 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_KEYSTONE=y CONFIG_TARGET_K2L_EVM=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/katmai_defconfig b/configs/katmai_defconfig index 7821e19e82..849231492b 100644 --- a/configs/katmai_defconfig +++ b/configs/katmai_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_KATMAI=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/kilauea_defconfig b/configs/kilauea_defconfig index 2ef0f56481..0054cc6db8 100644 --- a/configs/kilauea_defconfig +++ b/configs/kilauea_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_KILAUEA=y CONFIG_SYS_EXTRA_OPTIONS="KILAUEA" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 9768d5aa7b..b903f6ed4d 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 5f932855f4..7fc1112728 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 82b02aed12..a310fb7129 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig index bcc2cc80cf..aa0e0041a4 100644 --- a/configs/kmcoge4_defconfig +++ b/configs/kmcoge4_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_KMP204X=y CONFIG_SYS_EXTRA_OPTIONS="KMCOGE4" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index bd7b8f9a6c..a8b52758c8 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_KM8360=y CONFIG_SYS_EXTRA_OPTIONS="KMCOGE5NE" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 3484e8a708..95c61f1d2c 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index 2b04d33461..3374ab02e5 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_KM8360=y CONFIG_SYS_EXTRA_OPTIONS="KMETER1" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/kmlion1_defconfig b/configs/kmlion1_defconfig index 6fa48a07ee..48fe1888ac 100644 --- a/configs/kmlion1_defconfig +++ b/configs/kmlion1_defconfig @@ -2,5 +2,6 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_KMP204X=y CONFIG_SYS_EXTRA_OPTIONS="KMLION1" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index e40aa3f7a7..158fe39505 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index d24e147ec8..11c53b5701 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_TUXX1=y CONFIG_SYS_EXTRA_OPTIONS="KMOPTI2" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig index a9d23a2f7e..d754ac038c 100644 --- a/configs/kmsugp1_defconfig +++ b/configs/kmsugp1_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_SUGP1" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 78c19fb714..fd4bb9ac76 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_TUXX1=y CONFIG_SYS_EXTRA_OPTIONS="KMSUPX5" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig index 68b5178f00..5f56925e79 100644 --- a/configs/kmsuv31_defconfig +++ b/configs/kmsuv31_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_SUV31" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/kmvect1_defconfig b/configs/kmvect1_defconfig index de740806ca..512d12cc55 100644 --- a/configs/kmvect1_defconfig +++ b/configs/kmvect1_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_SUVD3=y CONFIG_SYS_EXTRA_OPTIONS="KMVECT1" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index 6be722c24a..13c8310b26 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -1,5 +1,20 @@ CONFIG_ARM=y CONFIG_RMOBILE=y CONFIG_TARGET_KOELSCH=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_SPI_FLASH=y CONFIG_SH_SDHI=y diff --git a/configs/kwb_defconfig b/configs/kwb_defconfig index 9b07084da2..5bca8117da 100644 --- a/configs/kwb_defconfig +++ b/configs/kwb_defconfig @@ -2,5 +2,15 @@ CONFIG_ARM=y CONFIG_TARGET_KWB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set # CONFIG_CMD_CRC32 is not set -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig index 91a04377ce..3df79d4ccb 100644 --- a/configs/kzm9g_defconfig +++ b/configs/kzm9g_defconfig @@ -1,4 +1,4 @@ CONFIG_ARM=y CONFIG_RMOBILE=y CONFIG_TARGET_KZM9G=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 6b4184c11a..3805fcb5ce 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -1,5 +1,20 @@ CONFIG_ARM=y CONFIG_RMOBILE=y CONFIG_TARGET_LAGER=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_SPI_FLASH=y CONFIG_SH_SDHI=y diff --git a/configs/lcd4_lwmon5_defconfig b/configs/lcd4_lwmon5_defconfig index 786b458cbf..b911dbd67d 100644 --- a/configs/lcd4_lwmon5_defconfig +++ b/configs/lcd4_lwmon5_defconfig @@ -3,4 +3,4 @@ CONFIG_4xx=y CONFIG_TARGET_LWMON5=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="LCD4_LWMON5" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/lp8x4x_defconfig b/configs/lp8x4x_defconfig index af02d3713a..63bbccaf7c 100644 --- a/configs/lp8x4x_defconfig +++ b/configs/lp8x4x_defconfig @@ -1,3 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_LP8X4X=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 8d78c7f192..8c6a5c44be 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -1,4 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 1d76b65a59..efcef649ff 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -1,4 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index b5b77b9965..d3a12b181b 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 6f1b6021db..045878f9a5 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -1,4 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 6c7ea6f7ff..f28cfb324d 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index e586215516..081e618d57 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -1,4 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index c5372b761a..6a1f7110f4 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -1,4 +1,10 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds" +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_SPI_FLASH=y diff --git a/configs/ls1021aqds_sdcard_defconfig b/configs/ls1021aqds_sdcard_defconfig index d1318348f3..e1b4854681 100644 --- a/configs/ls1021aqds_sdcard_defconfig +++ b/configs/ls1021aqds_sdcard_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 867f3d376a..f51f2fdf63 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -1,4 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index 3b31375501..939be78e4d 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021ATWR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index 4cfda5f91f..8f3461345d 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -1,4 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 1ae0f9c73a..420cfe77bc 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -1,4 +1,10 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr" +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_SPI_FLASH=y diff --git a/configs/ls1021atwr_sdcard_defconfig b/configs/ls1021atwr_sdcard_defconfig index 769f7f5011..cfc7b52440 100644 --- a/configs/ls1021atwr_sdcard_defconfig +++ b/configs/ls1021atwr_sdcard_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021ATWR=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls2085a_emu_D4_defconfig b/configs/ls2085a_emu_D4_defconfig index f0e9c595e1..9c82e17d64 100644 --- a/configs/ls2085a_emu_D4_defconfig +++ b/configs/ls2085a_emu_D4_defconfig @@ -1,4 +1,14 @@ CONFIG_ARM=y CONFIG_TARGET_LS2085A_EMU=y CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4" -CONFIG_CMD_NET=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/ls2085a_emu_defconfig b/configs/ls2085a_emu_defconfig index 27c58a7512..fa4a44e856 100644 --- a/configs/ls2085a_emu_defconfig +++ b/configs/ls2085a_emu_defconfig @@ -1,4 +1,14 @@ CONFIG_ARM=y CONFIG_TARGET_LS2085A_EMU=y CONFIG_SYS_EXTRA_OPTIONS="EMU" -CONFIG_CMD_NET=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/ls2085a_simu_defconfig b/configs/ls2085a_simu_defconfig index b3d861b917..de9776d7ed 100644 --- a/configs/ls2085a_simu_defconfig +++ b/configs/ls2085a_simu_defconfig @@ -1,4 +1,14 @@ CONFIG_ARM=y CONFIG_TARGET_LS2085A_SIMU=y CONFIG_SYS_EXTRA_OPTIONS="SIMU" -CONFIG_CMD_NET=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/ls2085aqds_defconfig b/configs/ls2085aqds_defconfig index 9dacd217aa..fd208b1875 100644 --- a/configs/ls2085aqds_defconfig +++ b/configs/ls2085aqds_defconfig @@ -1,4 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS2085AQDS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls2085aqds_nand_defconfig b/configs/ls2085aqds_nand_defconfig index fb123bdcdf..b9dd651146 100644 --- a/configs/ls2085aqds_nand_defconfig +++ b/configs/ls2085aqds_nand_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS2085AQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls2085ardb_defconfig b/configs/ls2085ardb_defconfig index 0e3c51899b..308e935174 100644 --- a/configs/ls2085ardb_defconfig +++ b/configs/ls2085ardb_defconfig @@ -1,4 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS2085ARDB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls2085ardb_nand_defconfig b/configs/ls2085ardb_nand_defconfig index 02747ae073..853930772a 100644 --- a/configs/ls2085ardb_nand_defconfig +++ b/configs/ls2085ardb_nand_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_TARGET_LS2085ARDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 636040ad4a..a086de8c83 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -2,5 +2,8 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_LSXL=y CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPI_FLASH=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 125fbafe9e..7d48abdf0a 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -2,5 +2,8 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_LSXL=y CONFIG_SYS_EXTRA_OPTIONS="LSXHL" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPI_FLASH=y diff --git a/configs/luan_defconfig b/configs/luan_defconfig index 82c9b3a45f..d42b4a902f 100644 --- a/configs/luan_defconfig +++ b/configs/luan_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_LUAN=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/lwmon5_defconfig b/configs/lwmon5_defconfig index e65a8d524a..0a6da688cb 100644 --- a/configs/lwmon5_defconfig +++ b/configs/lwmon5_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_LWMON5=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig index 28af941aa0..03ced3301d 100644 --- a/configs/m28evk_defconfig +++ b/configs/m28evk_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_M28EVK=y CONFIG_SPL=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/m53evk_defconfig b/configs/m53evk_defconfig index 0a40f18751..b5e72ef11c 100644 --- a/configs/m53evk_defconfig +++ b/configs/m53evk_defconfig @@ -2,5 +2,5 @@ CONFIG_ARM=y CONFIG_TARGET_M53EVK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/denx/m53evk/imximage.cfg" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set diff --git a/configs/magnesium_defconfig b/configs/magnesium_defconfig index 4969603360..2fa658911d 100644 --- a/configs/magnesium_defconfig +++ b/configs/magnesium_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_MAGNESIUM=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/makalu_defconfig b/configs/makalu_defconfig index 094ff47383..ed9b82d503 100644 --- a/configs/makalu_defconfig +++ b/configs/makalu_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_MAKALU=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 29fd977a55..3056c48b97 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -1,3 +1,8 @@ CONFIG_MIPS=y CONFIG_TARGET_MALTA=y -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 293586093d..858a852f23 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -1,4 +1,9 @@ CONFIG_MIPS=y CONFIG_TARGET_MALTA=y CONFIG_SYS_LITTLE_ENDIAN=y -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index cfe6e8e76f..5ea278fee4 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -1,7 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_EMBESTMX6BOARDS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,ENV_IS_IN_SPI_FLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set CONFIG_DM=y +CONFIG_SPI_FLASH=y CONFIG_DM_THERMAL=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 23af99b986..c5b3b67024 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -1,4 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_MAXBCM=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig index 28d19539f9..1d3e978391 100644 --- a/configs/mcx_defconfig +++ b/configs/mcx_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_MCX=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mecp5123_defconfig b/configs/mecp5123_defconfig index 55ac810bf3..1957f0ba84 100644 --- a/configs/mecp5123_defconfig +++ b/configs/mecp5123_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC512X=y CONFIG_TARGET_MECP5123=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index 664b0757b7..bb3354287c 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -3,4 +3,13 @@ CONFIG_TEGRA=y CONFIG_TEGRA20=y CONFIG_TARGET_MEDCOM_WIDE=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-medcom-wide" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index 4db6744288..e4f7cce121 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_MEESC=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig index 0f4dbb00a1..7d1fe7b2ea 100644 --- a/configs/meesc_defconfig +++ b/configs/meesc_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_MEESC=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mgcoge3ne_defconfig b/configs/mgcoge3ne_defconfig index 4acfa5f0e3..7b795f5a22 100644 --- a/configs/mgcoge3ne_defconfig +++ b/configs/mgcoge3ne_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC8260=y CONFIG_TARGET_KM82XX=y CONFIG_SYS_EXTRA_OPTIONS="MGCOGE3NE" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig index 9468b41cc2..cd5f35828b 100644 --- a/configs/mgcoge3un_defconfig +++ b/configs/mgcoge3un_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_MGCOGE3UN" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mgcoge_defconfig b/configs/mgcoge_defconfig index 13d56b900e..1fb8dfd9d2 100644 --- a/configs/mgcoge_defconfig +++ b/configs/mgcoge_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC8260=y CONFIG_TARGET_KM82XX=y CONFIG_SYS_EXTRA_OPTIONS="MGCOGE" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 5740359d20..8355c67c26 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -2,6 +2,7 @@ CONFIG_MICROBLAZE=y CONFIG_TARGET_MICROBLAZE_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic" CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/mimc200_defconfig b/configs/mimc200_defconfig deleted file mode 100644 index 85c646ec16..0000000000 --- a/configs/mimc200_defconfig +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_AVR32=y -CONFIG_TARGET_MIMC200=y -CONFIG_CMD_NET=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 87c99a83d0..e0a9216d89 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -3,11 +3,21 @@ CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="minnowmax" CONFIG_TARGET_MINNOWMAX=y CONFIG_HAVE_INTEL_ME=y -CONFIG_FRAMEBUFFER_SET_VESA_MODE=y -CONFIG_FRAMEBUFFER_VESA_MODE_11A=y CONFIG_SMP=y CONFIG_GENERATE_SFI_TABLE=y CONFIG_CMD_CPU=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y CONFIG_CPU=y +CONFIG_SPI_FLASH=y +CONFIG_VIDEO_VESA=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_11A=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_SYS_VSNPRINTF=y diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig index 7d3d6bb037..a8c497cf5e 100644 --- a/configs/mixtile_loftq_defconfig +++ b/configs/mixtile_loftq_defconfig @@ -6,9 +6,15 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH24" CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI,SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPA(21)" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y CONFIG_AXP221_ALDO1_VOLT=3300 +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig index 1c3897b38c..dc78fa43d1 100644 --- a/configs/mk802_a10s_defconfig +++ b/configs/mk802_a10s_defconfig @@ -5,7 +5,13 @@ CONFIG_DRAM_CLK=432 CONFIG_DRAM_EMR1=0 CONFIG_USB1_VBUS_PIN="PB10" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-mk802" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig index 96252de915..31bde005a0 100644 --- a/configs/mk802_defconfig +++ b/configs/mk802_defconfig @@ -3,7 +3,13 @@ CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN4I=y CONFIG_USB2_VBUS_PIN="PH12" CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig index 1d297acf5c..ffa78910fc 100644 --- a/configs/mk802ii_defconfig +++ b/configs/mk802ii_defconfig @@ -2,7 +2,13 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN4I=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802ii" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/ml507_defconfig b/configs/ml507_defconfig index cbd37b335c..3f66c86067 100644 --- a/configs/ml507_defconfig +++ b/configs/ml507_defconfig @@ -2,3 +2,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_ML507=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/ml507_flash_defconfig b/configs/ml507_flash_defconfig index fba47efa3e..442e0ce1fa 100644 --- a/configs/ml507_flash_defconfig +++ b/configs/ml507_flash_defconfig @@ -2,3 +2,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_ML507=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/motionpro_defconfig b/configs/motionpro_defconfig index 8bc367b7fe..4d3f909b24 100644 --- a/configs/motionpro_defconfig +++ b/configs/motionpro_defconfig @@ -1,4 +1,7 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_MOTIONPRO=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" +CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mpc5121ads_defconfig b/configs/mpc5121ads_defconfig index c9ce78c6ff..e5fe27fd1e 100644 --- a/configs/mpc5121ads_defconfig +++ b/configs/mpc5121ads_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC512X=y CONFIG_TARGET_MPC5121ADS=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mpc5121ads_rev2_defconfig b/configs/mpc5121ads_rev2_defconfig index b9cbb3b517..3562353eaa 100644 --- a/configs/mpc5121ads_rev2_defconfig +++ b/configs/mpc5121ads_rev2_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC512X=y CONFIG_TARGET_MPC5121ADS=y CONFIG_SYS_EXTRA_OPTIONS="MPC5121ADS_REV2" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mpc8308_p1m_defconfig b/configs/mpc8308_p1m_defconfig index f0b2bc47dc..8c67eab3ae 100644 --- a/configs/mpc8308_p1m_defconfig +++ b/configs/mpc8308_p1m_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC8308_P1M=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mpr2_defconfig b/configs/mpr2_defconfig index c8be9872f4..6a832c7027 100644 --- a/configs/mpr2_defconfig +++ b/configs/mpr2_defconfig @@ -1,2 +1,22 @@ CONFIG_SH=y CONFIG_TARGET_MPR2=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/ms7720se_defconfig b/configs/ms7720se_defconfig index 0e3f834442..55d480ac0e 100644 --- a/configs/ms7720se_defconfig +++ b/configs/ms7720se_defconfig @@ -1,2 +1,22 @@ CONFIG_SH=y CONFIG_TARGET_MS7720SE=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/ms7722se_defconfig b/configs/ms7722se_defconfig index 552f44960b..911f3dcebc 100644 --- a/configs/ms7722se_defconfig +++ b/configs/ms7722se_defconfig @@ -1,3 +1,20 @@ CONFIG_SH=y CONFIG_TARGET_MS7722SE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/ms7750se_defconfig b/configs/ms7750se_defconfig index c23e4c9ef1..fb7932a605 100644 --- a/configs/ms7750se_defconfig +++ b/configs/ms7750se_defconfig @@ -1,2 +1,23 @@ CONFIG_SH=y CONFIG_TARGET_MS7750SE=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_MEMORY is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig index 2f078c480b..0a6b7d6149 100644 --- a/configs/mt_ventoux_defconfig +++ b/configs/mt_ventoux_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_MT_VENTOUX=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/munices_defconfig b/configs/munices_defconfig index a64b3e817c..1c0309a50f 100644 --- a/configs/munices_defconfig +++ b/configs/munices_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_MUNICES=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mv88f6281gtw_ge_defconfig b/configs/mv88f6281gtw_ge_defconfig index be9e3a09c5..8988734ef3 100644 --- a/configs/mv88f6281gtw_ge_defconfig +++ b/configs/mv88f6281gtw_ge_defconfig @@ -1,4 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_MV88F6281GTW_GE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index 7103e304cb..9e02334274 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX23_OLINUXINO=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index c386bbac5e..2f4b91b0df 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -1,3 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_MX23EVK=y CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig index cf55b9f598..79edf33df8 100644 --- a/configs/mx25pdk_defconfig +++ b/configs/mx25pdk_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX25PDK=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index 174c0194fb..90007878bb 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX28EVK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE,ENV_IS_IN_MMC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index 0f8867f59b..6d3cbb8cd0 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX28EVK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index 89eda0b290..ee4536dff3 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX28EVK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 19f088c0bf..88bfb437af 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX28EVK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_SPI_FLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx31ads_defconfig b/configs/mx31ads_defconfig index 096028c115..20cadde3fb 100644 --- a/configs/mx31ads_defconfig +++ b/configs/mx31ads_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_MX31ADS=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig index 7f352339ff..dd6a7b9036 100644 --- a/configs/mx31pdk_defconfig +++ b/configs/mx31pdk_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_MX31PDK=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig index 992cd1dc5a..c13e9f22f5 100644 --- a/configs/mx35pdk_defconfig +++ b/configs/mx35pdk_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_MX35PDK=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx51_efikamx_defconfig b/configs/mx51_efikamx_defconfig index 55dcd6747a..9c0deb137f 100644 --- a/configs/mx51_efikamx_defconfig +++ b/configs/mx51_efikamx_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX51_EFIKAMX=y CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_mx.cfg" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx51_efikasb_defconfig b/configs/mx51_efikasb_defconfig index 99586457d4..1bc7c00cb8 100644 --- a/configs/mx51_efikasb_defconfig +++ b/configs/mx51_efikasb_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX51_EFIKAMX=y CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_sb.cfg" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index e208a44610..f2c37436a5 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_MX51EVK=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig index 85fbaf6377..8f233c9f9e 100644 --- a/configs/mx53ard_defconfig +++ b/configs/mx53ard_defconfig @@ -1,5 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_MX53ARD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig index fa07df42dc..958a7d8afb 100644 --- a/configs/mx53evk_defconfig +++ b/configs/mx53evk_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_MX53EVK=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53evk/imximage.cfg" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index e23fce857d..1badd4ea07 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_MX53LOCO=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig index 9707964825..2fdd374116 100644 --- a/configs/mx53smd_defconfig +++ b/configs/mx53smd_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_MX53SMD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53smd/imximage.cfg" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 12899d6a9f..27fe22eb01 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_MX6CUBOXI=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set CONFIG_DM=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig index 4324ccf36d..6c1ba3361d 100644 --- a/configs/mx6dlarm2_defconfig +++ b/configs/mx6dlarm2_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX6QARM2=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,DDR_MB=2048" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig index 76818141c4..4624a09dfe 100644 --- a/configs/mx6dlarm2_lpddr2_defconfig +++ b/configs/mx6dlarm2_lpddr2_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX6QARM2=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,MX6DL_LPDDR2,DDR_MB=512" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx6dlsabreauto_defconfig b/configs/mx6dlsabreauto_defconfig index 7578fc8100..756e5dbff4 100644 --- a/configs/mx6dlsabreauto_defconfig +++ b/configs/mx6dlsabreauto_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX6QSABREAUTO=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx6dlsabresd_defconfig b/configs/mx6dlsabresd_defconfig index 92d77f9e2d..de9999851b 100644 --- a/configs/mx6dlsabresd_defconfig +++ b/configs/mx6dlsabresd_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX6SABRESD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6dlsabresd.cfg,MX6DL" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig index 51ab7e3177..42dbded343 100644 --- a/configs/mx6qarm2_defconfig +++ b/configs/mx6qarm2_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX6QARM2=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,DDR_MB=2048" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig index c590c392fc..5f9105fd9a 100644 --- a/configs/mx6qarm2_lpddr2_defconfig +++ b/configs/mx6qarm2_lpddr2_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX6QARM2=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,MX6DQ_LPDDR2,DDR_MB=512" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx6qsabreauto_defconfig b/configs/mx6qsabreauto_defconfig index 3d584bd5b5..9343bcce5a 100644 --- a/configs/mx6qsabreauto_defconfig +++ b/configs/mx6qsabreauto_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX6QSABREAUTO=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 9ccf097385..427fbee322 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -1,7 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set CONFIG_DM=y +CONFIG_SPI_FLASH=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig index 887a509257..732c1dce61 100644 --- a/configs/mx6qsabresd_defconfig +++ b/configs/mx6qsabresd_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX6SABRESD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg,MX6Q" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig index a9adcdbbdf..d93a40dbe3 100644 --- a/configs/mx6sabresd_spl_defconfig +++ b/configs/mx6sabresd_spl_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_MX6SABRESD=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6Q" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index dd623dd113..dcc3296a3b 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_TARGET_MX6SLEVK=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_DM=y +CONFIG_SPI_FLASH=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index 237c5b537f..964a147cac 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_TARGET_MX6SLEVK=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL,SYS_BOOT_SPINOR" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_DM=y +CONFIG_SPI_FLASH=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 058e3f8552..e355ba5108 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -1,4 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_MX6SXSABRESD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg,MX6SX" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig index 0e3159e1b9..df3489409c 100644 --- a/configs/mx6sxsabresd_spl_defconfig +++ b/configs/mx6sxsabresd_spl_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_MX6SXSABRESD=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6SX" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 17a64c7985..47e59114c2 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NAS220=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/neo_defconfig b/configs/neo_defconfig index 094a53d4f5..77eefe912c 100644 --- a/configs/neo_defconfig +++ b/configs/neo_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_NEO=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_NFS is not set diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index aa4bdd67f8..09df520cef 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NET2BIG_V2=y CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index b6f6fa586f..862a9ae6bb 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NETSPACE_V2=y CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index dcb8c326ac..1829995989 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NETSPACE_V2=y CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 50c5f97c85..35cb154e72 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NETSPACE_V2=y CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index a6495e3be9..a13452befa 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NETSPACE_V2=y CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/nhk8815_defconfig b/configs/nhk8815_defconfig index 3d460433b7..f9fac6f05d 100644 --- a/configs/nhk8815_defconfig +++ b/configs/nhk8815_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_NOMADIK=y CONFIG_NOMADIK_NHK8815=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/nhk8815_onenand_defconfig b/configs/nhk8815_onenand_defconfig index 7cc957f8eb..c01559d8cd 100644 --- a/configs/nhk8815_onenand_defconfig +++ b/configs/nhk8815_onenand_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_NOMADIK=y CONFIG_NOMADIK_NHK8815=y CONFIG_SYS_EXTRA_OPTIONS="BOOT_ONENAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig index 4ff0611063..573a0847b2 100644 --- a/configs/nios2-generic_defconfig +++ b/configs/nios2-generic_defconfig @@ -1,3 +1,9 @@ CONFIG_NIOS2=y CONFIG_TARGET_NIOS2_GENERIC=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index ec0e346832..6cbc0e3089 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 838a43e30b..055266ca36 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index a739e224e8..7b5ccc7ab9 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index b4b0524bc2..5cc245ed01 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 118f605b53..b613a491c2 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 3e70de9330..b7cd09abcc 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index e03f586880..c40dadfde5 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -1,3 +1,12 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_NOKIA_RX51=y +CONFIG_AUTOBOOT_KEYED=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/novena_defconfig b/configs/novena_defconfig index ccc00553b4..aca98b7245 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -2,5 +2,5 @@ CONFIG_ARM=y CONFIG_TARGET_KOSAGI_NOVENA=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 92acab293b..79b74a7ba3 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -3,6 +3,20 @@ CONFIG_TEGRA=y CONFIG_TEGRA124=y CONFIG_TARGET_NYAN_BIG=y CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_CMD_CROS_EC=y +CONFIG_CROS_EC=y +CONFIG_CROS_EC_SPI=y +CONFIG_CROS_EC_KEYB=y CONFIG_DISPLAY_PORT=y CONFIG_VIDEO_TEGRA124=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/ocotea_defconfig b/configs/ocotea_defconfig index 864aefb57e..34518cd457 100644 --- a/configs/ocotea_defconfig +++ b/configs/ocotea_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_OCOTEA=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index c9c48491ba..2b960d55a1 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_ODROID_XU3=y -# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3" -CONFIG_CMD_NET=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index 5efcdf592e..3104f883e9 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -1,17 +1,23 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_ODROID=y -# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y CONFIG_DM_I2C=y CONFIG_DM_I2C_COMPAT=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX77686=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_MAX77686=y +CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_ERRNO_STR=y diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index e5b1f3a9bb..dde076aa21 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -3,5 +3,5 @@ CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_BEAGLE=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="NAND" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index d48cfc210f..65b6f6a9c6 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_EVM=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/omap3_evm_quick_mmc_defconfig b/configs/omap3_evm_quick_mmc_defconfig index 7d0a973266..527b465aa8 100644 --- a/configs/omap3_evm_quick_mmc_defconfig +++ b/configs/omap3_evm_quick_mmc_defconfig @@ -2,4 +2,24 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_EVM_QUICK_MMC=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_MEMORY is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/omap3_evm_quick_nand_defconfig b/configs/omap3_evm_quick_nand_defconfig index 6dec5cd206..e3278b5f2c 100644 --- a/configs/omap3_evm_quick_nand_defconfig +++ b/configs/omap3_evm_quick_nand_defconfig @@ -2,4 +2,24 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_EVM_QUICK_NAND=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_MEMORY is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig index 3d596a7899..f22b50edfc 100644 --- a/configs/omap3_ha_defconfig +++ b/configs/omap3_ha_defconfig @@ -3,4 +3,8 @@ CONFIG_OMAP34XX=y CONFIG_TARGET_TAO3530=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BOARD_OMAP3_HA" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index c9fdda804d..b11d2e42da 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -1,5 +1,7 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_LOGIC=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set diff --git a/configs/omap3_mvblx_defconfig b/configs/omap3_mvblx_defconfig index ec4924b82a..415b02ebd8 100644 --- a/configs/omap3_mvblx_defconfig +++ b/configs/omap3_mvblx_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_MVBLX=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_STOP_STR="S" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/omap3_overo_defconfig b/configs/omap3_overo_defconfig index 9416bceb1e..8d5559049a 100644 --- a/configs/omap3_overo_defconfig +++ b/configs/omap3_overo_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_OVERO=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/omap3_pandora_defconfig b/configs/omap3_pandora_defconfig index bf285378a3..f18a520ad2 100644 --- a/configs/omap3_pandora_defconfig +++ b/configs/omap3_pandora_defconfig @@ -1,3 +1,10 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_PANDORA=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/omap3_sdp3430_defconfig b/configs/omap3_sdp3430_defconfig index 846fd1a370..df9e709562 100644 --- a/configs/omap3_sdp3430_defconfig +++ b/configs/omap3_sdp3430_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_SDP3430=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/omap3_zoom1_defconfig b/configs/omap3_zoom1_defconfig index ba05d08456..9efd6de5be 100644 --- a/configs/omap3_zoom1_defconfig +++ b/configs/omap3_zoom1_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_ZOOM1=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index ec6a63af23..1be285d9e6 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_OMAP44XX=y CONFIG_TARGET_OMAP4_PANDA=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index 059813657e..b369d1db9d 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -2,3 +2,8 @@ CONFIG_ARM=y CONFIG_OMAP44XX=y CONFIG_TARGET_OMAP4_SDP4430=y CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index d2ad4806bd..15221ad2ee 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_OMAP54XX=y CONFIG_TARGET_OMAP5_UEVM=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index e4b7e13551..a49be95c0d 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_OMAPL138_LCDK=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index a620e61fcd..16861397c3 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_OPENRD=y CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 4a49663a8f..c34231560c 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_OPENRD=y CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index a81b382d49..530ba4d10c 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_OPENRD=y CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/openrisc-generic_defconfig b/configs/openrisc-generic_defconfig index fb4024ae66..54cd8327ea 100644 --- a/configs/openrisc-generic_defconfig +++ b/configs/openrisc-generic_defconfig @@ -1,3 +1,5 @@ CONFIG_OPENRISC=y CONFIG_TARGET_OPENRISC_GENERIC=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 3c59b9b07a..696197827f 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -3,5 +3,13 @@ CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_ORIGEN=y CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen" CONFIG_SPL=y -CONFIG_CMD_SETEXPR=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig index 20f64bb13d..ea789345ff 100644 --- a/configs/ot1200_defconfig +++ b/configs/ot1200_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_OT1200=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/bachmann/ot1200/mx6q_4x_mt41j128.cfg,MX6Q" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig index 810dff8486..3c7346b5ce 100644 --- a/configs/ot1200_spl_defconfig +++ b/configs/ot1200_spl_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_OT1200=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/otc570_dataflash_defconfig b/configs/otc570_dataflash_defconfig index ffa756c844..c5ff59a5a2 100644 --- a/configs/otc570_dataflash_defconfig +++ b/configs/otc570_dataflash_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_OTC570=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/otc570_defconfig b/configs/otc570_defconfig index e1f666bd6f..8cc55eea8c 100644 --- a/configs/otc570_defconfig +++ b/configs/otc570_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_OTC570=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/p3p440_defconfig b/configs/p3p440_defconfig index 2b1a02e331..84e683b083 100644 --- a/configs/p3p440_defconfig +++ b/configs/p3p440_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_P3P440=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/palmld_defconfig b/configs/palmld_defconfig index 599acc357f..8bf6c53cd6 100644 --- a/configs/palmld_defconfig +++ b/configs/palmld_defconfig @@ -1,2 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_PALMLD=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/palmtc_defconfig b/configs/palmtc_defconfig index 91cb76d9e4..4042466220 100644 --- a/configs/palmtc_defconfig +++ b/configs/palmtc_defconfig @@ -1,2 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_PALMTC=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/palmtreo680_defconfig b/configs/palmtreo680_defconfig index f30d2b76e6..b56191d876 100644 --- a/configs/palmtreo680_defconfig +++ b/configs/palmtreo680_defconfig @@ -1,3 +1,12 @@ CONFIG_ARM=y CONFIG_TARGET_PALMTREO680=y CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index 3a72b31880..60fb2d6b2b 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -3,4 +3,13 @@ CONFIG_TEGRA=y CONFIG_TEGRA20=y CONFIG_TARGET_PAZ00=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-paz00" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/pb1000_defconfig b/configs/pb1000_defconfig index f1fdf7cbae..72756a74fa 100644 --- a/configs/pb1000_defconfig +++ b/configs/pb1000_defconfig @@ -1,4 +1,12 @@ CONFIG_MIPS=y CONFIG_TARGET_PB1X00=y CONFIG_SYS_EXTRA_OPTIONS="PB1000" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/pcm030_LOWBOOT_defconfig b/configs/pcm030_LOWBOOT_defconfig index 5ec6370a32..42389bb248 100644 --- a/configs/pcm030_LOWBOOT_defconfig +++ b/configs/pcm030_LOWBOOT_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_PCM030=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFF000000" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/pcm030_defconfig b/configs/pcm030_defconfig index da0cb5fc70..df9309e191 100644 --- a/configs/pcm030_defconfig +++ b/configs/pcm030_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_PCM030=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig index 1ea9333cce..2f1022cf89 100644 --- a/configs/pcm051_rev1_defconfig +++ b/configs/pcm051_rev1_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_PCM051=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="REV1" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index a0a32f6f7c..61d94b8d41 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_PCM051=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="REV3" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/pcs440ep_defconfig b/configs/pcs440ep_defconfig index 593766ef5b..b01f63a7be 100644 --- a/configs/pcs440ep_defconfig +++ b/configs/pcs440ep_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_PCS440EP=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/pdm360ng_defconfig b/configs/pdm360ng_defconfig index ca83cc0bdf..3997f593c5 100644 --- a/configs/pdm360ng_defconfig +++ b/configs/pdm360ng_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC512X=y CONFIG_TARGET_PDM360NG=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 88f5e97366..c17fc73253 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -3,8 +3,12 @@ CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_PEACH_PI=y CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi" CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y CONFIG_CMD_CROS_EC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_CROS_EC_KEYB=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index e6b5bce76a..8f217221a6 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -3,8 +3,12 @@ CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_PEACH_PIT=y CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit" CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y CONFIG_CMD_CROS_EC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_CROS_EC_KEYB=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig index 72ccb3e1f9..38add540c5 100644 --- a/configs/pengwyn_defconfig +++ b/configs/pengwyn_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_PENGWYN=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig index c4c6257480..eb1b6cf297 100644 --- a/configs/pepper_defconfig +++ b/configs/pepper_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_PEPPER=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 82ce8c79b7..650201a17d 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -1,38 +1,29 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y -CONFIG_SPL_DM=y CONFIG_MACH_PH1_LD4=y CONFIG_PFC_MICRO_SUPPORT_CARD=y -CONFIG_NET=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_HUSH_PARSER=y -CONFIG_CMD_BDI=y -CONFIG_CMD_CONSOLE=y -CONFIG_CMD_BOOTD=y -CONFIG_CMD_RUN=y -CONFIG_CMD_IMI=y -CONFIG_CMD_IMLS=y -CONFIG_CMD_EDITENV=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_MEMORY=y -CONFIG_CMD_LOADB=y -CONFIG_CMD_LOADS=y -CONFIG_CMD_FLASH=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y -CONFIG_CMD_ECHO=y -CONFIG_CMD_ITEST=y -CONFIG_CMD_SOURCE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y -CONFIG_CMD_NFS=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y +# CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 671d9cc46d..7d8d9cc61a 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -1,37 +1,28 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y -CONFIG_SPL_DM=y CONFIG_PFC_MICRO_SUPPORT_CARD=y -CONFIG_NET=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_HUSH_PARSER=y -CONFIG_CMD_BDI=y -CONFIG_CMD_CONSOLE=y -CONFIG_CMD_BOOTD=y -CONFIG_CMD_RUN=y -CONFIG_CMD_IMI=y -CONFIG_CMD_IMLS=y -CONFIG_CMD_EDITENV=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_MEMORY=y -CONFIG_CMD_LOADB=y -CONFIG_CMD_LOADS=y -CONFIG_CMD_FLASH=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y -CONFIG_CMD_ECHO=y -CONFIG_CMD_ITEST=y -CONFIG_CMD_SOURCE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y -CONFIG_CMD_NFS=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y +# CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 3e763dc5ab..90c44ac857 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -1,38 +1,29 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y -CONFIG_SPL_DM=y CONFIG_MACH_PH1_SLD8=y CONFIG_PFC_MICRO_SUPPORT_CARD=y -CONFIG_NET=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_HUSH_PARSER=y -CONFIG_CMD_BDI=y -CONFIG_CMD_CONSOLE=y -CONFIG_CMD_BOOTD=y -CONFIG_CMD_RUN=y -CONFIG_CMD_IMI=y -CONFIG_CMD_IMLS=y -CONFIG_CMD_EDITENV=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_MEMORY=y -CONFIG_CMD_LOADB=y -CONFIG_CMD_LOADS=y -CONFIG_CMD_FLASH=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y -CONFIG_CMD_ECHO=y -CONFIG_CMD_ITEST=y -CONFIG_CMD_SOURCE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y -CONFIG_CMD_NFS=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y +# CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig index 672ea2896f..3484c4628f 100644 --- a/configs/platinum_picon_defconfig +++ b/configs/platinum_picon_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_PLATINUM_PICON=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6DL" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig index 39236f1270..6a2cacf61e 100644 --- a/configs/platinum_titanium_defconfig +++ b/configs/platinum_titanium_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_PLATINUM_TITANIUM=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index 1a9fa476fd..8d96e33df9 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -3,4 +3,13 @@ CONFIG_TEGRA=y CONFIG_TEGRA20=y CONFIG_TARGET_PLUTUX=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-plutux" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index 3393fbac27..2c842b4beb 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_PM9261=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index c6398f57d7..a065ce033d 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_PM9263=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 5227bd2074..bbaeae885a 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -2,4 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_PM9G45=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G45" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 11af9cf925..f21237fa48 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_POGO_E02=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/polaris_defconfig b/configs/polaris_defconfig index 703c48b7df..e2095669ea 100644 --- a/configs/polaris_defconfig +++ b/configs/polaris_defconfig @@ -1,4 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_TRIZEPSIV=y CONFIG_SYS_EXTRA_OPTIONS="POLARIS" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/porter_defconfig b/configs/porter_defconfig index d545b53c5d..15f3434de8 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -1,5 +1,20 @@ CONFIG_ARM=y CONFIG_RMOBILE=y CONFIG_TARGET_PORTER=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_SPI_FLASH=y CONFIG_SH_SDHI=y diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig index 37ced5a7b6..3ff9ebb173 100644 --- a/configs/portl2_defconfig +++ b/configs/portl2_defconfig @@ -2,5 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_PORTL2" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/portuxg20_defconfig b/configs/portuxg20_defconfig index aa44a80690..1e8344f00a 100644 --- a/configs/portuxg20_defconfig +++ b/configs/portuxg20_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_STAMP9G20=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,PORTUXG20" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/pr1_defconfig b/configs/pr1_defconfig index f85cc7746b..b06babccc8 100644 --- a/configs/pr1_defconfig +++ b/configs/pr1_defconfig @@ -1,4 +1,8 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_PR1=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y +CONFIG_LIB_RAND=y diff --git a/configs/pxa255_idp_defconfig b/configs/pxa255_idp_defconfig index ad9bd4cc1d..c7be4e9b33 100644 --- a/configs/pxa255_idp_defconfig +++ b/configs/pxa255_idp_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_PXA255_IDP=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index e65dff597d..0bb42ff4f2 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -1,4 +1,10 @@ CONFIG_ARM=y CONFIG_TARGET_PXM2=y CONFIG_SPL=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" +CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 3f58564739..27daa62338 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_QEMU_PPCE500=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig new file mode 100644 index 0000000000..5639cc5b15 --- /dev/null +++ b/configs/qemu-x86_defconfig @@ -0,0 +1,17 @@ +CONFIG_X86=y +CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx" +CONFIG_GENERATE_PIRQ_TABLE=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_CMD_BOOTSTAGE=y +CONFIG_OF_CONTROL=y +CONFIG_SPI_FLASH=y +CONFIG_VIDEO_VESA=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_111=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_SYS_VSNPRINTF=y diff --git a/configs/qemu_mips64_defconfig b/configs/qemu_mips64_defconfig index a96e3f7a75..4187430f4a 100644 --- a/configs/qemu_mips64_defconfig +++ b/configs/qemu_mips64_defconfig @@ -1,4 +1,7 @@ CONFIG_MIPS=y CONFIG_TARGET_QEMU_MIPS=y CONFIG_CPU_MIPS64_R1=y -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/qemu_mips64el_defconfig b/configs/qemu_mips64el_defconfig index 94c0610a14..c8bcbb7946 100644 --- a/configs/qemu_mips64el_defconfig +++ b/configs/qemu_mips64el_defconfig @@ -2,4 +2,7 @@ CONFIG_MIPS=y CONFIG_TARGET_QEMU_MIPS=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_CPU_MIPS64_R1=y -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/qemu_mips_defconfig b/configs/qemu_mips_defconfig index 446d87db1c..337ecea911 100644 --- a/configs/qemu_mips_defconfig +++ b/configs/qemu_mips_defconfig @@ -1,3 +1,6 @@ CONFIG_MIPS=y CONFIG_TARGET_QEMU_MIPS=y -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/qemu_mipsel_defconfig b/configs/qemu_mipsel_defconfig index e0b3990377..bfb3bcc94f 100644 --- a/configs/qemu_mipsel_defconfig +++ b/configs/qemu_mipsel_defconfig @@ -1,4 +1,7 @@ CONFIG_MIPS=y CONFIG_TARGET_QEMU_MIPS=y CONFIG_SYS_LITTLE_ENDIAN=y -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/qong_defconfig b/configs/qong_defconfig index 233b0462f4..fddd836318 100644 --- a/configs/qong_defconfig +++ b/configs/qong_defconfig @@ -1,4 +1,2 @@ CONFIG_ARM=y CONFIG_TARGET_QONG=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/r0p7734_defconfig b/configs/r0p7734_defconfig index caf0cb5129..d8a15ac01c 100644 --- a/configs/r0p7734_defconfig +++ b/configs/r0p7734_defconfig @@ -1,3 +1,20 @@ CONFIG_SH=y CONFIG_TARGET_R0P7734=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index 6d37e26b7a..cca0156449 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -1,3 +1,4 @@ CONFIG_SH=y CONFIG_TARGET_R2DPLUS=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index 49ba7e1a79..ac7928dbf1 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -4,7 +4,13 @@ CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=384 CONFIG_USB1_VBUS_PIN="PG13" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-r7-tv-dongle" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/r7780mp_defconfig b/configs/r7780mp_defconfig index f32dfcb161..180b9e9fa2 100644 --- a/configs/r7780mp_defconfig +++ b/configs/r7780mp_defconfig @@ -1,3 +1,20 @@ CONFIG_SH=y CONFIG_TARGET_R7780MP=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/rainier_defconfig b/configs/rainier_defconfig index e84b349e8a..1713592468 100644 --- a/configs/rainier_defconfig +++ b/configs/rainier_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_SEQUOIA=y CONFIG_SYS_EXTRA_OPTIONS="RAINIER" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/rainier_ramboot_defconfig b/configs/rainier_ramboot_defconfig index cca296e347..ba22d9de60 100644 --- a/configs/rainier_ramboot_defconfig +++ b/configs/rainier_ramboot_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_SEQUOIA=y CONFIG_SYS_EXTRA_OPTIONS="RAINIER,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig new file mode 100644 index 0000000000..2b126acbc6 --- /dev/null +++ b/configs/rastaban_defconfig @@ -0,0 +1,10 @@ +CONFIG_ARM=y +CONFIG_TARGET_RASTABAN=y +CONFIG_SPL=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" +CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/rd6281a_defconfig b/configs/rd6281a_defconfig index 1a9fcd34a8..8fe8594da1 100644 --- a/configs/rd6281a_defconfig +++ b/configs/rd6281a_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_RD6281A=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/redwood_defconfig b/configs/redwood_defconfig index 97252c4aee..ad87d0eb4a 100644 --- a/configs/redwood_defconfig +++ b/configs/redwood_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_REDWOOD=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 104b3e61ba..fd18e2de95 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -1,7 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_EMBESTMX6BOARDS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024,ENV_IS_IN_MMC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set CONFIG_DM=y +CONFIG_SPI_FLASH=y CONFIG_DM_THERMAL=y diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig index b72d3a52a0..139189dd03 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_BCM283X=y CONFIG_TARGET_RPI_2=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_PHYS_TO_BUS=y diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig index fc1aef3b2b..db8da684ce 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_BCM283X=y CONFIG_TARGET_RPI=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_PHYS_TO_BUS=y diff --git a/configs/rsk7203_defconfig b/configs/rsk7203_defconfig index c85ebba7bf..61341723b3 100644 --- a/configs/rsk7203_defconfig +++ b/configs/rsk7203_defconfig @@ -1,3 +1,20 @@ CONFIG_SH=y CONFIG_TARGET_RSK7203=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/rsk7264_defconfig b/configs/rsk7264_defconfig index 1bf5d06eaf..272bd863e8 100644 --- a/configs/rsk7264_defconfig +++ b/configs/rsk7264_defconfig @@ -1,3 +1,4 @@ CONFIG_SH=y CONFIG_TARGET_RSK7264=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/rsk7269_defconfig b/configs/rsk7269_defconfig index 6ddd09924c..41e70a5c58 100644 --- a/configs/rsk7269_defconfig +++ b/configs/rsk7269_defconfig @@ -1,3 +1,4 @@ CONFIG_SH=y CONFIG_TARGET_RSK7269=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 45ed12c745..da9dfe3fd2 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -1,4 +1,10 @@ CONFIG_ARM=y CONFIG_TARGET_RUT=y CONFIG_SPL=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" +CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 618e590802..7e03b9d946 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -2,3 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_S5PC1XX=y CONFIG_TARGET_S5P_GONI=y CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index 633698edca..21a470873a 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -2,5 +2,13 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_S5PC210_UNIVERSAL=y CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210" -CONFIG_CMD_SETEXPR=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 5a39b2ea35..36f8254893 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -3,5 +3,8 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_SAMA5D3_XPLAINED=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 59d9e21aec..2de83d4114 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -3,5 +3,8 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_SAMA5D3_XPLAINED=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index fd80a644cf..e953d0a959 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -3,5 +3,7 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_SAMA5D3XEK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SPI_FLASH=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 9157ead200..832b9ebb89 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -3,5 +3,7 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_SAMA5D3XEK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SPI_FLASH=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index da1f3c1c93..bcfc65baf5 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -3,5 +3,7 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_SAMA5D3XEK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SPI_FLASH=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index f5a344ca66..42d302cfd1 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -3,5 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_SAMA5D4_XPLAINED=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SPI_FLASH=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 0e04af92dc..d27f572a8b 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -3,5 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_SAMA5D4_XPLAINED=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SPI_FLASH=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index a8cabb7401..e5d026a33f 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -3,5 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_SAMA5D4_XPLAINED=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SPI_FLASH=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 84c64a95ba..82fa9d46bb 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -3,5 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_SAMA5D4EK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SPI_FLASH=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 0782baf464..a333e06507 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -3,5 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_SAMA5D4EK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SPI_FLASH=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index b5a3eb589a..fc6dbb0b25 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -3,5 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_SAMA5D4EK=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SPI_FLASH=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 345b701f14..598519dbb2 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -1,27 +1,28 @@ -CONFIG_DM_USB=y -CONFIG_NETDEVICES=y -CONFIG_DM_ETH=y CONFIG_PCI=y -CONFIG_SYS_VSNPRINTF=y CONFIG_DEFAULT_DEVICE_TREE="sandbox" -CONFIG_BOOTSTAGE=y -CONFIG_BOOTSTAGE_REPORT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_SOUND=y +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_OF_HOSTFILE=y CONFIG_DM_PCI=y CONFIG_PCI_SANDBOX=y +CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SANDBOX=y CONFIG_CMD_CROS_EC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SANDBOX=y +CONFIG_DM_ETH=y CONFIG_CROS_EC_KEYB=y +CONFIG_SANDBOX_SERIAL=y CONFIG_TPM_TIS_SANDBOX=y CONFIG_SYS_I2C_SANDBOX=y CONFIG_SANDBOX_SPI=y @@ -33,9 +34,11 @@ CONFIG_DM_REGULATOR_SANDBOX=y CONFIG_SOUND=y CONFIG_SOUND_SANDBOX=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EMUL=y CONFIG_USB_STORAGE=y CONFIG_DM_RTC=y +CONFIG_SYS_VSNPRINTF=y CONFIG_ERRNO_STR=y CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y diff --git a/configs/sansa_fuze_plus_defconfig b/configs/sansa_fuze_plus_defconfig index e1aae9c700..840f9d446e 100644 --- a/configs/sansa_fuze_plus_defconfig +++ b/configs/sansa_fuze_plus_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SANSA_FUZE_PLUS=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc405_defconfig b/configs/sbc405_defconfig index 7324f22c48..0bc0ab229d 100644 --- a/configs/sbc405_defconfig +++ b/configs/sbc405_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_SBC405=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8349_PCI_33_defconfig b/configs/sbc8349_PCI_33_defconfig index 46218f25ef..c03a8072e6 100644 --- a/configs/sbc8349_PCI_33_defconfig +++ b/configs/sbc8349_PCI_33_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_SBC8349=y CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_33M" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8349_PCI_66_defconfig b/configs/sbc8349_PCI_66_defconfig index 496b6496e6..030c2d6216 100644 --- a/configs/sbc8349_PCI_66_defconfig +++ b/configs/sbc8349_PCI_66_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_SBC8349=y CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_66M" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8349_defconfig b/configs/sbc8349_defconfig index fe59219403..01392aaed2 100644 --- a/configs/sbc8349_defconfig +++ b/configs/sbc8349_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_SBC8349=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8548_PCI_33_PCIE_defconfig b/configs/sbc8548_PCI_33_PCIE_defconfig index a355db80de..b6e8766107 100644 --- a/configs/sbc8548_PCI_33_PCIE_defconfig +++ b/configs/sbc8548_PCI_33_PCIE_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_SBC8548=y CONFIG_SYS_EXTRA_OPTIONS="PCI,33,PCIE" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8548_PCI_33_defconfig b/configs/sbc8548_PCI_33_defconfig index b007ab7a87..f3c4ced84a 100644 --- a/configs/sbc8548_PCI_33_defconfig +++ b/configs/sbc8548_PCI_33_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_SBC8548=y CONFIG_SYS_EXTRA_OPTIONS="PCI,33" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8548_PCI_66_PCIE_defconfig b/configs/sbc8548_PCI_66_PCIE_defconfig index e9c9cdfdbf..bb0ad95907 100644 --- a/configs/sbc8548_PCI_66_PCIE_defconfig +++ b/configs/sbc8548_PCI_66_PCIE_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_SBC8548=y CONFIG_SYS_EXTRA_OPTIONS="PCI,66,PCIE" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8548_PCI_66_defconfig b/configs/sbc8548_PCI_66_defconfig index eca365ef30..d601416403 100644 --- a/configs/sbc8548_PCI_66_defconfig +++ b/configs/sbc8548_PCI_66_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_SBC8548=y CONFIG_SYS_EXTRA_OPTIONS="PCI,66" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8548_defconfig b/configs/sbc8548_defconfig index 2c609b4735..3e3b50786c 100644 --- a/configs/sbc8548_defconfig +++ b/configs/sbc8548_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_SBC8548=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8641d_defconfig b/configs/sbc8641d_defconfig index af43b5b5e2..b67c7c0805 100644 --- a/configs/sbc8641d_defconfig +++ b/configs/sbc8641d_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC86xx=y CONFIG_TARGET_SBC8641D=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/sc_sps_1_defconfig b/configs/sc_sps_1_defconfig index d4e72f77cb..468113dc30 100644 --- a/configs/sc_sps_1_defconfig +++ b/configs/sc_sps_1_defconfig @@ -1,5 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_SC_SPS_1=y CONFIG_SPL=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set diff --git a/configs/scb9328_defconfig b/configs/scb9328_defconfig index 5ae7515b12..3104586cf6 100644 --- a/configs/scb9328_defconfig +++ b/configs/scb9328_defconfig @@ -1,3 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SCB9328=y -CONFIG_CMD_NET=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index 9c5f2bc1ef..942f17eb54 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -3,4 +3,13 @@ CONFIG_TEGRA=y CONFIG_TEGRA20=y CONFIG_TARGET_SEABOARD=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig index f9d7ee9549..0095cebb6f 100644 --- a/configs/secomx6quq7_defconfig +++ b/configs/secomx6quq7_defconfig @@ -5,5 +5,5 @@ CONFIG_SECOMX6_UQ7=y CONFIG_SECOMX6Q=y CONFIG_SECOMX6_2GB=y CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set diff --git a/configs/sequoia_defconfig b/configs/sequoia_defconfig index 2ea6c784da..bbaec6158d 100644 --- a/configs/sequoia_defconfig +++ b/configs/sequoia_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_SEQUOIA=y CONFIG_SYS_EXTRA_OPTIONS="SEQUOIA" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/sequoia_ramboot_defconfig b/configs/sequoia_ramboot_defconfig index 4522287feb..5b2c6f4ce6 100644 --- a/configs/sequoia_ramboot_defconfig +++ b/configs/sequoia_ramboot_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_SEQUOIA=y CONFIG_SYS_EXTRA_OPTIONS="SEQUOIA,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig index bbf806d521..b748e375b7 100644 --- a/configs/sh7752evb_defconfig +++ b/configs/sh7752evb_defconfig @@ -1,4 +1,21 @@ CONFIG_SH=y CONFIG_SH_32BIT=y CONFIG_TARGET_SH7752EVB=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_SPI_FLASH=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig index 536cc7114f..7bac054902 100644 --- a/configs/sh7753evb_defconfig +++ b/configs/sh7753evb_defconfig @@ -1,3 +1,20 @@ CONFIG_SH=y CONFIG_TARGET_SH7753EVB=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_SPI_FLASH=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig index 138b7b93cc..1a253dc4c6 100644 --- a/configs/sh7757lcr_defconfig +++ b/configs/sh7757lcr_defconfig @@ -1,4 +1,21 @@ CONFIG_SH=y CONFIG_SH_32BIT=y CONFIG_TARGET_SH7757LCR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_SPI_FLASH=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7763rdp_defconfig b/configs/sh7763rdp_defconfig index 0d65b16bdf..ff845160b2 100644 --- a/configs/sh7763rdp_defconfig +++ b/configs/sh7763rdp_defconfig @@ -1,3 +1,20 @@ CONFIG_SH=y CONFIG_TARGET_SH7763RDP=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7785lcr_32bit_defconfig b/configs/sh7785lcr_32bit_defconfig index 09e85a65c8..611ee18128 100644 --- a/configs/sh7785lcr_32bit_defconfig +++ b/configs/sh7785lcr_32bit_defconfig @@ -1,4 +1,20 @@ CONFIG_SH=y CONFIG_SH_32BIT=y CONFIG_TARGET_SH7785LCR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7785lcr_defconfig b/configs/sh7785lcr_defconfig index a48a87180a..bc27765280 100644 --- a/configs/sh7785lcr_defconfig +++ b/configs/sh7785lcr_defconfig @@ -1,3 +1,19 @@ CONFIG_SH=y CONFIG_TARGET_SH7785LCR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 7a0fb10acc..54e2ad721b 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_SHEEVAPLUG=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/shmin_defconfig b/configs/shmin_defconfig index 60725fcd65..8240aad12d 100644 --- a/configs/shmin_defconfig +++ b/configs/shmin_defconfig @@ -1,3 +1,20 @@ CONFIG_SH=y CONFIG_TARGET_SHMIN=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 28ca83dd21..20c85fd6e6 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -1,5 +1,20 @@ CONFIG_ARM=y CONFIG_RMOBILE=y CONFIG_TARGET_SILK=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_SPI_FLASH=y CONFIG_SH_SDHI=y diff --git a/configs/smdk2410_defconfig b/configs/smdk2410_defconfig index 846ac8eb48..74bb9e3a66 100644 --- a/configs/smdk2410_defconfig +++ b/configs/smdk2410_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_SMDK2410=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index 0602fdecba..8412d6fcf7 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -3,10 +3,14 @@ CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_SMDK5250=y CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250" CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_SOUND=y +CONFIG_SPI_FLASH=y CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_SAMSUNG=y CONFIG_SOUND_MAX98095=y CONFIG_SOUND_WM8994=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 890052553d..a96b3683c6 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -3,4 +3,8 @@ CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_SMDK5420=y CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420" CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index bc170090f7..6c8359e9f5 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_S5PC1XX=y CONFIG_TARGET_SMDKC100=y CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig index 1479145b03..39dd5be6e0 100644 --- a/configs/smdkv310_defconfig +++ b/configs/smdkv310_defconfig @@ -3,5 +3,10 @@ CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_SMDKV310=y CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310" CONFIG_SPL=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig index 942a73f2ac..d319a4f671 100644 --- a/configs/snapper9260_defconfig +++ b/configs/snapper9260_defconfig @@ -2,4 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_SNAPPER9260=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig index 9e814e4398..def06f1719 100644 --- a/configs/snapper9g20_defconfig +++ b/configs/snapper9g20_defconfig @@ -2,4 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_SNAPPER9260=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 6f838a9830..93fbcae5d9 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -3,8 +3,10 @@ CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_SNOW=y CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow" CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_SOUND=y +CONFIG_SPI_FLASH=y CONFIG_CMD_CROS_EC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y @@ -14,3 +16,5 @@ CONFIG_I2S=y CONFIG_I2S_SAMSUNG=y CONFIG_SOUND_MAX98095=y CONFIG_SOUND_WM8994=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/snowball_defconfig b/configs/snowball_defconfig index 19100c2526..31aa58334c 100644 --- a/configs/snowball_defconfig +++ b/configs/snowball_defconfig @@ -1,2 +1,12 @@ CONFIG_ARM=y CONFIG_TARGET_SNOWBALL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 473e6d3f7d..4ba4b8c5f2 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_SOCFPGA=y CONFIG_TARGET_SOCFPGA_ARRIA5=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_SPL=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set CONFIG_OF_CONTROL=y +CONFIG_SPI_FLASH=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index b6747210c4..e101f76712 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -1,10 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_TARGET_SOCFPGA_CYCLONE5=y -CONFIG_NETDEVICES=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" CONFIG_SPL=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set CONFIG_OF_CONTROL=y +CONFIG_SPI_FLASH=y +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index bbe4e806ff..63dda73dd2 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -1,10 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_TARGET_SOCFPGA_CYCLONE5=y -CONFIG_NETDEVICES=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" CONFIG_SPL=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y +CONFIG_SPI_FLASH=y +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index cabce0f5ad..37af82e087 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_SOCRATES=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/spear300_defconfig b/configs/spear300_defconfig index ccd5e5682f..49296bc79d 100644 --- a/configs/spear300_defconfig +++ b/configs/spear300_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR300=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear300" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear300_nand_defconfig b/configs/spear300_nand_defconfig index 47a389364a..560ff26392 100644 --- a/configs/spear300_nand_defconfig +++ b/configs/spear300_nand_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR300=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear300,nand" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear300_usbtty_defconfig b/configs/spear300_usbtty_defconfig index 16799e073c..3e280d5455 100644 --- a/configs/spear300_usbtty_defconfig +++ b/configs/spear300_usbtty_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR300=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear300,usbtty" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear300_usbtty_nand_defconfig b/configs/spear300_usbtty_nand_defconfig index 6d74951374..97a0f2a8d1 100644 --- a/configs/spear300_usbtty_nand_defconfig +++ b/configs/spear300_usbtty_nand_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR300=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear300,usbtty,nand" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear310_defconfig b/configs/spear310_defconfig index 456d3d1a48..d4ce01d9ce 100644 --- a/configs/spear310_defconfig +++ b/configs/spear310_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear310" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear310_nand_defconfig b/configs/spear310_nand_defconfig index d5d53760ce..517e42f7af 100644 --- a/configs/spear310_nand_defconfig +++ b/configs/spear310_nand_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear310,nand" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear310_pnor_defconfig b/configs/spear310_pnor_defconfig index 27a7994fb1..2fe149bf39 100644 --- a/configs/spear310_pnor_defconfig +++ b/configs/spear310_pnor_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear310,FLASH_PNOR" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear310_usbtty_defconfig b/configs/spear310_usbtty_defconfig index ce3cfca6f7..f8b027dae0 100644 --- a/configs/spear310_usbtty_defconfig +++ b/configs/spear310_usbtty_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear310,usbtty" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear310_usbtty_nand_defconfig b/configs/spear310_usbtty_nand_defconfig index 601321e0cc..a4d8fdc4f8 100644 --- a/configs/spear310_usbtty_nand_defconfig +++ b/configs/spear310_usbtty_nand_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear310,usbtty,nand" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear310_usbtty_pnor_defconfig b/configs/spear310_usbtty_pnor_defconfig index 31f3420243..fd1d8c07d9 100644 --- a/configs/spear310_usbtty_pnor_defconfig +++ b/configs/spear310_usbtty_pnor_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear310,usbtty,FLASH_PNOR" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear320_defconfig b/configs/spear320_defconfig index cfa7dcef1f..e720f38418 100644 --- a/configs/spear320_defconfig +++ b/configs/spear320_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear320" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear320_nand_defconfig b/configs/spear320_nand_defconfig index 1023111bfc..24c01c6c39 100644 --- a/configs/spear320_nand_defconfig +++ b/configs/spear320_nand_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear320,nand" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear320_pnor_defconfig b/configs/spear320_pnor_defconfig index c8e3b4d284..636bb484ba 100644 --- a/configs/spear320_pnor_defconfig +++ b/configs/spear320_pnor_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear320,FLASH_PNOR" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear320_usbtty_defconfig b/configs/spear320_usbtty_defconfig index 3d3dc11220..ca98d58e71 100644 --- a/configs/spear320_usbtty_defconfig +++ b/configs/spear320_usbtty_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear320,usbtty" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear320_usbtty_nand_defconfig b/configs/spear320_usbtty_nand_defconfig index 91bd02968b..cdb1f31859 100644 --- a/configs/spear320_usbtty_nand_defconfig +++ b/configs/spear320_usbtty_nand_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear320,usbtty,nand" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear320_usbtty_pnor_defconfig b/configs/spear320_usbtty_pnor_defconfig index 6e887a690c..85f2af6d2f 100644 --- a/configs/spear320_usbtty_pnor_defconfig +++ b/configs/spear320_usbtty_pnor_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear320,usbtty,FLASH_PNOR" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear600_defconfig b/configs/spear600_defconfig index 2790ffce9e..95a530b19a 100644 --- a/configs/spear600_defconfig +++ b/configs/spear600_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR600=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear600" -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear600_nand_defconfig b/configs/spear600_nand_defconfig index 2590edf2ca..019e74aa0e 100644 --- a/configs/spear600_nand_defconfig +++ b/configs/spear600_nand_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR600=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear600,nand" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear600_usbtty_defconfig b/configs/spear600_usbtty_defconfig index fcf1ed2be2..21680136fd 100644 --- a/configs/spear600_usbtty_defconfig +++ b/configs/spear600_usbtty_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR600=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear600,usbtty" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/spear600_usbtty_nand_defconfig b/configs/spear600_usbtty_nand_defconfig index d9eaa5c922..fc501d9bdc 100644 --- a/configs/spear600_usbtty_nand_defconfig +++ b/configs/spear600_usbtty_nand_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR600=y -CONFIG_NETDEVICES=y CONFIG_SYS_EXTRA_OPTIONS="spear600,usbtty,nand" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/stamp9g20_defconfig b/configs/stamp9g20_defconfig index 592203f657..78c47754fd 100644 --- a/configs/stamp9g20_defconfig +++ b/configs/stamp9g20_defconfig @@ -2,4 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_STAMP9G20=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig index 3c868ff3e4..188adc53b6 100644 --- a/configs/stm32f429-discovery_defconfig +++ b/configs/stm32f429-discovery_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_STM32F429_DISCOVERY=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index 6c27666ad7..8e8ce9fb2d 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -1,8 +1,14 @@ CONFIG_ARM=y CONFIG_TARGET_STV0991=y CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_NETDEVICES=y CONFIG_DEFAULT_DEVICE_TREE="stv0991" CONFIG_SYS_EXTRA_OPTIONS="stv0991" -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/stxgp3_defconfig b/configs/stxgp3_defconfig index 63d97ccc5a..86afe886cc 100644 --- a/configs/stxgp3_defconfig +++ b/configs/stxgp3_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_STXGP3=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/stxssa_4M_defconfig b/configs/stxssa_4M_defconfig index 4e81488454..75479060e1 100644 --- a/configs/stxssa_4M_defconfig +++ b/configs/stxssa_4M_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_STXSSA=y CONFIG_SYS_EXTRA_OPTIONS="STXSSA_4M" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/stxssa_defconfig b/configs/stxssa_defconfig index e46febedfb..c0724174aa 100644 --- a/configs/stxssa_defconfig +++ b/configs/stxssa_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_STXSSA=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig index e96eb65f4b..e95cbe4f76 100644 --- a/configs/sunxi_Gemei_G9_defconfig +++ b/configs/sunxi_Gemei_G9_defconfig @@ -9,7 +9,13 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-gemei-g9" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,USB_EHCI" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_DM_ETH=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/suvd3_defconfig b/configs/suvd3_defconfig index 174ed9e595..e477b0e344 100644 --- a/configs/suvd3_defconfig +++ b/configs/suvd3_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_SUVD3=y CONFIG_SYS_EXTRA_OPTIONS="SUVD3" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/sycamore_defconfig b/configs/sycamore_defconfig index f49007b5c3..844e67fe3a 100644 --- a/configs/sycamore_defconfig +++ b/configs/sycamore_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_WALNUT=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/t3corp_defconfig b/configs/t3corp_defconfig index fc80d1f6fc..c61508af34 100644 --- a/configs/t3corp_defconfig +++ b/configs/t3corp_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_T3CORP=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/taihu_defconfig b/configs/taihu_defconfig index 35816480f5..ac83725130 100644 --- a/configs/taihu_defconfig +++ b/configs/taihu_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_TAIHU=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/taishan_defconfig b/configs/taishan_defconfig index eddb981ed0..e956c6f856 100644 --- a/configs/taishan_defconfig +++ b/configs/taishan_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_TAISHAN=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig index ce45fbaab4..ae4b49b21c 100644 --- a/configs/tao3530_defconfig +++ b/configs/tao3530_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_TAO3530=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index b94f48698f..3787493330 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -3,4 +3,11 @@ CONFIG_ARCH_AT91=y CONFIG_TARGET_TAURUS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index c753197201..cc8f527f4c 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -2,12 +2,15 @@ CONFIG_ARC=y CONFIG_ARC_CACHE_LINE_SHIFT=5 CONFIG_TARGET_TB100=y CONFIG_SYS_CLK_FREQ=500000000 -CONFIG_NETDEVICES=y -CONFIG_DM_SERIAL=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DM=y +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_SERIAL=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 3e720a7a45..bb14026597 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -1,5 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_TBS2910=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set diff --git a/configs/tcm-bf518_defconfig b/configs/tcm-bf518_defconfig index c362868d95..26da18023f 100644 --- a/configs/tcm-bf518_defconfig +++ b/configs/tcm-bf518_defconfig @@ -1,5 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_TCM_BF518=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/tcm-bf537_defconfig b/configs/tcm-bf537_defconfig index 5267faf309..893362551f 100644 --- a/configs/tcm-bf537_defconfig +++ b/configs/tcm-bf537_defconfig @@ -1,5 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_TCM_BF537=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index 317a959f46..e731205f76 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -3,4 +3,14 @@ CONFIG_TEGRA=y CONFIG_TEGRA30=y CONFIG_TARGET_TEC_NG=y CONFIG_DEFAULT_DEVICE_TREE="tegra30-tec-ng" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/tec_defconfig b/configs/tec_defconfig index e831b5c3d3..3f815fe5bc 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -3,4 +3,13 @@ CONFIG_TEGRA=y CONFIG_TEGRA20=y CONFIG_TARGET_TEC=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-tec" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig new file mode 100644 index 0000000000..8192b28a58 --- /dev/null +++ b/configs/thuban_defconfig @@ -0,0 +1,10 @@ +CONFIG_ARM=y +CONFIG_TARGET_THUBAN=y +CONFIG_SPL=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" +CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/ti814x_evm_defconfig b/configs/ti814x_evm_defconfig index 4928cbaa52..ade4ea229f 100644 --- a/configs/ti814x_evm_defconfig +++ b/configs/ti814x_evm_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_TI814X_EVM=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 57fcf5242e..67e5e601af 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_TI816X_EVM=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig index 554daaceef..e892d3ed09 100644 --- a/configs/titanium_defconfig +++ b/configs/titanium_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_TITANIUM=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/barco/titanium/imximage.cfg" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/tk71_defconfig b/configs/tk71_defconfig index 195bdccac5..5e2a0b84c9 100644 --- a/configs/tk71_defconfig +++ b/configs/tk71_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_TK71=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index 01355b6a9a..ceb3386ac5 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_TQMA6=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/tqc/tqma6/tqma6q.cfg,MX6Q,MBA6,TQMA6X_MMC_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index ba24663a35..e413ef4b10 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_TQMA6=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/tqc/tqma6/tqma6q.cfg,MX6Q,MBA6,TQMA6X_SPI_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index cbb45008ec..6c37b4f0b1 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_TQMA6=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/tqc/tqma6/tqma6s.cfg,MX6S,MBA6,TQMA6X_MMC_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 805d8ab4be..af7853ff86 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_TQMA6=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/tqc/tqma6/tqma6s.cfg,MX6S,MBA6,TQMA6X_SPI_BOOT" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index 75a8aec103..f3cbe6d150 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -1,7 +1,15 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_TRATS2=y -# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2" -CONFIG_CMD_SETEXPR=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/trats_defconfig b/configs/trats_defconfig index a1aa892b29..6553edbc6d 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -2,5 +2,13 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_TRATS=y CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats" -CONFIG_CMD_SETEXPR=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig index a710804203..cbd4dd31f9 100644 --- a/configs/tricorder_defconfig +++ b/configs/tricorder_defconfig @@ -2,3 +2,10 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_TRICORDER=y CONFIG_SPL=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/tricorder_flash_defconfig b/configs/tricorder_flash_defconfig index c00bffe215..4619fc94ba 100644 --- a/configs/tricorder_flash_defconfig +++ b/configs/tricorder_flash_defconfig @@ -3,3 +3,10 @@ CONFIG_OMAP34XX=y CONFIG_TARGET_TRICORDER=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="FLASHCARD" +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index d58dc1013d..9d2fb2d214 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -3,4 +3,14 @@ CONFIG_TEGRA=y CONFIG_TEGRA20=y CONFIG_TARGET_TRIMSLICE=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/trizepsiv_defconfig b/configs/trizepsiv_defconfig index 327677e258..18879837fb 100644 --- a/configs/trizepsiv_defconfig +++ b/configs/trizepsiv_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_TRIZEPSIV=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/tseries_mmc_defconfig b/configs/tseries_mmc_defconfig index a5c85114ec..9ed13b6036 100644 --- a/configs/tseries_mmc_defconfig +++ b/configs/tseries_mmc_defconfig @@ -2,5 +2,15 @@ CONFIG_ARM=y CONFIG_TARGET_TSERIES=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT" +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set # CONFIG_CMD_CRC32 is not set -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/tseries_nand_defconfig b/configs/tseries_nand_defconfig index 9b738db613..0b577edc35 100644 --- a/configs/tseries_nand_defconfig +++ b/configs/tseries_nand_defconfig @@ -2,5 +2,15 @@ CONFIG_ARM=y CONFIG_TARGET_TSERIES=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND" +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set # CONFIG_CMD_CRC32 is not set -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/tseries_spi_defconfig b/configs/tseries_spi_defconfig index 06a296a7b1..1602a43b4d 100644 --- a/configs/tseries_spi_defconfig +++ b/configs/tseries_spi_defconfig @@ -2,5 +2,16 @@ CONFIG_ARM=y CONFIG_TARGET_TSERIES=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,SPI_BOOT,EMMC_BOOT" +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set # CONFIG_CMD_CRC32 is not set -CONFIG_CMD_NET=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPI_FLASH=y diff --git a/configs/tt01_defconfig b/configs/tt01_defconfig index 58cd9f9907..d23904d296 100644 --- a/configs/tt01_defconfig +++ b/configs/tt01_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_TT01=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 92fd76734f..d4a422cbb6 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_TUXX1=y CONFIG_SYS_EXTRA_OPTIONS="TUGE1" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index a08412e0d1..c8db21a482 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_TUXX1=y CONFIG_SYS_EXTRA_OPTIONS="TUXX1" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/twister_defconfig b/configs/twister_defconfig index 495ec3af2f..7381665cf6 100644 --- a/configs/twister_defconfig +++ b/configs/twister_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_TWISTER=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/tx25_defconfig b/configs/tx25_defconfig index 92573610d9..b752414102 100644 --- a/configs/tx25_defconfig +++ b/configs/tx25_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_TX25=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/u8500_href_defconfig b/configs/u8500_href_defconfig index fef179f411..5a82ca8c7b 100644 --- a/configs/u8500_href_defconfig +++ b/configs/u8500_href_defconfig @@ -1,2 +1,12 @@ CONFIG_ARM=y CONFIG_TARGET_U8500_HREF=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/udoo_quad_defconfig b/configs/udoo_quad_defconfig index 17f48c8b89..42c21c69d4 100644 --- a/configs/udoo_quad_defconfig +++ b/configs/udoo_quad_defconfig @@ -1,5 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_UDOO=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/udoo/udoo.cfg,MX6Q,DDR_MB=1024" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig index 12fc468b10..5f3974e6a1 100644 --- a/configs/usb_a9263_dataflash_defconfig +++ b/configs/usb_a9263_dataflash_defconfig @@ -2,4 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_USB_A9263=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index 75781ed150..c25d103a6b 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_TARGET_USBARMORY=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/v38b_defconfig b/configs/v38b_defconfig index d0f3ae6739..cc3d8026d9 100644 --- a/configs/v38b_defconfig +++ b/configs/v38b_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC5xxx=y CONFIG_TARGET_V38B=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/v5fx30teval_defconfig b/configs/v5fx30teval_defconfig index 42e04386e4..8173f3ee91 100644 --- a/configs/v5fx30teval_defconfig +++ b/configs/v5fx30teval_defconfig @@ -2,3 +2,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_V5FX30TEVAL=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/v5fx30teval_flash_defconfig b/configs/v5fx30teval_flash_defconfig index 495f3b9abd..b9b05e8b39 100644 --- a/configs/v5fx30teval_flash_defconfig +++ b/configs/v5fx30teval_flash_defconfig @@ -2,3 +2,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_V5FX30TEVAL=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/vct_platinum_defconfig b/configs/vct_platinum_defconfig index 217b1c11d2..81cf28011a 100644 --- a/configs/vct_platinum_defconfig +++ b/configs/vct_platinum_defconfig @@ -1,4 +1,5 @@ CONFIG_MIPS=y CONFIG_TARGET_VCT=y CONFIG_VCT_PLATINUM=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/vct_platinum_onenand_defconfig b/configs/vct_platinum_onenand_defconfig index 8b40d58aa5..8d91aa58c6 100644 --- a/configs/vct_platinum_onenand_defconfig +++ b/configs/vct_platinum_onenand_defconfig @@ -2,4 +2,7 @@ CONFIG_MIPS=y CONFIG_TARGET_VCT=y CONFIG_VCT_PLATINUM=y CONFIG_VCT_ONENAND=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/vct_platinum_onenand_small_defconfig b/configs/vct_platinum_onenand_small_defconfig index 4d82da9ad6..6eaec0cbbd 100644 --- a/configs/vct_platinum_onenand_small_defconfig +++ b/configs/vct_platinum_onenand_small_defconfig @@ -3,4 +3,17 @@ CONFIG_TARGET_VCT=y CONFIG_VCT_PLATINUM=y CONFIG_VCT_ONENAND=y CONFIG_VCT_SMALL_IMAGE=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_IMLS is not set # CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/vct_platinum_small_defconfig b/configs/vct_platinum_small_defconfig index 5e1f4aba2a..088ab7e79a 100644 --- a/configs/vct_platinum_small_defconfig +++ b/configs/vct_platinum_small_defconfig @@ -2,4 +2,15 @@ CONFIG_MIPS=y CONFIG_TARGET_VCT=y CONFIG_VCT_PLATINUM=y CONFIG_VCT_SMALL_IMAGE=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/vct_platinumavc_defconfig b/configs/vct_platinumavc_defconfig index 0a5748aaff..faeb6a2af7 100644 --- a/configs/vct_platinumavc_defconfig +++ b/configs/vct_platinumavc_defconfig @@ -1,3 +1,7 @@ CONFIG_MIPS=y CONFIG_TARGET_VCT=y CONFIG_VCT_PLATINUMAVC=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/vct_platinumavc_onenand_defconfig b/configs/vct_platinumavc_onenand_defconfig index 289f86414a..900a626b60 100644 --- a/configs/vct_platinumavc_onenand_defconfig +++ b/configs/vct_platinumavc_onenand_defconfig @@ -2,3 +2,9 @@ CONFIG_MIPS=y CONFIG_TARGET_VCT=y CONFIG_VCT_PLATINUMAVC=y CONFIG_VCT_ONENAND=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/vct_platinumavc_onenand_small_defconfig b/configs/vct_platinumavc_onenand_small_defconfig index 1b2853569a..e9928a06a4 100644 --- a/configs/vct_platinumavc_onenand_small_defconfig +++ b/configs/vct_platinumavc_onenand_small_defconfig @@ -3,4 +3,17 @@ CONFIG_TARGET_VCT=y CONFIG_VCT_PLATINUMAVC=y CONFIG_VCT_ONENAND=y CONFIG_VCT_SMALL_IMAGE=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_IMLS is not set # CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/vct_platinumavc_small_defconfig b/configs/vct_platinumavc_small_defconfig index 54813caf0e..719bd6403a 100644 --- a/configs/vct_platinumavc_small_defconfig +++ b/configs/vct_platinumavc_small_defconfig @@ -2,4 +2,15 @@ CONFIG_MIPS=y CONFIG_TARGET_VCT=y CONFIG_VCT_PLATINUMAVC=y CONFIG_VCT_SMALL_IMAGE=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/vct_premium_defconfig b/configs/vct_premium_defconfig index 8cd8331526..7b04e7cb7a 100644 --- a/configs/vct_premium_defconfig +++ b/configs/vct_premium_defconfig @@ -1,4 +1,5 @@ CONFIG_MIPS=y CONFIG_TARGET_VCT=y CONFIG_VCT_PREMIUM=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/vct_premium_onenand_defconfig b/configs/vct_premium_onenand_defconfig index 5a269c6fd8..769f8bdd70 100644 --- a/configs/vct_premium_onenand_defconfig +++ b/configs/vct_premium_onenand_defconfig @@ -2,4 +2,7 @@ CONFIG_MIPS=y CONFIG_TARGET_VCT=y CONFIG_VCT_PREMIUM=y CONFIG_VCT_ONENAND=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/vct_premium_onenand_small_defconfig b/configs/vct_premium_onenand_small_defconfig index f592a62a42..c062a01b75 100644 --- a/configs/vct_premium_onenand_small_defconfig +++ b/configs/vct_premium_onenand_small_defconfig @@ -3,4 +3,17 @@ CONFIG_TARGET_VCT=y CONFIG_VCT_PREMIUM=y CONFIG_VCT_ONENAND=y CONFIG_VCT_SMALL_IMAGE=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_IMLS is not set # CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/vct_premium_small_defconfig b/configs/vct_premium_small_defconfig index 3fb5e69c93..4a5cdb0a34 100644 --- a/configs/vct_premium_small_defconfig +++ b/configs/vct_premium_small_defconfig @@ -2,4 +2,15 @@ CONFIG_MIPS=y CONFIG_TARGET_VCT=y CONFIG_VCT_PREMIUM=y CONFIG_VCT_SMALL_IMAGE=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/ve8313_defconfig b/configs/ve8313_defconfig index 9bfd4bb4fc..627bb3c1a3 100644 --- a/configs/ve8313_defconfig +++ b/configs/ve8313_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_VE8313=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index 31a0ce3f8a..9ccd739977 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -3,4 +3,14 @@ CONFIG_TEGRA=y CONFIG_TEGRA124=y CONFIG_TARGET_VENICE2=y CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 46dca48f09..f728585d2c 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -3,4 +3,13 @@ CONFIG_TEGRA=y CONFIG_TEGRA20=y CONFIG_TARGET_VENTANA=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/versatileab_defconfig b/configs/versatileab_defconfig index f4ff5917dc..765fe6ee23 100644 --- a/configs/versatileab_defconfig +++ b/configs/versatileab_defconfig @@ -1,4 +1,19 @@ CONFIG_ARM=y CONFIG_ARCH_VERSATILE=y CONFIG_SYS_EXTRA_OPTIONS="ARCH_VERSATILE_AB" -CONFIG_CMD_NET=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/versatilepb_defconfig b/configs/versatilepb_defconfig index 54b5129b00..1973c38d4d 100644 --- a/configs/versatilepb_defconfig +++ b/configs/versatilepb_defconfig @@ -1,4 +1,19 @@ CONFIG_ARM=y CONFIG_ARCH_VERSATILE=y CONFIG_SYS_EXTRA_OPTIONS="ARCH_VERSATILE_PB" -CONFIG_CMD_NET=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/versatileqemu_defconfig b/configs/versatileqemu_defconfig index 7d6c4e1c67..ea9c5b93f2 100644 --- a/configs/versatileqemu_defconfig +++ b/configs/versatileqemu_defconfig @@ -1,4 +1,19 @@ CONFIG_ARM=y CONFIG_ARCH_VERSATILE=y CONFIG_SYS_EXTRA_OPTIONS="ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB" -CONFIG_CMD_NET=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 79a12911c0..0baaa91fa3 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -1,4 +1,17 @@ CONFIG_ARM=y CONFIG_TARGET_VEXPRESS64_JUNO=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="vexpress64" -CONFIG_CMD_NET=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +CONFIG_DM=y +CONFIG_DM_SERIAL=y diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 21bfb4aa40..bf5576a5d0 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -1,4 +1,18 @@ CONFIG_ARM=y CONFIG_TARGET_VEXPRESS64_BASE_FVP=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="vexpress64" -CONFIG_CMD_NET=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +CONFIG_DM=y +CONFIG_DM_SERIAL=y diff --git a/configs/vexpress_ca15_tc2_defconfig b/configs/vexpress_ca15_tc2_defconfig index 401317f31e..a3ff78a873 100644 --- a/configs/vexpress_ca15_tc2_defconfig +++ b/configs/vexpress_ca15_tc2_defconfig @@ -1,3 +1,16 @@ CONFIG_ARM=y CONFIG_TARGET_VEXPRESS_CA15_TC2=y -CONFIG_CMD_NET=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/vexpress_ca5x2_defconfig b/configs/vexpress_ca5x2_defconfig index d6286afa46..ce5da9173e 100644 --- a/configs/vexpress_ca5x2_defconfig +++ b/configs/vexpress_ca5x2_defconfig @@ -1,3 +1,16 @@ CONFIG_ARM=y CONFIG_TARGET_VEXPRESS_CA5X2=y -CONFIG_CMD_NET=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index b8e938ca47..2947fc13b9 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -1,3 +1,16 @@ CONFIG_ARM=y CONFIG_TARGET_VEXPRESS_CA9X4=y -CONFIG_CMD_NET=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index b5d97c289b..dc8df5c997 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_VF610TWR=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg,ENV_IS_IN_MMC" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y +CONFIG_SPI_FLASH=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index b054644d9f..98880f3a8b 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_VF610TWR=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg,ENV_IS_IN_NAND" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y +CONFIG_SPI_FLASH=y diff --git a/configs/vision2_defconfig b/configs/vision2_defconfig index 7bdfc8c73f..afe3b3c22f 100644 --- a/configs/vision2_defconfig +++ b/configs/vision2_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_VISION2=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y diff --git a/configs/vl_ma2sc_defconfig b/configs/vl_ma2sc_defconfig index eab4019faa..7a66783acc 100644 --- a/configs/vl_ma2sc_defconfig +++ b/configs/vl_ma2sc_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_VL_MA2SC=y -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/vl_ma2sc_ram_defconfig b/configs/vl_ma2sc_ram_defconfig index 6ffbf883ac..43a576f3b2 100644 --- a/configs/vl_ma2sc_ram_defconfig +++ b/configs/vl_ma2sc_ram_defconfig @@ -2,4 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_VL_MA2SC=y CONFIG_SYS_EXTRA_OPTIONS="RAMLOAD" -CONFIG_CMD_NET=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/vme8349_defconfig b/configs/vme8349_defconfig index 1f9a46910f..117a15441b 100644 --- a/configs/vme8349_defconfig +++ b/configs/vme8349_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC83xx=y CONFIG_TARGET_VME8349=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/vpac270_nor_128_defconfig b/configs/vpac270_nor_128_defconfig index 6c40f1e55c..bbc6e6a957 100644 --- a/configs/vpac270_nor_128_defconfig +++ b/configs/vpac270_nor_128_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_VPAC270=y CONFIG_SYS_EXTRA_OPTIONS="NOR,RAM_128M" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/vpac270_nor_256_defconfig b/configs/vpac270_nor_256_defconfig index 74b9473cc9..3f1ae1ec45 100644 --- a/configs/vpac270_nor_256_defconfig +++ b/configs/vpac270_nor_256_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_VPAC270=y CONFIG_SYS_EXTRA_OPTIONS="NOR,RAM_256M" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/vpac270_ond_256_defconfig b/configs/vpac270_ond_256_defconfig index c8a3158f83..7500b7c974 100644 --- a/configs/vpac270_ond_256_defconfig +++ b/configs/vpac270_ond_256_defconfig @@ -2,4 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_VPAC270=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="ONENAND,RAM_256M" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/walnut_defconfig b/configs/walnut_defconfig index f49007b5c3..844e67fe3a 100644 --- a/configs/walnut_defconfig +++ b/configs/walnut_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_WALNUT=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index eaa596213a..62666ffca7 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_WANDBOARD=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set CONFIG_DM=y CONFIG_DM_THERMAL=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index 24e1b9f8d0..dacb4320da 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -1,3 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_WARP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/whistler_defconfig b/configs/whistler_defconfig index 7446a42c02..43d725bae9 100644 --- a/configs/whistler_defconfig +++ b/configs/whistler_defconfig @@ -3,4 +3,13 @@ CONFIG_TEGRA=y CONFIG_TEGRA20=y CONFIG_TARGET_WHISTLER=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-whistler" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/wireless_space_defconfig b/configs/wireless_space_defconfig index 766552cac8..5551d27d6c 100644 --- a/configs/wireless_space_defconfig +++ b/configs/wireless_space_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_WIRELESS_SPACE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig index 80aa75396b..8dcf3e1f5c 100644 --- a/configs/woodburn_defconfig +++ b/configs/woodburn_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_WOODBURN=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig index 26502fd18e..96a00b326b 100644 --- a/configs/woodburn_sd_defconfig +++ b/configs/woodburn_sd_defconfig @@ -2,4 +2,4 @@ CONFIG_ARM=y CONFIG_TARGET_WOODBURN_SD=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/woodburn/imximage.cfg" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index e71db29e26..2d3d9f399e 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_WORK_92105=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_DM=y CONFIG_DM_GPIO=y diff --git a/configs/wtk_defconfig b/configs/wtk_defconfig index a52db306bb..7d4f754221 100644 --- a/configs/wtk_defconfig +++ b/configs/wtk_defconfig @@ -2,4 +2,4 @@ CONFIG_PPC=y CONFIG_8xx=y CONFIG_TARGET_TQM823L=y CONFIG_SYS_EXTRA_OPTIONS="LCD,SHARP_LQ065T9DR51U" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/x600_defconfig b/configs/x600_defconfig index 3122a2b276..fdd4d3b71f 100644 --- a/configs/x600_defconfig +++ b/configs/x600_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_TARGET_X600=y -CONFIG_NETDEVICES=y CONFIG_SPL=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" " +# CONFIG_CMD_SETEXPR is not set +CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/xaeniax_defconfig b/configs/xaeniax_defconfig index ada03f4de0..8634cc7b60 100644 --- a/configs/xaeniax_defconfig +++ b/configs/xaeniax_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y CONFIG_TARGET_XAENIAX=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/xfi3_defconfig b/configs/xfi3_defconfig index ec79cc6b3d..90927ed4e3 100644 --- a/configs/xfi3_defconfig +++ b/configs/xfi3_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_XFI3=y CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/xilinx-ppc405-generic_defconfig b/configs/xilinx-ppc405-generic_defconfig index f4ed6d16d6..9dae75587c 100644 --- a/configs/xilinx-ppc405-generic_defconfig +++ b/configs/xilinx-ppc405-generic_defconfig @@ -2,3 +2,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_XILINX_PPC405_GENERIC=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/xilinx-ppc405-generic_flash_defconfig b/configs/xilinx-ppc405-generic_flash_defconfig index 1b0311ce54..37084fb0a8 100644 --- a/configs/xilinx-ppc405-generic_flash_defconfig +++ b/configs/xilinx-ppc405-generic_flash_defconfig @@ -2,3 +2,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_XILINX_PPC405_GENERIC=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/xilinx-ppc440-generic_defconfig b/configs/xilinx-ppc440-generic_defconfig index cac8785790..398362b932 100644 --- a/configs/xilinx-ppc440-generic_defconfig +++ b/configs/xilinx-ppc440-generic_defconfig @@ -2,3 +2,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_XILINX_PPC440_GENERIC=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/xilinx-ppc440-generic_flash_defconfig b/configs/xilinx-ppc440-generic_flash_defconfig index b2715542e1..629903344b 100644 --- a/configs/xilinx-ppc440-generic_flash_defconfig +++ b/configs/xilinx-ppc440-generic_flash_defconfig @@ -2,3 +2,7 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_XILINX_PPC440_GENERIC=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/xilinx_zynqmp_defconfig b/configs/xilinx_zynqmp_defconfig index c512e9c332..1c64eea50d 100644 --- a/configs/xilinx_zynqmp_defconfig +++ b/configs/xilinx_zynqmp_defconfig @@ -1,14 +1,17 @@ CONFIG_ARM=y CONFIG_TARGET_XILINX_ZYNQMP=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp" -CONFIG_CMD_BDI=y -CONFIG_CMD_BOOTD=y -CONFIG_CMD_RUN=y -CONFIG_CMD_IMI=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_FLASH=y -CONFIG_CMD_ECHO=y -CONFIG_CMD_SOURCE=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set CONFIG_CMD_TIME=y -CONFIG_CMD_MISC=y CONFIG_CMD_TIMER=y diff --git a/configs/xpedite1000_defconfig b/configs/xpedite1000_defconfig index af198b7460..73d5ff239d 100644 --- a/configs/xpedite1000_defconfig +++ b/configs/xpedite1000_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_XPEDITE1000=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/xpedite517x_defconfig b/configs/xpedite517x_defconfig index 3648745828..45d0ae16b2 100644 --- a/configs/xpedite517x_defconfig +++ b/configs/xpedite517x_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC86xx=y CONFIG_TARGET_XPEDITE517X=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/xpedite520x_defconfig b/configs/xpedite520x_defconfig index 0dc106f090..797c16671f 100644 --- a/configs/xpedite520x_defconfig +++ b/configs/xpedite520x_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_XPEDITE520X=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig index 797df9f6b9..2db7f6589f 100644 --- a/configs/xpedite537x_defconfig +++ b/configs/xpedite537x_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_XPEDITE537X=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/xpedite550x_defconfig b/configs/xpedite550x_defconfig index 712b285898..274095757a 100644 --- a/configs/xpedite550x_defconfig +++ b/configs/xpedite550x_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_XPEDITE550X=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/yellowstone_defconfig b/configs/yellowstone_defconfig index 816636f460..7b1a630cf3 100644 --- a/configs/yellowstone_defconfig +++ b/configs/yellowstone_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_YOSEMITE=y CONFIG_SYS_EXTRA_OPTIONS="YELLOWSTONE" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/yosemite_defconfig b/configs/yosemite_defconfig index 3456748c9a..00ec4255d1 100644 --- a/configs/yosemite_defconfig +++ b/configs/yosemite_defconfig @@ -2,5 +2,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_YOSEMITE=y CONFIG_SYS_EXTRA_OPTIONS="YOSEMITE" -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/yucca_defconfig b/configs/yucca_defconfig index c0d0f45876..6c8e20a36e 100644 --- a/configs/yucca_defconfig +++ b/configs/yucca_defconfig @@ -1,5 +1,3 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_YUCCA=y -CONFIG_CMD_SETEXPR=y -CONFIG_CMD_NET=y diff --git a/configs/zeus_defconfig b/configs/zeus_defconfig index 7524ca9075..da2ff3c6ad 100644 --- a/configs/zeus_defconfig +++ b/configs/zeus_defconfig @@ -1,4 +1,4 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_ZEUS=y -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/zipitz2_defconfig b/configs/zipitz2_defconfig index 8d921a0bfe..3591849b35 100644 --- a/configs/zipitz2_defconfig +++ b/configs/zipitz2_defconfig @@ -1,2 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_ZIPITZ2=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set diff --git a/configs/zmx25_defconfig b/configs/zmx25_defconfig index 84c789aa20..a34e82718d 100644 --- a/configs/zmx25_defconfig +++ b/configs/zmx25_defconfig @@ -1,3 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_ZMX25=y -CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="boot in %d s\n" +CONFIG_AUTOBOOT_DELAY_STR="delaygs" +CONFIG_AUTOBOOT_STOP_STR="stopgs" +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index 9215ac55a6..533cdb5bb6 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -7,5 +7,8 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index ff023e6da1..af77a9d9d3 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -3,4 +3,6 @@ CONFIG_ARCH_ZYNQ=y CONFIG_TARGET_ZYNQ_PICOZED=y CONFIG_DEFAULT_DEVICE_TREE="zynq-picozed" CONFIG_SPL=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 23850c826c..2e40508182 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -7,5 +7,7 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index 4d2e59cb74..7c3713eb23 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -7,5 +7,7 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y diff --git a/configs/zynq_zc70x_defconfig b/configs/zynq_zc70x_defconfig index a018b6e89e..41c04bb74f 100644 --- a/configs/zynq_zc70x_defconfig +++ b/configs/zynq_zc70x_defconfig @@ -7,5 +7,8 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 7c83e8ba21..73b585474f 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -8,5 +8,9 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM010" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y +CONFIG_SPI_FLASH=y diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index 2659d0ae24..0d5c77ee41 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -8,5 +8,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012" -CONFIG_CMD_NET=y +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index 64624ea012..8d320a16e1 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -8,5 +8,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM013" -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 55d58a70b0..9f378492b9 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -7,5 +7,8 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index f119532fad..e25573bc4a 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -7,5 +7,8 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y -CONFIG_CMD_NET=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y +CONFIG_SPL_DISABLE_OF_CONTROL=y diff --git a/doc/README.autoboot b/doc/README.autoboot index 14e3660dd8..227e3b5dbb 100644 --- a/doc/README.autoboot +++ b/doc/README.autoboot @@ -78,13 +78,9 @@ What they do CONFIG_AUTOBOOT_PROMPT CONFIG_AUTOBOOT_DELAY_STR CONFIG_AUTOBOOT_STOP_STR - CONFIG_AUTOBOOT_DELAY_STR2 - CONFIG_AUTOBOOT_STOP_STR2 "bootdelaykey" environment variable "bootstopkey" environment variable - "bootdelaykey2" environment variable - "bootstopkey2" environment variable These options give more control over stopping autoboot. When they are used a specific character or string is required to @@ -130,12 +126,6 @@ What they do character of a key string does not appear in the rest of the string. - Using the CONFIG_AUTOBOOT_DELAY_STR2 #define or the - "bootdelaykey2" environment variable and/or the - CONFIG_AUTOBOOT_STOP_STR2 #define or the "bootstopkey" - environment variable you can specify a second, alternate - string (which allows you to have two "password" strings). - The CONFIG_AUTOBOOT_KEYED_CTRLC #define allows for the boot sequence to be interrupted by ctrl-c, in addition to the "bootdelaykey" and "bootstopkey". Setting this variable diff --git a/doc/README.scrapyard b/doc/README.scrapyard index a62bd0ba4c..f029a0f757 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -12,6 +12,12 @@ The list should be sorted in reverse chronological order. Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= +atstk1003 avr32 - e5354b8a 2015-06-10 Haavard Skinnemoen <haavard.skinnemoen@atmel.com> +atstk1004 avr32 - e5354b8a 2015-06-10 Haavard Skinnemoen <haavard.skinnemoen@atmel.com> +atstk1006 avr32 - e5354b8a 2015-06-10 Haavard Skinnemoen <haavard.skinnemoen@atmel.com> +mimc200 avr32 - c62d2f8f 2015-06-10 Mark Jackson <mpfj@mimc.co.uk> +hammerhead avr32 - e3693076 2015-06-10 Alex Raimondi <alex.raimondi@miromico.ch> +favr-32-ezkit avr32 - 9eb45aab 2015-06-10 Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> afeb9260 arm arm926ejs f6b42c14 2015-05-13 Sergey Lapin <slapin@ossfans.org> tny_a9260 arm arm926ejs f6b42c14 2015-05-13 Albin Tonnerre <albin.tonnerre@free-electrons.com> sbc35_a9g20 arm arm926ejs f6b42c14 2015-05-13 Albin Tonnerre <albin.tonnerre@free-electrons.com> diff --git a/doc/README.x86 b/doc/README.x86 index ef13fb45f4..c19f4a03ba 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -14,12 +14,13 @@ including supported boards, build instructions, todo list, etc. Status ------ U-Boot supports running as a coreboot [1] payload on x86. So far only Link -(Chromebook Pixel) has been tested, but it should work with minimal adjustments -on other x86 boards since coreboot deals with most of the low-level details. +(Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should +work with minimal adjustments on other x86 boards since coreboot deals with +most of the low-level details. U-Boot also supports booting directly from x86 reset vector without coreboot, -aka raw support or bare support. Currently Link, Intel Crown Bay, Intel -Minnowboard Max and Intel Galileo support running U-Boot 'bare metal'. +aka raw support or bare support. Currently Link, QEMU x86 targets and all +Intel boards support running U-Boot 'bare metal'. As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit Linux kernel as part of a FIT image. It also supports a compressed zImage. @@ -32,15 +33,15 @@ on other architectures, like below: $ make coreboot-x86_defconfig $ make all -Note this default configuration will build a U-Boot payload for the Link board. +Note this default configuration will build a U-Boot payload for the QEMU board. To build a coreboot payload against another board, you can change the build configuration during the 'make menuconfig' process. x86 architecture ---> ... - (chromebook_link) Board configuration file - (chromebook_link) Board Device Tree Source (dts) file - (0x19200000) Board specific Cache-As-RAM (CAR) address + (qemu-x86) Board configuration file + (qemu-x86_i440fx) Board Device Tree Source (dts) file + (0x01920000) Board specific Cache-As-RAM (CAR) address (0x4000) Board specific Cache-As-RAM (CAR) size Change the 'Board configuration file' and 'Board Device Tree Source (dts) file' @@ -78,7 +79,7 @@ Find the following files: * ./northbridge/intel/sandybridge/systemagent-r6.bin The 3rd one should be renamed to mrc.bin. -As for the video ROM, you can get it here [2]. +As for the video ROM, you can get it here [3]. Make sure all these binary blobs are put in the board directory. Now you can build U-Boot and obtain u-boot.rom: @@ -88,8 +89,8 @@ $ make all Intel Crown Bay specific instructions: -U-Boot support of Intel Crown Bay board [3] relies on a binary blob called -Firmware Support Package [4] to perform all the necessary initialization steps +U-Boot support of Intel Crown Bay board [4] relies on a binary blob called +Firmware Support Package [5] to perform all the necessary initialization steps as documented in the BIOS Writer Guide, including initialization of the CPU, memory controller, chipset and certain bus interfaces. @@ -178,6 +179,21 @@ Now you can build U-Boot and obtain u-boot.rom $ make galileo_defconfig $ make all +QEMU x86 target instructions: + +To build u-boot.rom for QEMU x86 targets, just simply run + +$ make qemu-x86_defconfig +$ make all + +Note this default configuration will build a U-Boot for the QEMU x86 i440FX +board. To build a U-Boot against QEMU x86 Q35 board, you can change the build +configuration during the 'make menuconfig' process like below: + +Device Tree Control ---> + ... + (qemu-x86_q35) Default Device Tree for DT control + Test with coreboot ------------------ For testing U-Boot as the coreboot payload, there are things that need be paid @@ -207,10 +223,38 @@ At present it seems that for Minnowboard Max, coreboot does not pass through the video information correctly (it always says the resolution is 0x0). This works correctly for link though. +Test with QEMU +-------------- +QEMU is a fancy emulator that can enable us to test U-Boot without access to +a real x86 board. Please make sure your QEMU version is 2.3.0 or above test +U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows: + +$ qemu-system-i386 -nographic -bios path/to/u-boot.rom + +This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU +also supports emulating an x86 board with Q35 and ICH9 based chipset, which is +also supported by U-Boot. To instantiate such a machine, call QEMU with: + +$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35 + +Note by default QEMU instantiated boards only have 128 MiB system memory. But +it is enough to have U-Boot boot and function correctly. You can increase the +system memory by pass '-m' parameter to QEMU if you want more memory: + +$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 + +This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only +supports 3 GiB maximum system memory and reserves the last 1 GiB address space +for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m' +would be 3072. + +QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will +show QEMU's VGA console window. Note this will disable QEMU's serial output. +If you want to check both consoles, use '-serial stdio'. CPU Microcode ------------- -Modern CPUs usually require a special bit stream called microcode [5] to be +Modern CPUs usually require a special bit stream called microcode [6] to be loaded on the processor after power up in order to function properly. U-Boot has already integrated these as hex dumps in the source tree. @@ -227,7 +271,6 @@ arch/x86/dts/ for these device tree source files. Useful Commands --------------- - In keeping with the U-Boot philosophy of providing functions to check and adjust internal settings, there are several x86-specific commands that may be useful: @@ -314,7 +357,8 @@ TODO List References ---------- [1] http://www.coreboot.org -[2] http://www.coreboot.org/~stepan/pci8086,0166.rom -[3] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html -[4] http://www.intel.com/fsp -[5] http://en.wikipedia.org/wiki/Microcode +[2] http://www.qemu.org +[3] http://www.coreboot.org/~stepan/pci8086,0166.rom +[4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html +[5] http://www.intel.com/fsp +[6] http://en.wikipedia.org/wiki/Microcode diff --git a/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt new file mode 100644 index 0000000000..45ab1afc39 --- /dev/null +++ b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt @@ -0,0 +1,31 @@ +Intel x86 PINCTRL/GPIO controller + +Pin-muxing on x86 can be described with a node for the PINCTRL master +node and a set of child nodes for each pin on the SoC. + +The PINCTRL master node requires the following properties: +- compatible : "intel,x86-pinctrl" + +Pin nodes must be children of the pinctrl master node and can +contain the following properties: +- pad-offset - (required) offset in the IOBASE for the pin to configured. +- gpio-offset - (required) offset in the GPIOBASE for the pin to configured and + also the bit shift in this register. +- mode-gpio - (optional) standalone property to force the pin into GPIO mode. +- mode-func - (optional) function number to assign to the pin. if 'mode-gpio' + is set, this property will be ignored. +in case of 'mode-gpio' property set: +- output-value - (optional) this set the default output value of the GPIO. +- direction - (optional) this set the direction of the gpio. +- pull-str - (optional) this set the pull strength of the pin. +- pull-assign - (optional) this set the pull assignement (up/down) of the pin. + +Example: + +pin_usb_host_en0@0 { + gpio-offset = <0x80 8>; + pad-offset = <0x260>; + mode-gpio; + output-value = <1>; + direction = <PIN_OUTPUT>; +}; diff --git a/doc/device-tree-bindings/misc/intel,irq-router.txt b/doc/device-tree-bindings/misc/intel,irq-router.txt new file mode 100644 index 0000000000..598b4b1c2f --- /dev/null +++ b/doc/device-tree-bindings/misc/intel,irq-router.txt @@ -0,0 +1,50 @@ +Intel Interrupt Router Device Binding +===================================== + +The device tree node which describes the operation of the Intel Interrupt Router +device is as follows: + +Required properties : +- reg : Specifies the interrupt router's PCI configuration space address as + defined by the Open Firmware spec. +- compatible = "intel,irq-router" +- intel,pirq-config : Specifies the IRQ routing register programming mechanism. + Valid values are: + "pci": IRQ routing is controlled by PCI configuration registers + "ibase": IRQ routing is in the memory-mapped IBASE register block +- intel,ibase-offset : IBASE register offset in the interrupt router's PCI + configuration space, required only if intel,pirq-config = "ibase". +- intel,pirq-link : Specifies the PIRQ link information with two cells. The + first cell is the register offset that controls the first PIRQ link routing. + The second cell is the total number of PIRQ links the router supports. +- intel,pirq-mask : Specifies the IRQ mask reprenting the 16 IRQs in 8259 PIC. + Bit N is 1 means IRQ N is available to be routed. +- intel,pirq-routing : Specifies all PCI devices' IRQ routing information, + encoded as 3 cells a group for a device. The first cell is the device's PCI + bus number, device number and function number encoding with PCI_BDF() macro. + The second cell is the PCI interrupt pin used by this device. The last cell + is which PIRQ line the PCI interrupt pin is routed to. + + +Example +------- + +#include <dt-bindings/interrupt-router/intel-irq.h> + + irq-router@1f,0 { + reg = <0x0000f800 0 0 0 0>; + compatible = "intel,irq-router"; + intel,pirq-config = "pci"; + intel,pirq-link = <0x60 8>; + intel,pirq-mask = <0xdef8>; + intel,pirq-routing = < + PCI_BDF(0, 2, 0) INTA PIRQA + PCI_BDF(0, 3, 0) INTA PIRQB + PCI_BDF(0, 8, 0) INTA PIRQC + PCI_BDF(0, 8, 1) INTB PIRQD + PCI_BDF(1, 6, 0) INTA PIRQE + PCI_BDF(1, 6, 1) INTB PIRQF + PCI_BDF(1, 6, 2) INTC PIRQG + PCI_BDF(1, 6, 3) INTD PIRQH + >; + }; diff --git a/doc/device-tree-bindings/root.txt b/doc/device-tree-bindings/root.txt new file mode 100644 index 0000000000..001ccf36cc --- /dev/null +++ b/doc/device-tree-bindings/root.txt @@ -0,0 +1,4 @@ +The root node + +Optional properties: + - serial-number : a string representing the device's serial number diff --git a/drivers/Kconfig b/drivers/Kconfig index 1f4088778b..c7e526cc8a 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -57,7 +57,7 @@ source "drivers/thermal/Kconfig" endmenu config PHYS_TO_BUS - bool + bool "Custom physical to bus address mapping" help Some SoCs use a different address map for CPU physical addresses and peripheral DMA master accesses. If yours does, select this option in diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c index 65086484ee..4fb846ad37 100644 --- a/drivers/block/ahci.c +++ b/drivers/block/ahci.c @@ -39,7 +39,7 @@ u16 *ataid[AHCI_MAX_PORTS]; /* Maximum timeouts for each event */ #define WAIT_MS_SPINUP 20000 -#define WAIT_MS_DATAIO 5000 +#define WAIT_MS_DATAIO 10000 #define WAIT_MS_FLUSH 5000 #define WAIT_MS_LINKUP 200 @@ -726,18 +726,25 @@ static int ata_scsiop_inquiry(ccb *pccb) */ static int ata_scsiop_read_write(ccb *pccb, u8 is_write) { - u32 lba = 0; + lbaint_t lba = 0; u16 blocks = 0; u8 fis[20]; u8 *user_buffer = pccb->pdata; u32 user_buffer_size = pccb->datalen; /* Retrieve the base LBA number from the ccb structure. */ - memcpy(&lba, pccb->cmd + 2, sizeof(lba)); - lba = be32_to_cpu(lba); + if (pccb->cmd[0] == SCSI_READ16) { + memcpy(&lba, pccb->cmd + 2, 8); + lba = be64_to_cpu(lba); + } else { + u32 temp; + memcpy(&temp, pccb->cmd + 2, 4); + lba = be32_to_cpu(temp); + } /* - * And the number of blocks. + * Retrieve the base LBA number and the block count from + * the ccb structure. * * For 10-byte and 16-byte SCSI R/W commands, transfer * length 0 means transfer 0 block of data. @@ -746,10 +753,13 @@ static int ata_scsiop_read_write(ccb *pccb, u8 is_write) * * WARNING: one or two older ATA drives treat 0 as 0... */ - blocks = (((u16)pccb->cmd[7]) << 8) | ((u16) pccb->cmd[8]); + if (pccb->cmd[0] == SCSI_READ16) + blocks = (((u16)pccb->cmd[13]) << 8) | ((u16) pccb->cmd[14]); + else + blocks = (((u16)pccb->cmd[7]) << 8) | ((u16) pccb->cmd[8]); - debug("scsi_ahci: %s %d blocks starting from lba 0x%x\n", - is_write ? "write" : "read", (unsigned)lba, blocks); + debug("scsi_ahci: %s %u blocks starting from lba 0x" LBAFU "\n", + is_write ? "write" : "read", blocks, lba); /* Preset the FIS */ memset(fis, 0, sizeof(fis)); @@ -770,14 +780,23 @@ static int ata_scsiop_read_write(ccb *pccb, u8 is_write) return -EIO; } - /* LBA48 SATA command but only use 32bit address range within - * that. The next smaller command range (28bit) is too small. + /* + * LBA48 SATA command but only use 32bit address range within + * that (unless we've enabled 64bit LBA support). The next + * smaller command range (28bit) is too small. */ fis[4] = (lba >> 0) & 0xff; fis[5] = (lba >> 8) & 0xff; fis[6] = (lba >> 16) & 0xff; fis[7] = 1 << 6; /* device reg: set LBA mode */ fis[8] = ((lba >> 24) & 0xff); +#ifdef CONFIG_SYS_64BIT_LBA + if (pccb->cmd[0] == SCSI_READ16) { + fis[9] = ((lba >> 32) & 0xff); + fis[10] = ((lba >> 40) & 0xff); + } +#endif + fis[3] = 0xe0; /* features */ /* Block (sector) count */ @@ -883,6 +902,7 @@ int scsi_exec(ccb *pccb) int ret; switch (pccb->cmd[0]) { + case SCSI_READ16: case SCSI_READ10: ret = ata_scsiop_read_write(pccb, 0); break; diff --git a/drivers/core/Makefile b/drivers/core/Makefile index f14695b2d6..a3fec38503 100644 --- a/drivers/core/Makefile +++ b/drivers/core/Makefile @@ -5,5 +5,7 @@ # obj-$(CONFIG_DM) += device.o lists.o root.o uclass.o util.o +ifndef CONFIG_SPL_BUILD obj-$(CONFIG_OF_CONTROL) += simple-bus.o +endif obj-$(CONFIG_DM_DEVICE_REMOVE) += device-remove.o diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 0840a30fba..0c43777cef 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -35,3 +35,10 @@ config SANDBOX_GPIO_COUNT are specified using the device tree. But you can also have a number of 'anonymous' GPIOs that do not belong to any device or bank. Select a suitable value depending on your needs. + +config VYBRID_GPIO + bool "Vybrid GPIO driver" + depends on DM + default n + help + Say yes here to support Vybrid vf610 GPIOs. diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index ba9efe8d54..586485055d 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -45,3 +45,4 @@ obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o obj-$(CONFIG_LPC32XX_GPIO) += lpc32xx_gpio.o obj-$(CONFIG_STM32_GPIO) += stm32_gpio.o obj-$(CONFIG_ZYNQ_GPIO) += zynq_gpio.o +obj-$(CONFIG_VYBRID_GPIO) += vybrid_gpio.o diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index 530bb3e128..bf982b9d19 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -757,6 +757,7 @@ static int gpio_pre_remove(struct udevice *dev) UCLASS_DRIVER(gpio) = { .id = UCLASS_GPIO, .name = "gpio", + .flags = DM_UC_FLAG_SEQ_ALIAS, .post_probe = gpio_post_probe, .pre_remove = gpio_pre_remove, .per_device_auto_alloc_size = sizeof(struct gpio_dev_priv), diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c index 7e679a086e..8a108f3805 100644 --- a/drivers/gpio/intel_ich6_gpio.c +++ b/drivers/gpio/intel_ich6_gpio.c @@ -44,21 +44,28 @@ struct ich6_bank_priv { uint16_t lvl; }; +#define GPIO_USESEL_OFFSET(x) (x) +#define GPIO_IOSEL_OFFSET(x) (x + 4) +#define GPIO_LVL_OFFSET(x) (x + 8) + +#define IOPAD_MODE_MASK 0x7 +#define IOPAD_PULL_ASSIGN_SHIFT 7 +#define IOPAD_PULL_ASSIGN_MASK (0x3 << IOPAD_PULL_ASSIGN_SHIFT) +#define IOPAD_PULL_STRENGTH_SHIFT 9 +#define IOPAD_PULL_STRENGTH_MASK (0x3 << IOPAD_PULL_STRENGTH_SHIFT) + /* TODO: Move this to device tree, or platform data */ void ich_gpio_set_gpio_map(const struct pch_gpio_map *map) { gd->arch.gpio_map = map; } -static int gpio_ich6_ofdata_to_platdata(struct udevice *dev) +static int gpio_ich6_get_base(unsigned long base) { - struct ich6_bank_platdata *plat = dev_get_platdata(dev); pci_dev_t pci_dev; /* handle for 0:1f:0 */ u8 tmpbyte; u16 tmpword; u32 tmplong; - u16 gpiobase; - int offset; /* Where should it be? */ pci_dev = PCI_BDF(0, 0x1f, 0); @@ -123,9 +130,9 @@ static int gpio_ich6_ofdata_to_platdata(struct udevice *dev) * while on the Ivybridge the bit0 is used to indicate it is an * I/O space. */ - tmplong = x86_pci_read_config32(pci_dev, PCI_CFG_GPIOBASE); + tmplong = x86_pci_read_config32(pci_dev, base); if (tmplong == 0x00000000 || tmplong == 0xffffffff) { - debug("%s: unexpected GPIOBASE value\n", __func__); + debug("%s: unexpected BASE value\n", __func__); return -ENODEV; } @@ -135,7 +142,215 @@ static int gpio_ich6_ofdata_to_platdata(struct udevice *dev) * at the offset that we just read. Bit 0 indicates that it's * an I/O address, not a memory address, so mask that off. */ - gpiobase = tmplong & 0xfffe; + return tmplong & 0xfffc; +} + +static int _ich6_gpio_set_value(uint16_t base, unsigned offset, int value) +{ + u32 val; + + val = inl(base); + if (value) + val |= (1UL << offset); + else + val &= ~(1UL << offset); + outl(val, base); + + return 0; +} + +static int _ich6_gpio_set_function(uint16_t base, unsigned offset, int func) +{ + u32 val; + + if (func) { + val = inl(base); + val |= (1UL << offset); + outl(val, base); + } else { + val = inl(base); + val &= ~(1UL << offset); + outl(val, base); + } + + return 0; +} + +static int _ich6_gpio_set_direction(uint16_t base, unsigned offset, int dir) +{ + u32 val; + + if (!dir) { + val = inl(base); + val |= (1UL << offset); + outl(val, base); + } else { + val = inl(base); + val &= ~(1UL << offset); + outl(val, base); + } + + return 0; +} + +static int _gpio_ich6_pinctrl_cfg_pin(s32 gpiobase, s32 iobase, int pin_node) +{ + u32 gpio_offset[2]; + int pad_offset; + int val; + int ret; + const void *prop; + + /* + * GPIO node is not mandatory, so we only do the + * pinmuxing if the node exist. + */ + ret = fdtdec_get_int_array(gd->fdt_blob, pin_node, "gpio-offset", + gpio_offset, 2); + if (!ret) { + /* Do we want to force the GPIO mode? */ + prop = fdt_getprop(gd->fdt_blob, pin_node, "mode-gpio", + NULL); + if (prop) + _ich6_gpio_set_function(GPIO_USESEL_OFFSET + (gpiobase) + + gpio_offset[0], + gpio_offset[1], 1); + + val = + fdtdec_get_int(gd->fdt_blob, pin_node, "direction", -1); + if (val != -1) + _ich6_gpio_set_direction(GPIO_IOSEL_OFFSET + (gpiobase) + + gpio_offset[0], + gpio_offset[1], val); + + val = + fdtdec_get_int(gd->fdt_blob, pin_node, "output-value", -1); + if (val != -1) + _ich6_gpio_set_value(GPIO_LVL_OFFSET(gpiobase) + + gpio_offset[0], + gpio_offset[1], val); + } + + /* if iobase is present, let's configure the pad */ + if (iobase != -1) { + int iobase_addr; + + /* + * The offset for the same pin for the IOBASE and GPIOBASE are + * different, so instead of maintaining a lookup table, + * the device tree should provide directly the correct + * value for both mapping. + */ + pad_offset = + fdtdec_get_int(gd->fdt_blob, pin_node, "pad-offset", -1); + if (pad_offset == -1) { + debug("%s: Invalid register io offset %d\n", + __func__, pad_offset); + return -EINVAL; + } + + /* compute the absolute pad address */ + iobase_addr = iobase + pad_offset; + + /* + * Do we need to set a specific function mode? + * If someone put also 'mode-gpio', this option will + * be just ignored by the controller + */ + val = fdtdec_get_int(gd->fdt_blob, pin_node, "mode-func", -1); + if (val != -1) + clrsetbits_le32(iobase_addr, IOPAD_MODE_MASK, val); + + /* Configure the pull-up/down if needed */ + val = fdtdec_get_int(gd->fdt_blob, pin_node, "pull-assign", -1); + if (val != -1) + clrsetbits_le32(iobase_addr, + IOPAD_PULL_ASSIGN_MASK, + val << IOPAD_PULL_ASSIGN_SHIFT); + + val = + fdtdec_get_int(gd->fdt_blob, pin_node, "pull-strength", -1); + if (val != -1) + clrsetbits_le32(iobase_addr, + IOPAD_PULL_STRENGTH_MASK, + val << IOPAD_PULL_STRENGTH_SHIFT); + + debug("%s: pad cfg [0x%x]: %08x\n", __func__, pad_offset, + readl(iobase_addr)); + } + + return 0; +} + +int gpio_ich6_pinctrl_init(void) +{ + int pin_node; + int node; + int ret; + int gpiobase; + int iobase_offset; + int iobase = -1; + + /* + * Get the memory/io base address to configure every pins. + * IOBASE is used to configure the mode/pads + * GPIOBASE is used to configure the direction and default value + */ + gpiobase = gpio_ich6_get_base(PCI_CFG_GPIOBASE); + if (gpiobase < 0) { + debug("%s: invalid GPIOBASE address (%08x)\n", __func__, + gpiobase); + return -EINVAL; + } + + /* This is not an error to not have a pinctrl node */ + node = + fdtdec_next_compatible(gd->fdt_blob, 0, COMPAT_INTEL_X86_PINCTRL); + if (node <= 0) { + debug("%s: no pinctrl node\n", __func__); + return 0; + } + + /* + * Get the IOBASE, this is not mandatory as this is not + * supported by all the CPU + */ + iobase_offset = fdtdec_get_int(gd->fdt_blob, node, "io-base", -1); + if (iobase_offset == -1) { + debug("%s: io-base offset not present\n", __func__); + } else { + iobase = gpio_ich6_get_base(iobase_offset); + if (iobase < 0) { + debug("%s: invalid IOBASE address (%08x)\n", __func__, + iobase); + return -EINVAL; + } + } + + for (pin_node = fdt_first_subnode(gd->fdt_blob, node); + pin_node > 0; + pin_node = fdt_next_subnode(gd->fdt_blob, pin_node)) { + /* Configure the pin */ + ret = _gpio_ich6_pinctrl_cfg_pin(gpiobase, iobase, pin_node); + if (ret != 0) { + debug("%s: invalid configuration for the pin %d\n", + __func__, pin_node); + return ret; + } + } + + return 0; +} + +static int gpio_ich6_ofdata_to_platdata(struct udevice *dev) +{ + struct ich6_bank_platdata *plat = dev_get_platdata(dev); + u16 gpiobase; + int offset; + + gpiobase = gpio_ich6_get_base(PCI_CFG_GPIOBASE); offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "reg", -1); if (offset == -1) { debug("%s: Invalid register offset %d\n", __func__, offset); @@ -192,30 +407,24 @@ static int ich6_gpio_request(struct udevice *dev, unsigned offset, static int ich6_gpio_direction_input(struct udevice *dev, unsigned offset) { struct ich6_bank_priv *bank = dev_get_priv(dev); - u32 tmplong; - tmplong = inl(bank->io_sel); - tmplong |= (1UL << offset); - outl(bank->io_sel, tmplong); - return 0; + return _ich6_gpio_set_direction(inl(bank->io_sel), offset, 0); } static int ich6_gpio_direction_output(struct udevice *dev, unsigned offset, int value) { + int ret; struct ich6_bank_priv *bank = dev_get_priv(dev); - u32 tmplong; - gpio_set_value(offset, value); + ret = _ich6_gpio_set_direction(inl(bank->io_sel), offset, 1); + if (ret) + return ret; - tmplong = inl(bank->io_sel); - tmplong &= ~(1UL << offset); - outl(bank->io_sel, tmplong); - return 0; + return _ich6_gpio_set_value(bank->lvl, offset, value); } static int ich6_gpio_get_value(struct udevice *dev, unsigned offset) - { struct ich6_bank_priv *bank = dev_get_priv(dev); u32 tmplong; @@ -230,15 +439,7 @@ static int ich6_gpio_set_value(struct udevice *dev, unsigned offset, int value) { struct ich6_bank_priv *bank = dev_get_priv(dev); - u32 tmplong; - - tmplong = inl(bank->lvl); - if (value) - tmplong |= (1UL << offset); - else - tmplong &= ~(1UL << offset); - outl(bank->lvl, tmplong); - return 0; + return _ich6_gpio_set_value(bank->lvl, offset, value); } static int ich6_gpio_get_function(struct udevice *dev, unsigned offset) diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c index f9881308f4..afa165ab78 100644 --- a/drivers/gpio/sunxi_gpio.c +++ b/drivers/gpio/sunxi_gpio.c @@ -304,6 +304,7 @@ static const struct udevice_id sunxi_gpio_ids[] = { { .compatible = "allwinner,sun6i-a31s-pinctrl" }, { .compatible = "allwinner,sun7i-a20-pinctrl" }, { .compatible = "allwinner,sun8i-a23-pinctrl" }, + { .compatible = "allwinner,sun8i-a33-pinctrl" }, { .compatible = "allwinner,sun9i-a80-pinctrl" }, { } }; diff --git a/drivers/gpio/vybrid_gpio.c b/drivers/gpio/vybrid_gpio.c new file mode 100644 index 0000000000..6eaf0a9ad4 --- /dev/null +++ b/drivers/gpio/vybrid_gpio.c @@ -0,0 +1,169 @@ +/* + * Copyright (C) 2015 + * Bhuvanchandra DV, Toradex, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h> +#include <asm/gpio.h> +#include <asm/imx-common/iomux-v3.h> +#include <asm/io.h> +#include <malloc.h> + +DECLARE_GLOBAL_DATA_PTR; + +struct vybrid_gpios { + unsigned int chip; + struct vybrid_gpio_regs *reg; +}; + +static int vybrid_gpio_direction_input(struct udevice *dev, unsigned gpio) +{ + const struct vybrid_gpios *gpios = dev_get_priv(dev); + + gpio = gpio + (gpios->chip * VYBRID_GPIO_COUNT); + imx_iomux_gpio_set_direction(gpio, VF610_GPIO_DIRECTION_IN); + + return 0; +} + +static int vybrid_gpio_direction_output(struct udevice *dev, unsigned gpio, + int value) +{ + const struct vybrid_gpios *gpios = dev_get_priv(dev); + + gpio = gpio + (gpios->chip * VYBRID_GPIO_COUNT); + gpio_set_value(gpio, value); + imx_iomux_gpio_set_direction(gpio, VF610_GPIO_DIRECTION_OUT); + + return 0; +} + +static int vybrid_gpio_get_value(struct udevice *dev, unsigned gpio) +{ + const struct vybrid_gpios *gpios = dev_get_priv(dev); + + return ((readl(&gpios->reg->gpio_pdir) & (1 << gpio))) ? 1 : 0; +} + +static int vybrid_gpio_set_value(struct udevice *dev, unsigned gpio, + int value) +{ + const struct vybrid_gpios *gpios = dev_get_priv(dev); + if (value) + writel((1 << gpio), &gpios->reg->gpio_psor); + else + writel((1 << gpio), &gpios->reg->gpio_pcor); + + return 0; +} + +static int vybrid_gpio_get_function(struct udevice *dev, unsigned gpio) +{ + const struct vybrid_gpios *gpios = dev_get_priv(dev); + u32 g_state = 0; + + gpio = gpio + (gpios->chip * VYBRID_GPIO_COUNT); + + imx_iomux_gpio_get_function(gpio, &g_state); + + if (((g_state & (0x07 << PAD_MUX_MODE_SHIFT)) >> PAD_MUX_MODE_SHIFT) > 0) + return GPIOF_FUNC; + if (g_state & PAD_CTL_OBE_ENABLE) + return GPIOF_OUTPUT; + if (g_state & PAD_CTL_IBE_ENABLE) + return GPIOF_INPUT; + if (!(g_state & PAD_CTL_OBE_IBE_ENABLE)) + return GPIOF_UNUSED; + + return GPIOF_UNKNOWN; +} + +static const struct dm_gpio_ops gpio_vybrid_ops = { + .direction_input = vybrid_gpio_direction_input, + .direction_output = vybrid_gpio_direction_output, + .get_value = vybrid_gpio_get_value, + .set_value = vybrid_gpio_set_value, + .get_function = vybrid_gpio_get_function, +}; + +static int vybrid_gpio_probe(struct udevice *dev) +{ + struct vybrid_gpios *gpios = dev_get_priv(dev); + struct vybrid_gpio_platdata *plat = dev_get_platdata(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + + uc_priv->bank_name = plat->port_name; + uc_priv->gpio_count = VYBRID_GPIO_COUNT; + gpios->reg = (struct vybrid_gpio_regs *)plat->base; + gpios->chip = plat->chip; + + return 0; +} + +static int vybrid_gpio_bind(struct udevice *dev) +{ + struct vybrid_gpio_platdata *plat = dev->platdata; + fdt_addr_t base_addr; + + if (plat) + return 0; + + base_addr = dev_get_addr(dev); + if (base_addr == FDT_ADDR_T_NONE) + return -ENODEV; + + /* + * TODO: + * When every board is converted to driver model and DT is + * supported, this can be done by auto-alloc feature, but + * not using calloc to alloc memory for platdata. + */ + plat = calloc(1, sizeof(*plat)); + if (!plat) + return -ENOMEM; + + plat->base = base_addr; + plat->chip = dev->req_seq; + plat->port_name = fdt_get_name(gd->fdt_blob, dev->of_offset, NULL); + dev->platdata = plat; + + return 0; +} + +#ifndef CONFIG_OF_CONTROL +static const struct vybrid_gpio_platdata vybrid_gpio[] = { + {0, GPIO0_BASE_ADDR, "GPIO0 "}, + {1, GPIO1_BASE_ADDR, "GPIO1 "}, + {2, GPIO2_BASE_ADDR, "GPIO2 "}, + {3, GPIO3_BASE_ADDR, "GPIO3 "}, + {4, GPIO4_BASE_ADDR, "GPIO4 "}, +}; + +U_BOOT_DEVICES(vybrid_gpio) = { + { "gpio_vybrid", &vybrid_gpio[0] }, + { "gpio_vybrid", &vybrid_gpio[1] }, + { "gpio_vybrid", &vybrid_gpio[2] }, + { "gpio_vybrid", &vybrid_gpio[3] }, + { "gpio_vybrid", &vybrid_gpio[4] }, +}; +#endif + +static const struct udevice_id vybrid_gpio_ids[] = { + { .compatible = "fsl,vf610-gpio" }, + { } +}; + +U_BOOT_DRIVER(gpio_vybrid) = { + .name = "gpio_vybrid", + .id = UCLASS_GPIO, + .ops = &gpio_vybrid_ops, + .probe = vybrid_gpio_probe, + .priv_auto_alloc_size = sizeof(struct vybrid_gpios), + .of_match = vybrid_gpio_ids, + .bind = vybrid_gpio_bind, +}; diff --git a/drivers/i2c/i2c-uclass-compat.c b/drivers/i2c/i2c-uclass-compat.c index 223f238f4b..5606d1f807 100644 --- a/drivers/i2c/i2c-uclass-compat.c +++ b/drivers/i2c/i2c-uclass-compat.c @@ -106,3 +106,24 @@ void board_i2c_init(const void *blob) { /* Nothing to do here - the init happens through driver model */ } + +uint8_t i2c_reg_read(uint8_t chip_addr, uint8_t offset) +{ + struct udevice *dev; + int ret; + + ret = i2c_compat_get_device(chip_addr, 1, &dev); + if (ret) + return 0xff; + return dm_i2c_reg_read(dev, offset); +} + +void i2c_reg_write(uint8_t chip_addr, uint8_t offset, uint8_t val) +{ + struct udevice *dev; + int ret; + + ret = i2c_compat_get_device(chip_addr, 1, &dev); + if (!ret) + dm_i2c_reg_write(dev, offset, val); +} diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c index 078ef0523a..227d2dfa2e 100644 --- a/drivers/mmc/bcm2835_sdhci.c +++ b/drivers/mmc/bcm2835_sdhci.c @@ -69,11 +69,11 @@ static inline void bcm2835_sdhci_raw_writel(struct sdhci_host *host, u32 val, * (Which is just as well - otherwise we'd have to nobble the DMA engine * too) */ - while (get_timer(bcm_host->last_write) < bcm_host->twoticks_delay) + while (timer_get_us() - bcm_host->last_write < bcm_host->twoticks_delay) ; writel(val, host->ioaddr + reg); - bcm_host->last_write = get_timer(0); + bcm_host->last_write = timer_get_us(); } static inline u32 bcm2835_sdhci_raw_readl(struct sdhci_host *host, int reg) diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c index 3db9669c82..7aea7e943b 100644 --- a/drivers/mmc/mmc_write.c +++ b/drivers/mmc/mmc_write.c @@ -10,6 +10,8 @@ #include <config.h> #include <common.h> #include <part.h> +#include <div64.h> +#include <linux/math64.h> #include "mmc_private.h" static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt) @@ -66,6 +68,7 @@ err_out: unsigned long mmc_berase(int dev_num, lbaint_t start, lbaint_t blkcnt) { int err = 0; + u32 start_rem, blkcnt_rem; struct mmc *mmc = find_mmc_device(dev_num); lbaint_t blk = 0, blk_r = 0; int timeout = 1000; @@ -73,7 +76,14 @@ unsigned long mmc_berase(int dev_num, lbaint_t start, lbaint_t blkcnt) if (!mmc) return -1; - if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size)) + /* + * We want to see if the requested start or total block count are + * unaligned. We discard the whole numbers and only care about the + * remainder. + */ + err = div_u64_rem(start, mmc->erase_grp_size, &start_rem); + err = div_u64_rem(blkcnt, mmc->erase_grp_size, &blkcnt_rem); + if (start_rem || blkcnt_rem) printf("\n\nCaution! Your devices Erase group is 0x%x\n" "The erase range would be change to " "0x" LBAF "~0x" LBAF "\n\n", diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index bb0814706c..e7ab828a8f 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -75,8 +75,10 @@ static int mmc_resource_init(int sdc_no) cd_pin = sunxi_mmc_getcd_gpio(sdc_no); if (cd_pin >= 0) { ret = gpio_request(cd_pin, "mmc_cd"); - if (!ret) + if (!ret) { + sunxi_gpio_set_pull(cd_pin, SUNXI_GPIO_PULL_UP); ret = gpio_direction_input(cd_pin); + } } return ret; diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile index 5467a951bb..a623f4c9fa 100644 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -5,8 +5,8 @@ # SPDX-License-Identifier: GPL-2.0+ # -ifneq (,$(findstring y,$(CONFIG_MTD_DEVICE)$(CONFIG_CMD_NAND)$(CONFIG_CMD_ONENAND))) -obj-y += mtdcore.o +ifneq (,$(findstring y,$(CONFIG_MTD_DEVICE)$(CONFIG_CMD_NAND)$(CONFIG_CMD_ONENAND)$(CONFIG_CMD_SF))) +obj-y += mtdcore.o mtd_uboot.o endif obj-$(CONFIG_MTD_PARTITIONS) += mtdpart.o obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c new file mode 100644 index 0000000000..7197007d41 --- /dev/null +++ b/drivers/mtd/mtd_uboot.c @@ -0,0 +1,99 @@ +/* + * (C) Copyright 2014 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <linux/mtd/mtd.h> +#include <jffs2/jffs2.h> + +static int get_part(const char *partname, int *idx, loff_t *off, loff_t *size, + loff_t *maxsize, int devtype) +{ +#ifdef CONFIG_CMD_MTDPARTS + struct mtd_device *dev; + struct part_info *part; + u8 pnum; + int ret; + + ret = mtdparts_init(); + if (ret) + return ret; + + ret = find_dev_and_part(partname, &dev, &pnum, &part); + if (ret) + return ret; + + if (dev->id->type != devtype) { + printf("not same typ %d != %d\n", dev->id->type, devtype); + return -1; + } + + *off = part->offset; + *size = part->size; + *maxsize = part->size; + *idx = dev->id->num; + + return 0; +#else + puts("offset is not a number\n"); + return -1; +#endif +} + +int mtd_arg_off(const char *arg, int *idx, loff_t *off, loff_t *size, + loff_t *maxsize, int devtype, int chipsize) +{ + if (!str2off(arg, off)) + return get_part(arg, idx, off, size, maxsize, devtype); + + if (*off >= chipsize) { + puts("Offset exceeds device limit\n"); + return -1; + } + + *maxsize = chipsize - *off; + *size = *maxsize; + return 0; +} + +int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off, + loff_t *size, loff_t *maxsize, int devtype, int chipsize) +{ + int ret; + + if (argc == 0) { + *off = 0; + *size = chipsize; + *maxsize = *size; + goto print; + } + + ret = mtd_arg_off(argv[0], idx, off, size, maxsize, devtype, + chipsize); + if (ret) + return ret; + + if (argc == 1) + goto print; + + if (!str2off(argv[1], size)) { + printf("'%s' is not a number\n", argv[1]); + return -1; + } + + if (*size > *maxsize) { + puts("Size exceeds partition or device limit\n"); + return -1; + } + +print: + printf("device %d ", *idx); + if (*size == chipsize) + puts("whole chip\n"); + else + printf("offset 0x%llx, size 0x%llx\n", + (unsigned long long)*off, (unsigned long long)*size); + return 0; +} diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index a0cf4d5fe4..347ea62e0b 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -73,6 +73,5 @@ obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o -obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o endif # drivers diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index 610f9698e1..4372988ed2 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -340,6 +340,125 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat, return 0; } +#ifdef CONFIG_NAND_OMAP_GPMC_PREFETCH + +#define PREFETCH_CONFIG1_CS_SHIFT 24 +#define PREFETCH_FIFOTHRESHOLD_MAX 0x40 +#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8) +#define PREFETCH_STATUS_COUNT(val) (val & 0x00003fff) +#define PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F) +#define ENABLE_PREFETCH (1 << 7) + +/** + * omap_prefetch_enable - configures and starts prefetch transfer + * @fifo_th: fifo threshold to be used for read/ write + * @count: number of bytes to be transferred + * @is_write: prefetch read(0) or write post(1) mode + * @cs: chip select to use + */ +static int omap_prefetch_enable(int fifo_th, unsigned int count, int is_write, int cs) +{ + uint32_t val; + + if (fifo_th > PREFETCH_FIFOTHRESHOLD_MAX) + return -EINVAL; + + if (readl(&gpmc_cfg->prefetch_control)) + return -EBUSY; + + /* Set the amount of bytes to be prefetched */ + writel(count, &gpmc_cfg->prefetch_config2); + + val = (cs << PREFETCH_CONFIG1_CS_SHIFT) | (is_write & 1) | + PREFETCH_FIFOTHRESHOLD(fifo_th) | ENABLE_PREFETCH; + writel(val, &gpmc_cfg->prefetch_config1); + + /* Start the prefetch engine */ + writel(1, &gpmc_cfg->prefetch_control); + + return 0; +} + +/** + * omap_prefetch_reset - disables and stops the prefetch engine + */ +static void omap_prefetch_reset(void) +{ + writel(0, &gpmc_cfg->prefetch_control); + writel(0, &gpmc_cfg->prefetch_config1); +} + +static int __read_prefetch_aligned(struct nand_chip *chip, uint32_t *buf, int len) +{ + int ret; + uint32_t cnt; + struct omap_nand_info *info = chip->priv; + + ret = omap_prefetch_enable(PREFETCH_FIFOTHRESHOLD_MAX, len, 0, info->cs); + if (ret < 0) + return ret; + + do { + int i; + + cnt = readl(&gpmc_cfg->prefetch_status); + cnt = PREFETCH_STATUS_FIFO_CNT(cnt); + + for (i = 0; i < cnt / 4; i++) { + *buf++ = readl(CONFIG_SYS_NAND_BASE); + len -= 4; + } + } while (len); + + omap_prefetch_reset(); + + return 0; +} + +static inline void omap_nand_read(struct mtd_info *mtd, uint8_t *buf, int len) +{ + struct nand_chip *chip = mtd->priv; + + if (chip->options & NAND_BUSWIDTH_16) + nand_read_buf16(mtd, buf, len); + else + nand_read_buf(mtd, buf, len); +} + +static void omap_nand_read_prefetch(struct mtd_info *mtd, uint8_t *buf, int len) +{ + int ret; + uint32_t head, tail; + struct nand_chip *chip = mtd->priv; + + /* + * If the destination buffer is unaligned, start with reading + * the overlap byte-wise. + */ + head = ((uint32_t) buf) % 4; + if (head) { + omap_nand_read(mtd, buf, head); + buf += head; + len -= head; + } + + /* + * Only transfer multiples of 4 bytes in a pre-fetched fashion. + * If there's a residue, care for it byte-wise afterwards. + */ + tail = len % 4; + + ret = __read_prefetch_aligned(chip, (uint32_t *)buf, len - tail); + if (ret < 0) { + /* fallback in case the prefetch engine is busy */ + omap_nand_read(mtd, buf, len); + } else if (tail) { + buf += len - tail; + omap_nand_read(mtd, buf, tail); + } +} +#endif /* CONFIG_NAND_OMAP_GPMC_PREFETCH */ + #ifdef CONFIG_NAND_OMAP_ELM /* * omap_reverse_list - re-orders list elements in reverse order [internal] @@ -452,115 +571,6 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat, return (err) ? err : error_count; } -#ifdef CONFIG_NAND_OMAP_GPMC_PREFETCH - -#define PREFETCH_CONFIG1_CS_SHIFT 24 -#define PREFETCH_FIFOTHRESHOLD_MAX 0x40 -#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8) -#define PREFETCH_STATUS_COUNT(val) (val & 0x00003fff) -#define PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F) -#define ENABLE_PREFETCH (1 << 7) - -/** - * omap_prefetch_enable - configures and starts prefetch transfer - * @fifo_th: fifo threshold to be used for read/ write - * @count: number of bytes to be transferred - * @is_write: prefetch read(0) or write post(1) mode - * @cs: chip select to use - */ -static int omap_prefetch_enable(int fifo_th, unsigned int count, int is_write, int cs) -{ - uint32_t val; - - if (fifo_th > PREFETCH_FIFOTHRESHOLD_MAX) - return -EINVAL; - - if (readl(&gpmc_cfg->prefetch_control)) - return -EBUSY; - - /* Set the amount of bytes to be prefetched */ - writel(count, &gpmc_cfg->prefetch_config2); - - val = (cs << PREFETCH_CONFIG1_CS_SHIFT) | (is_write & 1) | - PREFETCH_FIFOTHRESHOLD(fifo_th) | ENABLE_PREFETCH; - writel(val, &gpmc_cfg->prefetch_config1); - - /* Start the prefetch engine */ - writel(1, &gpmc_cfg->prefetch_control); - - return 0; -} - -/** - * omap_prefetch_reset - disables and stops the prefetch engine - */ -static void omap_prefetch_reset(void) -{ - writel(0, &gpmc_cfg->prefetch_control); - writel(0, &gpmc_cfg->prefetch_config1); -} - -static int __read_prefetch_aligned(struct nand_chip *chip, uint32_t *buf, int len) -{ - int ret; - uint32_t cnt; - struct omap_nand_info *info = chip->priv; - - ret = omap_prefetch_enable(PREFETCH_FIFOTHRESHOLD_MAX, len, 0, info->cs); - if (ret < 0) - return ret; - - do { - int i; - - cnt = readl(&gpmc_cfg->prefetch_status); - cnt = PREFETCH_STATUS_FIFO_CNT(cnt); - - for (i = 0; i < cnt / 4; i++) { - *buf++ = readl(CONFIG_SYS_NAND_BASE); - len -= 4; - } - } while (len); - - omap_prefetch_reset(); - - return 0; -} - -static void omap_nand_read_prefetch8(struct mtd_info *mtd, uint8_t *buf, int len) -{ - int ret; - uint32_t head, tail; - struct nand_chip *chip = mtd->priv; - - /* - * If the destination buffer is unaligned, start with reading - * the overlap byte-wise. - */ - head = ((uint32_t) buf) % 4; - if (head) { - nand_read_buf(mtd, buf, head); - buf += head; - len -= head; - } - - /* - * Only transfer multiples of 4 bytes in a pre-fetched fashion. - * If there's a residue, care for it byte-wise afterwards. - */ - tail = len % 4; - - ret = __read_prefetch_aligned(chip, (uint32_t *) buf, len - tail); - if (ret < 0) { - /* fallback in case the prefetch engine is busy */ - nand_read_buf(mtd, buf, len); - } else if (tail) { - buf += len - tail; - nand_read_buf(mtd, buf, tail); - } -} -#endif /* CONFIG_NAND_OMAP_GPMC_PREFETCH */ - /** * omap_read_page_bch - hardware ecc based page read function * @mtd: mtd info structure @@ -1011,13 +1021,11 @@ int board_nand_init(struct nand_chip *nand) if (err) return err; - /* TODO: Implement for 16-bit bus width */ - if (nand->options & NAND_BUSWIDTH_16) - nand->read_buf = nand_read_buf16; #ifdef CONFIG_NAND_OMAP_GPMC_PREFETCH - else - nand->read_buf = omap_nand_read_prefetch8; + nand->read_buf = omap_nand_read_prefetch; #else + if (nand->options & NAND_BUSWIDTH_16) + nand->read_buf = nand_read_buf16; else nand->read_buf = nand_read_buf; #endif diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c deleted file mode 100644 index 75982f54cc..0000000000 --- a/drivers/mtd/nand/sunxi_nand_spl.c +++ /dev/null @@ -1,273 +0,0 @@ -/* - * Copyright (c) 2014, Antmicro Ltd <www.antmicro.com> - * Copyright (c) 2015, Turtle Solutions <www.turtle-solutions.eu> - * Copyright (c) 2015, Roy Spliet <rspliet@ultimaker.com> - * - * SPDX-License-Identifier: GPL-2.0+ - * - * \todo Detect chip parameters (page size, ECC mode, randomisation...) - */ - -#include <common.h> -#include <config.h> -#include <asm/io.h> -#include <nand.h> -#include <asm/arch/cpu.h> -#include <asm/arch/clock.h> -#include <asm/arch/dma.h> -#include <asm/arch/nand.h> - -void -nand_init(void) -{ - struct sunxi_ccm_reg * const ccm = - (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - struct sunxi_nand * const nand = (struct sunxi_nand *)SUNXI_NFC_BASE; - u32 val; - - board_nand_init(); - - /* "un-gate" NAND clock and clock source - * This assumes that the clock was already correctly configured by - * BootROM */ - setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_NAND0)); -#ifdef CONFIG_MACH_SUN9I - setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA)); -#else - setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_DMA)); -#endif - setbits_le32(&ccm->nand0_clk_cfg, 0x80000000); - - val = readl(&nand->ctl); - val |= SUNXI_NAND_CTL_RST; - writel(val, &nand->ctl); - - /* Wait until reset pin is deasserted */ - do { - val = readl(&nand->ctl); - if (!(val & SUNXI_NAND_CTL_RST)) - break; - } while (1); - - /** \todo Chip select, currently kind of static */ - val = readl(&nand->ctl); - val &= 0xf0fff0f2; - val |= SUNXI_NAND_CTL_EN; - val |= SUNXI_NAND_CTL_PAGE_SIZE(CONFIG_NAND_SUNXI_PAGE_SIZE); - writel(val, &nand->ctl); - - writel(0x100, &nand->timing_ctl); - writel(0x7ff, &nand->timing_cfg); - - /* reset CMD */ - val = SUNXI_NAND_CMD_SEND_CMD1 | SUNXI_NAND_CMD_WAIT_FLAG | - NAND_CMD_RESET; - writel(val, &nand->cmd); - do { - val = readl(&nand->st); - if (val & (1<<1)) - break; - udelay(1000); - } while (1); - - printf("Nand initialised\n"); -} - -int -nand_wait_timeout(u32 *reg, u32 mask, u32 val) -{ - unsigned long tmo = timer_get_us() + 1000000; /* 1s */ - - while ((readl(reg) & mask) != val) { - if (timer_get_us() > tmo) - return -ETIMEDOUT; - } - - return 0; -} - -/* random seed */ -static const uint16_t random_seed[128] = { - 0x2b75, 0x0bd0, 0x5ca3, 0x62d1, 0x1c93, 0x07e9, 0x2162, 0x3a72, - 0x0d67, 0x67f9, 0x1be7, 0x077d, 0x032f, 0x0dac, 0x2716, 0x2436, - 0x7922, 0x1510, 0x3860, 0x5287, 0x480f, 0x4252, 0x1789, 0x5a2d, - 0x2a49, 0x5e10, 0x437f, 0x4b4e, 0x2f45, 0x216e, 0x5cb7, 0x7130, - 0x2a3f, 0x60e4, 0x4dc9, 0x0ef0, 0x0f52, 0x1bb9, 0x6211, 0x7a56, - 0x226d, 0x4ea7, 0x6f36, 0x3692, 0x38bf, 0x0c62, 0x05eb, 0x4c55, - 0x60f4, 0x728c, 0x3b6f, 0x2037, 0x7f69, 0x0936, 0x651a, 0x4ceb, - 0x6218, 0x79f3, 0x383f, 0x18d9, 0x4f05, 0x5c82, 0x2912, 0x6f17, - 0x6856, 0x5938, 0x1007, 0x61ab, 0x3e7f, 0x57c2, 0x542f, 0x4f62, - 0x7454, 0x2eac, 0x7739, 0x42d4, 0x2f90, 0x435a, 0x2e52, 0x2064, - 0x637c, 0x66ad, 0x2c90, 0x0bad, 0x759c, 0x0029, 0x0986, 0x7126, - 0x1ca7, 0x1605, 0x386a, 0x27f5, 0x1380, 0x6d75, 0x24c3, 0x0f8e, - 0x2b7a, 0x1418, 0x1fd1, 0x7dc1, 0x2d8e, 0x43af, 0x2267, 0x7da3, - 0x4e3d, 0x1338, 0x50db, 0x454d, 0x764d, 0x40a3, 0x42e6, 0x262b, - 0x2d2e, 0x1aea, 0x2e17, 0x173d, 0x3a6e, 0x71bf, 0x25f9, 0x0a5d, - 0x7c57, 0x0fbe, 0x46ce, 0x4939, 0x6b17, 0x37bb, 0x3e91, 0x76db, -}; - -uint32_t ecc_errors = 0; - -static void -nand_config_ecc(struct sunxi_nand *nand, uint32_t page, int syndrome) -{ - static u8 strength[] = {16, 24, 28, 32, 40, 48, 56, 60, 64}; - int i; - uint32_t ecc_mode; - u32 ecc; - u16 seed = 0; - - for (i = 0; i < ARRAY_SIZE(strength); i++) { - if (CONFIG_NAND_SUNXI_ECC_STRENGTH == strength[i]) { - ecc_mode = i; - break; - } - } - - if (i == ARRAY_SIZE(strength)) { - printf("ECC strength unsupported\n"); - return; - } - - ecc = SUNXI_NAND_ECC_CTL_ECC_EN | - SUNXI_NAND_ECC_CTL_PIPELINE | - SUNXI_NAND_ECC_CTL_RND_EN | - SUNXI_NAND_ECC_CTL_MODE(ecc_mode); - - if (CONFIG_NAND_SUNXI_ECC_STEP == 512) - ecc |= SUNXI_NAND_ECC_CTL_BS_512B; - - if (syndrome) - seed = 0x4A80; - else - seed = random_seed[page % ARRAY_SIZE(random_seed)]; - - ecc |= SUNXI_NAND_ECC_CTL_RND_SEED(seed); - - writel(ecc, &nand->ecc_ctl); -} - -/* read CONFIG_NAND_SUNXI_ECC_STEP bytes from real_addr to temp_buf */ -void -nand_read_block(struct sunxi_nand *nand, phys_addr_t src, dma_addr_t dst, - int syndrome) -{ - struct sunxi_dma * const dma = (struct sunxi_dma *)SUNXI_DMA_BASE; - struct sunxi_dma_cfg * const dma_cfg = &dma->ddma[0]; - - uint32_t shift; - uint32_t page; - uint32_t addr; - uint32_t oob_offset; - uint32_t ecc_bytes; - u32 val; - u32 cmd; - - page = src / CONFIG_NAND_SUNXI_PAGE_SIZE; - if (page > 0xFFFF) { - /* TODO: currently this is not supported */ - printf("Reading from address >= %08X is not allowed.\n", - 0xFFFF * CONFIG_NAND_SUNXI_PAGE_SIZE); - return; - } - - shift = src % CONFIG_NAND_SUNXI_PAGE_SIZE; - writel(0, &nand->ecc_st); - - /* ECC_CTL, randomization */ - ecc_bytes = CONFIG_NAND_SUNXI_ECC_STRENGTH * - fls(CONFIG_NAND_SUNXI_ECC_STEP * 8); - ecc_bytes = DIV_ROUND_UP(ecc_bytes, 8); - ecc_bytes += (ecc_bytes & 1); /* Align to 2-bytes */ - ecc_bytes += 4; - - nand_config_ecc(nand, page, syndrome); - if (syndrome) { - /* shift every 1kB in syndrome */ - shift += (shift / CONFIG_NAND_SUNXI_ECC_STEP) * ecc_bytes; - oob_offset = CONFIG_NAND_SUNXI_ECC_STEP + shift; - } else { - oob_offset = CONFIG_NAND_SUNXI_PAGE_SIZE + - (shift / CONFIG_NAND_SUNXI_ECC_STEP) * ecc_bytes; - } - - addr = (page << 16) | shift; - - /* DMA */ - val = readl(&nand->ctl); - writel(val | SUNXI_NAND_CTL_RAM_METHOD_DMA, &nand->ctl); - - writel(oob_offset, &nand->spare_area); - - /* DMAC - * \todo Separate this into a tidy driver */ - writel(0x0, &dma->irq_en); /* clear dma interrupts */ - writel((uint32_t) &nand->io_data , &dma_cfg->src_addr); - writel(dst , &dma_cfg->dst_addr); - writel(0x00007F0F , &dma_cfg->ddma_para); - writel(CONFIG_NAND_SUNXI_ECC_STEP, &dma_cfg->bc); - - val = SUNXI_DMA_CTL_SRC_DRQ(DDMA_SRC_DRQ_NAND) | - SUNXI_DMA_CTL_MODE_IO | - SUNXI_DMA_CTL_SRC_DATA_WIDTH_32 | - SUNXI_DMA_CTL_DST_DRQ(DDMA_DST_DRQ_SDRAM) | - SUNXI_DMA_CTL_DST_DATA_WIDTH_32 | - SUNXI_DMA_CTL_TRIGGER; - writel(val, &dma_cfg->ctl); - - writel(0x00E00530, &nand->rcmd_set); - nand_wait_timeout(&nand->st, SUNXI_NAND_ST_FIFO_FULL, 0); - - writel(1 , &nand->block_num); - writel(addr, &nand->addr_low); - writel(0 , &nand->addr_high); - - /* CMD (PAGE READ) */ - cmd = 0x85E80000; - cmd |= SUNXI_NAND_CMD_ADDR_CYCLES(CONFIG_NAND_SUNXI_ADDR_CYCLES); - cmd |= (syndrome ? SUNXI_NAND_CMD_ORDER_SEQ : - SUNXI_NAND_CMD_ORDER_INTERLEAVE); - writel(cmd, &nand->cmd); - - if(nand_wait_timeout(&nand->st, SUNXI_NAND_ST_DMA_INT, - SUNXI_NAND_ST_DMA_INT)) { - printf("NAND timeout reading data\n"); - return; - } - - if(nand_wait_timeout(&dma_cfg->ctl, SUNXI_DMA_CTL_TRIGGER, 0)) { - printf("NAND timeout reading data\n"); - return; - } - - if (readl(&nand->ecc_st)) - ecc_errors++; -} - -int -nand_spl_load_image(uint32_t offs, unsigned int size, void *dest) -{ - struct sunxi_nand * const nand = (struct sunxi_nand *)SUNXI_NFC_BASE; - dma_addr_t dst_block; - dma_addr_t dst_end; - phys_addr_t addr = offs; - - dst_end = ((dma_addr_t) dest) + size; - - memset((void *)dest, 0x0, size); - ecc_errors = 0; - for (dst_block = (dma_addr_t) dest; dst_block < dst_end; - dst_block += CONFIG_NAND_SUNXI_ECC_STEP, - addr += CONFIG_NAND_SUNXI_ECC_STEP) { - /* syndrome read first 4MiB to match Allwinner BootROM */ - nand_read_block(nand, addr, dst_block, addr < 0x400000); - } - - if (ecc_errors) - printf("Error: %d ECC failures detected\n", ecc_errors); - return ecc_errors == 0; -} - -void -nand_deselect(void) -{} diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index ac6d09f928..40a7981bd5 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -1,3 +1,12 @@ +config SPI_FLASH + bool "Enable SPI Flash support" + help + Enable the legacy SPI flash support. This will include basic + standard support for things like probing, read / write, and + erasing through the MTD layer. + + If unsure, say N + config DM_SPI_FLASH bool "Enable Driver Model for SPI flash" depends on DM && DM_SPI diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index c61b784e17..ed46648aa3 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -15,7 +15,9 @@ endif #ifndef CONFIG_DM_SPI obj-$(CONFIG_SPI_FLASH) += sf_probe.o #endif +obj-$(CONFIG_SF_DATAFLASH) += sf_dataflash.o obj-$(CONFIG_CMD_SF) += sf.o obj-$(CONFIG_SPI_FLASH) += sf_ops.o sf_params.o +obj-$(CONFIG_SPI_FLASH_MTD) += sf_mtd.o obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o obj-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c new file mode 100644 index 0000000000..d287db8b4c --- /dev/null +++ b/drivers/mtd/spi/sf_dataflash.c @@ -0,0 +1,711 @@ +/* + * + * Atmel DataFlash probing + * + * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc. + * Haikun Wang (haikun.wang@freescale.com) + * + * SPDX-License-Identifier: GPL-2.0+ +*/ +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h> +#include <spi.h> +#include <spi_flash.h> +#include <div64.h> +#include <linux/err.h> +#include <linux/math64.h> + +#include "sf_internal.h" + +/* + * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in + * each chip, which may be used for double buffered I/O; but this driver + * doesn't (yet) use these for any kind of i/o overlap or prefetching. + * + * Sometimes DataFlash is packaged in MMC-format cards, although the + * MMC stack can't (yet?) distinguish between MMC and DataFlash + * protocols during enumeration. + */ + +/* reads can bypass the buffers */ +#define OP_READ_CONTINUOUS 0xE8 +#define OP_READ_PAGE 0xD2 + +/* group B requests can run even while status reports "busy" */ +#define OP_READ_STATUS 0xD7 /* group B */ + +/* move data between host and buffer */ +#define OP_READ_BUFFER1 0xD4 /* group B */ +#define OP_READ_BUFFER2 0xD6 /* group B */ +#define OP_WRITE_BUFFER1 0x84 /* group B */ +#define OP_WRITE_BUFFER2 0x87 /* group B */ + +/* erasing flash */ +#define OP_ERASE_PAGE 0x81 +#define OP_ERASE_BLOCK 0x50 + +/* move data between buffer and flash */ +#define OP_TRANSFER_BUF1 0x53 +#define OP_TRANSFER_BUF2 0x55 +#define OP_MREAD_BUFFER1 0xD4 +#define OP_MREAD_BUFFER2 0xD6 +#define OP_MWERASE_BUFFER1 0x83 +#define OP_MWERASE_BUFFER2 0x86 +#define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */ +#define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */ + +/* write to buffer, then write-erase to flash */ +#define OP_PROGRAM_VIA_BUF1 0x82 +#define OP_PROGRAM_VIA_BUF2 0x85 + +/* compare buffer to flash */ +#define OP_COMPARE_BUF1 0x60 +#define OP_COMPARE_BUF2 0x61 + +/* read flash to buffer, then write-erase to flash */ +#define OP_REWRITE_VIA_BUF1 0x58 +#define OP_REWRITE_VIA_BUF2 0x59 + +/* + * newer chips report JEDEC manufacturer and device IDs; chip + * serial number and OTP bits; and per-sector writeprotect. + */ +#define OP_READ_ID 0x9F +#define OP_READ_SECURITY 0x77 +#define OP_WRITE_SECURITY_REVC 0x9A +#define OP_WRITE_SECURITY 0x9B /* revision D */ + + +struct dataflash { + uint8_t command[16]; + unsigned short page_offset; /* offset in flash address */ +}; + +/* + * Return the status of the DataFlash device. + */ +static inline int dataflash_status(struct spi_slave *spi) +{ + int ret; + u8 status; + /* + * NOTE: at45db321c over 25 MHz wants to write + * a dummy byte after the opcode... + */ + ret = spi_flash_cmd(spi, OP_READ_STATUS, &status, 1); + return ret ? -EIO : status; +} + +/* + * Poll the DataFlash device until it is READY. + * This usually takes 5-20 msec or so; more for sector erase. + * ready: return > 0 + */ +static int dataflash_waitready(struct spi_slave *spi) +{ + int status; + int timeout = 2 * CONFIG_SYS_HZ; + int timebase; + + timebase = get_timer(0); + do { + status = dataflash_status(spi); + if (status < 0) + status = 0; + + if (status & (1 << 7)) /* RDY/nBSY */ + return status; + + mdelay(3); + } while (get_timer(timebase) < timeout); + + return -ETIME; +} + +/* + * Erase pages of flash. + */ +static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len) +{ + struct dataflash *dataflash; + struct spi_flash *spi_flash; + struct spi_slave *spi; + unsigned blocksize; + uint8_t *command; + uint32_t rem; + int status; + + dataflash = dev_get_priv(dev); + spi_flash = dev_get_uclass_priv(dev); + spi = spi_flash->spi; + + blocksize = spi_flash->page_size << 3; + + memset(dataflash->command, 0 , sizeof(dataflash->command)); + command = dataflash->command; + + debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); + + div_u64_rem(len, spi_flash->page_size, &rem); + if (rem) + return -EINVAL; + div_u64_rem(offset, spi_flash->page_size, &rem); + if (rem) + return -EINVAL; + + status = spi_claim_bus(spi); + if (status) { + debug("SPI DATAFLASH: unable to claim SPI bus\n"); + return status; + } + + while (len > 0) { + unsigned int pageaddr; + int do_block; + /* + * Calculate flash page address; use block erase (for speed) if + * we're at a block boundary and need to erase the whole block. + */ + pageaddr = div_u64(offset, spi_flash->page_size); + do_block = (pageaddr & 0x7) == 0 && len >= blocksize; + pageaddr = pageaddr << dataflash->page_offset; + + command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE; + command[1] = (uint8_t)(pageaddr >> 16); + command[2] = (uint8_t)(pageaddr >> 8); + command[3] = 0; + + debug("%s ERASE %s: (%x) %x %x %x [%d]\n", + dev->name, do_block ? "block" : "page", + command[0], command[1], command[2], command[3], + pageaddr); + + status = spi_flash_cmd_write(spi, command, 4, NULL, 0); + if (status < 0) { + debug("%s: erase send command error!\n", dev->name); + return -EIO; + } + + status = dataflash_waitready(spi); + if (status < 0) { + debug("%s: erase waitready error!\n", dev->name); + return status; + } + + if (do_block) { + offset += blocksize; + len -= blocksize; + } else { + offset += spi_flash->page_size; + len -= spi_flash->page_size; + } + } + + spi_release_bus(spi); + + return 0; +} + +/* + * Read from the DataFlash device. + * offset : Start offset in flash device + * len : Amount to read + * buf : Buffer containing the data + */ +static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len, + void *buf) +{ + struct dataflash *dataflash; + struct spi_flash *spi_flash; + struct spi_slave *spi; + unsigned int addr; + uint8_t *command; + int status; + + dataflash = dev_get_priv(dev); + spi_flash = dev_get_uclass_priv(dev); + spi = spi_flash->spi; + + memset(dataflash->command, 0 , sizeof(dataflash->command)); + command = dataflash->command; + + debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); + debug("READ: (%x) %x %x %x\n", + command[0], command[1], command[2], command[3]); + + /* Calculate flash page/byte address */ + addr = (((unsigned)offset / spi_flash->page_size) + << dataflash->page_offset) + + ((unsigned)offset % spi_flash->page_size); + + status = spi_claim_bus(spi); + if (status) { + debug("SPI DATAFLASH: unable to claim SPI bus\n"); + return status; + } + + /* + * Continuous read, max clock = f(car) which may be less than + * the peak rate available. Some chips support commands with + * fewer "don't care" bytes. Both buffers stay unchanged. + */ + command[0] = OP_READ_CONTINUOUS; + command[1] = (uint8_t)(addr >> 16); + command[2] = (uint8_t)(addr >> 8); + command[3] = (uint8_t)(addr >> 0); + + /* plus 4 "don't care" bytes, command len: 4 + 4 "don't care" bytes */ + status = spi_flash_cmd_read(spi, command, 8, buf, len); + + spi_release_bus(spi); + + return status; +} + +/* + * Write to the DataFlash device. + * offset : Start offset in flash device + * len : Amount to write + * buf : Buffer containing the data + */ +int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, + const void *buf) +{ + struct dataflash *dataflash; + struct spi_flash *spi_flash; + struct spi_slave *spi; + uint8_t *command; + unsigned int pageaddr, addr, to, writelen; + size_t remaining = len; + u_char *writebuf = (u_char *)buf; + int status = -EINVAL; + + dataflash = dev_get_priv(dev); + spi_flash = dev_get_uclass_priv(dev); + spi = spi_flash->spi; + + memset(dataflash->command, 0 , sizeof(dataflash->command)); + command = dataflash->command; + + debug("%s: write 0x%x..0x%x\n", dev->name, offset, (offset + len)); + + pageaddr = ((unsigned)offset / spi_flash->page_size); + to = ((unsigned)offset % spi_flash->page_size); + if (to + len > spi_flash->page_size) + writelen = spi_flash->page_size - to; + else + writelen = len; + + status = spi_claim_bus(spi); + if (status) { + debug("SPI DATAFLASH: unable to claim SPI bus\n"); + return status; + } + + while (remaining > 0) { + debug("write @ %d:%d len=%d\n", pageaddr, to, writelen); + + /* + * REVISIT: + * (a) each page in a sector must be rewritten at least + * once every 10K sibling erase/program operations. + * (b) for pages that are already erased, we could + * use WRITE+MWRITE not PROGRAM for ~30% speedup. + * (c) WRITE to buffer could be done while waiting for + * a previous MWRITE/MWERASE to complete ... + * (d) error handling here seems to be mostly missing. + * + * Two persistent bits per page, plus a per-sector counter, + * could support (a) and (b) ... we might consider using + * the second half of sector zero, which is just one block, + * to track that state. (On AT91, that sector should also + * support boot-from-DataFlash.) + */ + + addr = pageaddr << dataflash->page_offset; + + /* (1) Maybe transfer partial page to Buffer1 */ + if (writelen != spi_flash->page_size) { + command[0] = OP_TRANSFER_BUF1; + command[1] = (addr & 0x00FF0000) >> 16; + command[2] = (addr & 0x0000FF00) >> 8; + command[3] = 0; + + debug("TRANSFER: (%x) %x %x %x\n", + command[0], command[1], command[2], command[3]); + + status = spi_flash_cmd_write(spi, command, 4, NULL, 0); + if (status < 0) { + debug("%s: write(<pagesize) command error!\n", + dev->name); + return -EIO; + } + + status = dataflash_waitready(spi); + if (status < 0) { + debug("%s: write(<pagesize) waitready error!\n", + dev->name); + return status; + } + } + + /* (2) Program full page via Buffer1 */ + addr += to; + command[0] = OP_PROGRAM_VIA_BUF1; + command[1] = (addr & 0x00FF0000) >> 16; + command[2] = (addr & 0x0000FF00) >> 8; + command[3] = (addr & 0x000000FF); + + debug("PROGRAM: (%x) %x %x %x\n", + command[0], command[1], command[2], command[3]); + + status = spi_flash_cmd_write(spi, command, + 4, writebuf, writelen); + if (status < 0) { + debug("%s: write send command error!\n", dev->name); + return -EIO; + } + + status = dataflash_waitready(spi); + if (status < 0) { + debug("%s: write waitready error!\n", dev->name); + return status; + } + +#ifdef CONFIG_SPI_DATAFLASH_WRITE_VERIFY + /* (3) Compare to Buffer1 */ + addr = pageaddr << dataflash->page_offset; + command[0] = OP_COMPARE_BUF1; + command[1] = (addr & 0x00FF0000) >> 16; + command[2] = (addr & 0x0000FF00) >> 8; + command[3] = 0; + + debug("COMPARE: (%x) %x %x %x\n", + command[0], command[1], command[2], command[3]); + + status = spi_flash_cmd_write(spi, command, + 4, writebuf, writelen); + if (status < 0) { + debug("%s: write(compare) send command error!\n", + dev->name); + return -EIO; + } + + status = dataflash_waitready(spi); + + /* Check result of the compare operation */ + if (status & (1 << 6)) { + printf("SPI DataFlash: write compare page %u, err %d\n", + pageaddr, status); + remaining = 0; + status = -EIO; + break; + } else { + status = 0; + } + +#endif /* CONFIG_SPI_DATAFLASH_WRITE_VERIFY */ + remaining = remaining - writelen; + pageaddr++; + to = 0; + writebuf += writelen; + + if (remaining > spi_flash->page_size) + writelen = spi_flash->page_size; + else + writelen = remaining; + } + + spi_release_bus(spi); + + return 0; +} + +static int add_dataflash(struct udevice *dev, char *name, int nr_pages, + int pagesize, int pageoffset, char revision) +{ + struct spi_flash *spi_flash; + struct dataflash *dataflash; + + dataflash = dev_get_priv(dev); + spi_flash = dev_get_uclass_priv(dev); + + dataflash->page_offset = pageoffset; + + spi_flash->name = name; + spi_flash->page_size = pagesize; + spi_flash->size = nr_pages * pagesize; + spi_flash->erase_size = pagesize; + +#ifndef CONFIG_SPL_BUILD + printf("SPI DataFlash: Detected %s with page size ", spi_flash->name); + print_size(spi_flash->page_size, ", erase size "); + print_size(spi_flash->erase_size, ", total "); + print_size(spi_flash->size, ""); + printf(", revision %c", revision); + puts("\n"); +#endif + + return 0; +} + +struct flash_info { + char *name; + + /* + * JEDEC id has a high byte of zero plus three data bytes: + * the manufacturer id, then a two byte device id. + */ + uint32_t jedec_id; + + /* The size listed here is what works with OP_ERASE_PAGE. */ + unsigned nr_pages; + uint16_t pagesize; + uint16_t pageoffset; + + uint16_t flags; +#define SUP_POW2PS 0x0002 /* supports 2^N byte pages */ +#define IS_POW2PS 0x0001 /* uses 2^N byte pages */ +}; + +static struct flash_info dataflash_data[] = { + /* + * NOTE: chips with SUP_POW2PS (rev D and up) need two entries, + * one with IS_POW2PS and the other without. The entry with the + * non-2^N byte page size can't name exact chip revisions without + * losing backwards compatibility for cmdlinepart. + * + * Those two entries have different name spelling format in order to + * show their difference obviously. + * The upper case refer to the chip isn't in normal 2^N bytes page-size + * mode. + * The lower case refer to the chip is in normal 2^N bytes page-size + * mode. + * + * These newer chips also support 128-byte security registers (with + * 64 bytes one-time-programmable) and software write-protection. + */ + { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS}, + { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS}, + + { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS}, + { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, + + { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS}, + { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS}, + + { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS}, + { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS}, + + { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS}, + { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS}, + + { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */ + + { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS}, + { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS}, + + { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, + { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, +}; + +static struct flash_info *jedec_probe(struct spi_slave *spi, u8 *id) +{ + int tmp; + uint32_t jedec; + struct flash_info *info; + int status; + + /* + * JEDEC also defines an optional "extended device information" + * string for after vendor-specific data, after the three bytes + * we use here. Supporting some chips might require using it. + * + * If the vendor ID isn't Atmel's (0x1f), assume this call failed. + * That's not an error; only rev C and newer chips handle it, and + * only Atmel sells these chips. + */ + if (id[0] != 0x1f) + return NULL; + + jedec = id[0]; + jedec = jedec << 8; + jedec |= id[1]; + jedec = jedec << 8; + jedec |= id[2]; + + for (tmp = 0, info = dataflash_data; + tmp < ARRAY_SIZE(dataflash_data); + tmp++, info++) { + if (info->jedec_id == jedec) { + if (info->flags & SUP_POW2PS) { + status = dataflash_status(spi); + if (status < 0) { + debug("SPI DataFlash: status error %d\n", + status); + return NULL; + } + if (status & 0x1) { + if (info->flags & IS_POW2PS) + return info; + } else { + if (!(info->flags & IS_POW2PS)) + return info; + } + } else { + return info; + } + } + } + + /* + * Treat other chips as errors ... we won't know the right page + * size (it might be binary) even when we can tell which density + * class is involved (legacy chip id scheme). + */ + printf("SPI DataFlash: Unsupported flash IDs: "); + printf("manuf %02x, jedec %04x, ext_jedec %04x\n", + id[0], jedec, id[3] << 8 | id[4]); + return NULL; +} + +/* + * Detect and initialize DataFlash device, using JEDEC IDs on newer chips + * or else the ID code embedded in the status bits: + * + * Device Density ID code #Pages PageSize Offset + * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9 + * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9 + * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9 + * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9 + * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10 + * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 + * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 + * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 + */ +static int spi_dataflash_probe(struct udevice *dev) +{ + struct spi_slave *spi = dev_get_parentdata(dev); + struct spi_flash *spi_flash; + struct flash_info *info; + u8 idcode[5]; + int ret, status = 0; + + spi_flash = dev_get_uclass_priv(dev); + spi_flash->dev = dev; + + ret = spi_claim_bus(spi); + if (ret) + return ret; + + ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); + if (ret) { + printf("SPI DataFlash: Failed to get idcodes\n"); + goto err_read_cmd; + } + + /* + * Try to detect dataflash by JEDEC ID. + * If it succeeds we know we have either a C or D part. + * D will support power of 2 pagesize option. + * Both support the security register, though with different + * write procedures. + */ + info = jedec_probe(spi, idcode); + if (info != NULL) + add_dataflash(dev, info->name, info->nr_pages, + info->pagesize, info->pageoffset, + (info->flags & SUP_POW2PS) ? 'd' : 'c'); + else { + /* + * Older chips support only legacy commands, identifing + * capacity using bits in the status byte. + */ + status = dataflash_status(spi); + if (status <= 0 || status == 0xff) { + printf("SPI DataFlash: read status error %d\n", status); + if (status == 0 || status == 0xff) + status = -ENODEV; + goto err_read_cmd; + } + /* + * if there's a device there, assume it's dataflash. + * board setup should have set spi->max_speed_max to + * match f(car) for continuous reads, mode 0 or 3. + */ + switch (status & 0x3c) { + case 0x0c: /* 0 0 1 1 x x */ + status = add_dataflash(dev, "AT45DB011B", + 512, 264, 9, 0); + break; + case 0x14: /* 0 1 0 1 x x */ + status = add_dataflash(dev, "AT45DB021B", + 1024, 264, 9, 0); + break; + case 0x1c: /* 0 1 1 1 x x */ + status = add_dataflash(dev, "AT45DB041x", + 2048, 264, 9, 0); + break; + case 0x24: /* 1 0 0 1 x x */ + status = add_dataflash(dev, "AT45DB081B", + 4096, 264, 9, 0); + break; + case 0x2c: /* 1 0 1 1 x x */ + status = add_dataflash(dev, "AT45DB161x", + 4096, 528, 10, 0); + break; + case 0x34: /* 1 1 0 1 x x */ + status = add_dataflash(dev, "AT45DB321x", + 8192, 528, 10, 0); + break; + case 0x38: /* 1 1 1 x x x */ + case 0x3c: + status = add_dataflash(dev, "AT45DB642x", + 8192, 1056, 11, 0); + break; + /* obsolete AT45DB1282 not (yet?) supported */ + default: + dev_info(&spi->dev, "unsupported device (%x)\n", + status & 0x3c); + status = -ENODEV; + goto err_read_cmd; + } + } + + /* Assign spi data */ + spi_flash->spi = spi; + spi_flash->memory_map = spi->memory_map; + spi_flash->dual_flash = spi->option; + + spi_release_bus(spi); + + return 0; + +err_read_cmd: + spi_release_bus(spi); + + return status; +} + +static const struct dm_spi_flash_ops spi_dataflash_ops = { + .read = spi_dataflash_read, + .write = spi_dataflash_write, + .erase = spi_dataflash_erase, +}; + +static const struct udevice_id spi_dataflash_ids[] = { + { .compatible = "atmel,at45", }, + { .compatible = "atmel,dataflash", }, + { } +}; + +U_BOOT_DRIVER(spi_dataflash) = { + .name = "spi_dataflash", + .id = UCLASS_SPI_FLASH, + .of_match = spi_dataflash_ids, + .probe = spi_dataflash_probe, + .priv_auto_alloc_size = sizeof(struct dataflash), + .ops = &spi_dataflash_ops, +}; diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 4158e13322..81eea8ce9d 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -218,4 +218,9 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, size_t len, void *data); +#ifdef CONFIG_SPI_FLASH_MTD +int spi_flash_mtd_register(struct spi_flash *flash); +void spi_flash_mtd_unregister(void); +#endif + #endif /* _SF_INTERNAL_H_ */ diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c new file mode 100644 index 0000000000..0b9cb62261 --- /dev/null +++ b/drivers/mtd/spi/sf_mtd.c @@ -0,0 +1,104 @@ +/* + * Copyright (C) 2012-2014 Daniel Schwierzeck, daniel.schwierzeck@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <malloc.h> +#include <asm/errno.h> +#include <linux/mtd/mtd.h> +#include <spi_flash.h> + +static struct mtd_info sf_mtd_info; +static char sf_mtd_name[8]; + +static int spi_flash_mtd_erase(struct mtd_info *mtd, struct erase_info *instr) +{ + struct spi_flash *flash = mtd->priv; + int err; + + instr->state = MTD_ERASING; + + err = spi_flash_erase(flash, instr->addr, instr->len); + if (err) { + instr->state = MTD_ERASE_FAILED; + instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; + return -EIO; + } + + instr->state = MTD_ERASE_DONE; + mtd_erase_callback(instr); + + return 0; +} + +static int spi_flash_mtd_read(struct mtd_info *mtd, loff_t from, size_t len, + size_t *retlen, u_char *buf) +{ + struct spi_flash *flash = mtd->priv; + int err; + + err = spi_flash_read(flash, from, len, buf); + if (!err) + *retlen = len; + + return err; +} + +static int spi_flash_mtd_write(struct mtd_info *mtd, loff_t to, size_t len, + size_t *retlen, const u_char *buf) +{ + struct spi_flash *flash = mtd->priv; + int err; + + err = spi_flash_write(flash, to, len, buf); + if (!err) + *retlen = len; + + return err; +} + +static void spi_flash_mtd_sync(struct mtd_info *mtd) +{ +} + +static int spi_flash_mtd_number(void) +{ +#ifdef CONFIG_SYS_MAX_FLASH_BANKS + return CONFIG_SYS_MAX_FLASH_BANKS; +#else + return 0; +#endif +} + +int spi_flash_mtd_register(struct spi_flash *flash) +{ + memset(&sf_mtd_info, 0, sizeof(sf_mtd_info)); + sprintf(sf_mtd_name, "nor%d", spi_flash_mtd_number()); + + sf_mtd_info.name = sf_mtd_name; + sf_mtd_info.type = MTD_NORFLASH; + sf_mtd_info.flags = MTD_CAP_NORFLASH; + sf_mtd_info.writesize = 1; + sf_mtd_info.writebufsize = flash->page_size; + + sf_mtd_info._erase = spi_flash_mtd_erase; + sf_mtd_info._read = spi_flash_mtd_read; + sf_mtd_info._write = spi_flash_mtd_write; + sf_mtd_info._sync = spi_flash_mtd_sync; + + sf_mtd_info.size = flash->size; + sf_mtd_info.priv = flash; + + /* Only uniform flash devices for now */ + sf_mtd_info.numeraseregions = 0; + sf_mtd_info.erasesize = flash->sector_size; + + return add_mtd_device(&sf_mtd_info); +} + +void spi_flash_mtd_unregister(void) +{ + del_mtd_device(&sf_mtd_info); +} diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 201471c392..e0283dc82c 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -372,11 +372,9 @@ int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash) puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); } #endif - - /* Release spi bus */ - spi_release_bus(spi); - - return 0; +#ifdef CONFIG_SPI_FLASH_MTD + ret = spi_flash_mtd_register(flash); +#endif err_read_id: spi_release_bus(spi); @@ -430,6 +428,9 @@ struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, void spi_flash_free(struct spi_flash *flash) { +#ifdef CONFIG_SPI_FLASH_MTD + spi_flash_mtd_unregister(); +#endif spi_free_slave(flash->spi); free(flash); } diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 973258a80c..ce76a02da0 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -11,6 +11,7 @@ config DM_ETH menuconfig NETDEVICES bool "Network device support" depends on NET + default y if DM_ETH help You must select Y to enable any network device support Generally if you have any networking support this is a given diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index d48d865bac..de87505466 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -596,6 +596,7 @@ int pci_bridge_write_config(struct udevice *bus, pci_dev_t devfn, uint offset, UCLASS_DRIVER(pci) = { .id = UCLASS_PCI, .name = "pci", + .flags = DM_UC_FLAG_SEQ_ALIAS, .post_bind = pci_uclass_post_bind, .pre_probe = pci_uclass_pre_probe, .post_probe = pci_uclass_post_probe, diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 5b6c6bc34e..157491c52d 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -186,72 +186,6 @@ pci_dev_t pci_find_devices(struct pci_device_id *ids, int index) return -1; } -/* - * - */ - -int __pci_hose_phys_to_bus(struct pci_controller *hose, - phys_addr_t phys_addr, - unsigned long flags, - unsigned long skip_mask, - pci_addr_t *ba) -{ - struct pci_region *res; - pci_addr_t bus_addr; - int i; - - for (i = 0; i < hose->region_count; i++) { - res = &hose->regions[i]; - - if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0) - continue; - - if (res->flags & skip_mask) - continue; - - bus_addr = phys_addr - res->phys_start + res->bus_start; - - if (bus_addr >= res->bus_start && - bus_addr < res->bus_start + res->size) { - *ba = bus_addr; - return 0; - } - } - - return 1; -} - -pci_addr_t pci_hose_phys_to_bus (struct pci_controller *hose, - phys_addr_t phys_addr, - unsigned long flags) -{ - pci_addr_t bus_addr = 0; - int ret; - - if (!hose) { - puts("pci_hose_phys_to_bus: invalid hose\n"); - return bus_addr; - } - - /* - * if PCI_REGION_MEM is set we do a two pass search with preference - * on matches that don't have PCI_REGION_SYS_MEMORY set - */ - if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) { - ret = __pci_hose_phys_to_bus(hose, phys_addr, - flags, PCI_REGION_SYS_MEMORY, &bus_addr); - if (!ret) - return bus_addr; - } - - ret = __pci_hose_phys_to_bus(hose, phys_addr, flags, 0, &bus_addr); - - if (ret) - puts("pci_hose_phys_to_bus: invalid physical address\n"); - - return bus_addr; -} - int pci_hose_config_device(struct pci_controller *hose, pci_dev_t dev, unsigned long io, diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index e8da977673..7c109832f6 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -14,15 +14,12 @@ #include <errno.h> #include <pci.h> -#undef DEBUG #ifdef DEBUG #define DEBUGF(x...) printf(x) #else #define DEBUGF(x...) #endif /* DEBUG */ -#define PCIAUTO_IDE_MODE_MASK 0x05 - /* the user can define CONFIG_SYS_PCI_CACHE_LINE_SIZE to avoid problems */ #ifndef CONFIG_SYS_PCI_CACHE_LINE_SIZE #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 8 @@ -425,7 +422,6 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) { unsigned int sub_bus = PCI_BUS(dev); unsigned short class; - unsigned char prg_iface; int n; pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class); @@ -461,17 +457,6 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) #endif break; - case PCI_CLASS_STORAGE_IDE: - pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prg_iface); - if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) { - DEBUGF("PCI Autoconfig: Skipping legacy mode IDE controller\n"); - return sub_bus; - } - - pciauto_setup_device(hose, dev, 6, hose->pci_mem, - hose->pci_prefetch, hose->pci_io); - break; - case PCI_CLASS_BRIDGE_CARDBUS: /* * just do a minimal setup of the bridge, diff --git a/drivers/pci/pci_common.c b/drivers/pci/pci_common.c index 24c66bbef2..b9ff23f35b 100644 --- a/drivers/pci/pci_common.c +++ b/drivers/pci/pci_common.c @@ -182,10 +182,10 @@ u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum) } int __pci_hose_bus_to_phys(struct pci_controller *hose, - pci_addr_t bus_addr, - unsigned long flags, - unsigned long skip_mask, - phys_addr_t *pa) + pci_addr_t bus_addr, + unsigned long flags, + unsigned long skip_mask, + phys_addr_t *pa) { struct pci_region *res; int i; @@ -240,6 +240,68 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller *hose, return phys_addr; } +int __pci_hose_phys_to_bus(struct pci_controller *hose, + phys_addr_t phys_addr, + unsigned long flags, + unsigned long skip_mask, + pci_addr_t *ba) +{ + struct pci_region *res; + pci_addr_t bus_addr; + int i; + + for (i = 0; i < hose->region_count; i++) { + res = &hose->regions[i]; + + if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0) + continue; + + if (res->flags & skip_mask) + continue; + + bus_addr = phys_addr - res->phys_start + res->bus_start; + + if (bus_addr >= res->bus_start && + bus_addr < res->bus_start + res->size) { + *ba = bus_addr; + return 0; + } + } + + return 1; +} + +pci_addr_t pci_hose_phys_to_bus(struct pci_controller *hose, + phys_addr_t phys_addr, + unsigned long flags) +{ + pci_addr_t bus_addr = 0; + int ret; + + if (!hose) { + puts("pci_hose_phys_to_bus: invalid hose\n"); + return bus_addr; + } + + /* + * if PCI_REGION_MEM is set we do a two pass search with preference + * on matches that don't have PCI_REGION_SYS_MEMORY set + */ + if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) { + ret = __pci_hose_phys_to_bus(hose, phys_addr, + flags, PCI_REGION_SYS_MEMORY, &bus_addr); + if (!ret) + return bus_addr; + } + + ret = __pci_hose_phys_to_bus(hose, phys_addr, flags, 0, &bus_addr); + + if (ret) + puts("pci_hose_phys_to_bus: invalid physical address\n"); + + return bus_addr; +} + pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index) { struct pci_device_id ids[2] = { {}, {0, 0} }; diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index fd7e4d499f..ca485ba90c 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -588,7 +588,9 @@ static int imx_pcie_link_up(void) udelay(10); count++; if (count >= 2000) { - debug("phy link never came up\n"); +#ifdef CONFIG_PCI_SCAN_SHOW + puts("PCI: pcie phy link never came up\n"); +#endif debug("DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n", readl(MX6_DBI_ADDR + PCIE_PHY_DEBUG_R0), readl(MX6_DBI_ADDR + PCIE_PHY_DEBUG_R1)); diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 5611fac0dc..4829284216 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -76,6 +76,26 @@ config DEBUG_UART_SHIFT value. Use this value to specify the shift to use, where 0=byte registers, 2=32-bit word registers, etc. +config SANDBOX_SERIAL + bool "Sandbox UART support" + depends on SANDBOX && DM + help + Select this to enable a seral UART for sandbox. This is required to + operate correctly, otherwise you will see no serial output from + sandbox. The emulated UART will display to the console and console + input will be fed into the UART. This allows you to interact with + U-Boot. + + The operation of the console is controlled by the -t command-line + flag. In raw mode, U-Boot sees all characters from the terminal + before they are processed, including Ctrl-C. In cooked mode, Ctrl-C + is processed by the terminal, and terminates U-Boot. Valid options + are: + + -t raw-with-sigs Raw mode, Ctrl-C will terminate U-Boot + -t raw Raw mode, Ctrl-C is processed by U-Boot + -t cooked Cooked mode, Ctrl-C terminates + config UNIPHIER_SERIAL bool "Support for UniPhier on-chip UART" depends on ARCH_UNIPHIER && DM_SERIAL diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 3d376d7580..9b044a37da 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -65,6 +65,8 @@ static inline void serial_out_shift(void *addr, int shift, int value) out_le32(addr, value); #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) out_be32(addr, value); +#elif defined(CONFIG_SYS_NS16550_MEM32) + writel(value, addr); #elif defined(CONFIG_SYS_BIG_ENDIAN) writeb(value, addr + (1 << shift) - 1); #else @@ -80,6 +82,8 @@ static inline int serial_in_shift(void *addr, int shift) return in_le32(addr); #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) return in_be32(addr); +#elif defined(CONFIG_SYS_NS16550_MEM32) + return readl(addr); #elif defined(CONFIG_SYS_BIG_ENDIAN) return readb(addr + (1 << shift) - 1); #else diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index b8c2f48228..815fec3264 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -30,49 +30,55 @@ static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE; static void serial_find_console_or_panic(void) { struct udevice *dev; - -#ifdef CONFIG_OF_CONTROL int node; - /* Check for a chosen console */ - node = fdtdec_get_chosen_node(gd->fdt_blob, "stdout-path"); - if (node < 0) - node = fdt_path_offset(gd->fdt_blob, "console"); - if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node, &dev)) { - gd->cur_serial_dev = dev; - return; - } - - /* - * If the console is not marked to be bound before relocation, bind - * it anyway. - */ - if (node > 0 && - !lists_bind_fdt(gd->dm_root, gd->fdt_blob, node, &dev)) { - if (!device_probe(dev)) { + if (OF_CONTROL && gd->fdt_blob) { + /* Check for a chosen console */ + node = fdtdec_get_chosen_node(gd->fdt_blob, "stdout-path"); + if (node < 0) + node = fdt_path_offset(gd->fdt_blob, "console"); + if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node, + &dev)) { gd->cur_serial_dev = dev; return; } + + /* + * If the console is not marked to be bound before relocation, + * bind it anyway. + */ + if (node > 0 && + !lists_bind_fdt(gd->dm_root, gd->fdt_blob, node, &dev)) { + if (!device_probe(dev)) { + gd->cur_serial_dev = dev; + return; + } + } } -#endif - /* - * Try to use CONFIG_CONS_INDEX if available (it is numbered from 1!). - * - * Failing that, get the device with sequence number 0, or in extremis - * just the first serial device we can find. But we insist on having - * a console (even if it is silent). - */ + if (!SPL_BUILD || !OF_CONTROL || !gd->fdt_blob) { + /* + * Try to use CONFIG_CONS_INDEX if available (it is numbered + * from 1!). + * + * Failing that, get the device with sequence number 0, or in + * extremis just the first serial device we can find. But we + * insist on having a console (even if it is silent). + */ #ifdef CONFIG_CONS_INDEX #define INDEX (CONFIG_CONS_INDEX - 1) #else #define INDEX 0 #endif - if (uclass_get_device_by_seq(UCLASS_SERIAL, INDEX, &dev) && - uclass_get_device(UCLASS_SERIAL, INDEX, &dev) && - (uclass_first_device(UCLASS_SERIAL, &dev) || !dev)) - panic_str("No serial driver found"); + if (!uclass_get_device_by_seq(UCLASS_SERIAL, INDEX, &dev) || + !uclass_get_device(UCLASS_SERIAL, INDEX, &dev) || + (!uclass_first_device(UCLASS_SERIAL, &dev) || dev)) { + gd->cur_serial_dev = dev; + return; + } #undef INDEX - gd->cur_serial_dev = dev; + } + + panic_str("No serial driver found"); } /* Called prior to relocation */ diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c index 4bec66309e..d7eecd5bc6 100644 --- a/drivers/spi/tegra114_spi.c +++ b/drivers/spi/tegra114_spi.c @@ -143,24 +143,30 @@ static int tegra114_spi_probe(struct udevice *bus) { struct tegra_spi_platdata *plat = dev_get_platdata(bus); struct tegra114_spi_priv *priv = dev_get_priv(bus); + struct spi_regs *regs; + ulong rate; priv->regs = (struct spi_regs *)plat->base; + regs = priv->regs; priv->last_transaction_us = timer_get_us(); priv->freq = plat->frequency; priv->periph_id = plat->periph_id; - return 0; -} - -static int tegra114_spi_claim_bus(struct udevice *dev) -{ - struct udevice *bus = dev->parent; - struct tegra114_spi_priv *priv = dev_get_priv(bus); - struct spi_regs *regs = priv->regs; - - /* Change SPI clock to correct frequency, PLLP_OUT0 source */ - clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, priv->freq); + /* + * Change SPI clock to correct frequency, PLLP_OUT0 source, falling + * back to the oscillator if that is too fast. + */ + rate = clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, + priv->freq); + if (rate > priv->freq + 100000) { + rate = clock_start_periph_pll(priv->periph_id, CLOCK_ID_OSC, + priv->freq); + if (rate != priv->freq) { + printf("Warning: SPI '%s' requested clock %u, actual clock %lu\n", + bus->name, priv->freq, rate); + } + } /* Clear stale status here */ setbits_le32(®s->fifo_status, @@ -175,9 +181,8 @@ static int tegra114_spi_claim_bus(struct udevice *dev) SPI_FIFO_STS_RX_FIFO_EMPTY); debug("%s: FIFO STATUS = %08x\n", __func__, readl(®s->fifo_status)); - /* Set master mode and sw controlled CS */ - setbits_le32(®s->command1, SPI_CMD1_M_S | SPI_CMD1_CS_SW_HW | - (priv->mode << SPI_CMD1_MODE_SHIFT)); + setbits_le32(&priv->regs->command1, SPI_CMD1_M_S | SPI_CMD1_CS_SW_HW | + (priv->mode << SPI_CMD1_MODE_SHIFT) | SPI_CMD1_CS_SW_VAL); debug("%s: COMMAND1 = %08x\n", __func__, readl(®s->command1)); return 0; @@ -249,6 +254,9 @@ static int tegra114_spi_xfer(struct udevice *dev, unsigned int bitlen, ret = 0; + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(dev); + /* clear all error status bits */ reg = readl(®s->fifo_status); writel(reg, ®s->fifo_status); @@ -260,9 +268,6 @@ static int tegra114_spi_xfer(struct udevice *dev, unsigned int bitlen, /* set xfer size to 1 block (32 bits) */ writel(0, ®s->dma_blk); - if (flags & SPI_XFER_BEGIN) - spi_cs_activate(dev); - /* handle data in 32-bit chunks */ while (num_bytes > 0) { int bytes; @@ -385,7 +390,6 @@ static int tegra114_spi_set_mode(struct udevice *bus, uint mode) } static const struct dm_spi_ops tegra114_spi_ops = { - .claim_bus = tegra114_spi_claim_bus, .xfer = tegra114_spi_xfer, .set_speed = tegra114_spi_set_speed, .set_mode = tegra114_spi_set_mode, diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile index e455a5279c..02bb216db7 100644 --- a/drivers/usb/dwc3/Makefile +++ b/drivers/usb/dwc3/Makefile @@ -6,3 +6,4 @@ dwc3-y += gadget.o ep0.o obj-$(CONFIG_USB_DWC3_OMAP) += dwc3-omap.o obj-$(CONFIG_USB_DWC3_PHY_OMAP) += ti_usb_phy.o +obj-$(CONFIG_USB_DWC3_PHY_SAMSUNG) += samsung_usb_phy.o diff --git a/drivers/usb/dwc3/samsung_usb_phy.c b/drivers/usb/dwc3/samsung_usb_phy.c new file mode 100644 index 0000000000..4220986548 --- /dev/null +++ b/drivers/usb/dwc3/samsung_usb_phy.c @@ -0,0 +1,78 @@ +/** + * samsung_usb_phy.c - DesignWare USB3 (DWC3) PHY handling file + * + * Copyright (C) 2015 Samsung Electronics + * + * Author: Joonyoung Shim <jy0922.shim@samsung.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <asm/arch/power.h> +#include <asm/arch/xhci-exynos.h> + +void exynos5_usb3_phy_init(struct exynos_usb3_phy *phy) +{ + u32 reg; + + /* Reset USB 3.0 PHY */ + writel(0x0, &phy->phy_reg0); + + clrbits_le32(&phy->phy_param0, + /* Select PHY CLK source */ + PHYPARAM0_REF_USE_PAD | + /* Set Loss-of-Signal Detector sensitivity */ + PHYPARAM0_REF_LOSLEVEL_MASK); + setbits_le32(&phy->phy_param0, PHYPARAM0_REF_LOSLEVEL); + + + writel(0x0, &phy->phy_resume); + + /* + * Setting the Frame length Adj value[6:1] to default 0x20 + * See xHCI 1.0 spec, 5.2.4 + */ + setbits_le32(&phy->link_system, + LINKSYSTEM_XHCI_VERSION_CONTROL | + LINKSYSTEM_FLADJ(0x20)); + + /* Set Tx De-Emphasis level */ + clrbits_le32(&phy->phy_param1, PHYPARAM1_PCS_TXDEEMPH_MASK); + setbits_le32(&phy->phy_param1, PHYPARAM1_PCS_TXDEEMPH); + + setbits_le32(&phy->phy_batchg, PHYBATCHG_UTMI_CLKSEL); + + /* PHYTEST POWERDOWN Control */ + clrbits_le32(&phy->phy_test, + PHYTEST_POWERDOWN_SSP | + PHYTEST_POWERDOWN_HSP); + + /* UTMI Power Control */ + writel(PHYUTMI_OTGDISABLE, &phy->phy_utmi); + + /* Use core clock from main PLL */ + reg = PHYCLKRST_REFCLKSEL_EXT_REFCLK | + /* Default 24Mhz crystal clock */ + PHYCLKRST_FSEL(FSEL_CLKSEL_24M) | + PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF | + PHYCLKRST_SSC_REFCLKSEL(0) | + /* Force PortReset of PHY */ + PHYCLKRST_PORTRESET | + /* Digital power supply in normal operating mode */ + PHYCLKRST_RETENABLEN | + /* Enable ref clock for SS function */ + PHYCLKRST_REF_SSP_EN | + /* Enable spread spectrum */ + PHYCLKRST_SSC_EN | + /* Power down HS Bias and PLL blocks in suspend mode */ + PHYCLKRST_COMMONONN; + + writel(reg, &phy->phy_clk_rst); + + /* giving time to Phy clock to settle before resetting */ + udelay(10); + + reg &= ~PHYCLKRST_PORTRESET; + writel(reg, &phy->phy_clk_rst); +} diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c index d1bc5efa9b..abe9391d3d 100644 --- a/drivers/usb/gadget/f_mass_storage.c +++ b/drivers/usb/gadget/f_mass_storage.c @@ -671,7 +671,7 @@ static int sleep_thread(struct fsg_common *common) if (common->thread_wakeup_needed) break; - if (++i == 50000) { + if (++i == 20000) { busy_indicator(); i = 0; k++; diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index 5fd618df87..97b7f14542 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -76,7 +76,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, break; default: printf("ERROR: wrong controller index!!\n"); - break; + return -EINVAL; }; *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 1e5a6e2b20..bf02221c9f 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -1214,6 +1214,7 @@ static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe, struct int_queue { int elementsize; + unsigned long pipe; struct QH *first; struct QH *current; struct QH *last; @@ -1269,7 +1270,7 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, { struct ehci_ctrl *ctrl = ehci_get_ctrl(dev); struct int_queue *result = NULL; - int i; + uint32_t i, toggle; /* * Interrupt transfers requiring several transactions are not supported @@ -1309,6 +1310,7 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, goto fail1; } result->elementsize = elementsize; + result->pipe = pipe; result->first = memalign(USB_DMA_MINALIGN, sizeof(struct QH) * queuesize); if (!result->first) { @@ -1326,6 +1328,8 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, memset(result->first, 0, sizeof(struct QH) * queuesize); memset(result->tds, 0, sizeof(struct qTD) * queuesize); + toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)); + for (i = 0; i < queuesize; i++) { struct QH *qh = result->first + i; struct qTD *td = result->tds + i; @@ -1357,7 +1361,9 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); debug("communication direction is '%s'\n", usb_pipein(pipe) ? "in" : "out"); - td->qt_token = cpu_to_hc32((elementsize << 16) | + td->qt_token = cpu_to_hc32( + QT_TOKEN_DT(toggle) | + (elementsize << 16) | ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */ 0x80); /* active */ td->qt_buffer[0] = @@ -1372,6 +1378,7 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff); *buf = buffer + i * elementsize; + toggle ^= 1; } flush_dcache_range((unsigned long)buffer, @@ -1426,6 +1433,8 @@ static void *_ehci_poll_int_queue(struct usb_device *dev, { struct QH *cur = queue->current; struct qTD *cur_td; + uint32_t token, toggle; + unsigned long pipe = queue->pipe; /* depleted queue */ if (cur == NULL) { @@ -1436,12 +1445,15 @@ static void *_ehci_poll_int_queue(struct usb_device *dev, cur_td = &queue->tds[queue->current - queue->first]; invalidate_dcache_range((unsigned long)cur_td, ALIGN_END_ADDR(struct qTD, cur_td, 1)); - if (QT_TOKEN_GET_STATUS(hc32_to_cpu(cur_td->qt_token)) & - QT_TOKEN_STATUS_ACTIVE) { - debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", - hc32_to_cpu(cur_td->qt_token)); + token = hc32_to_cpu(cur_td->qt_token); + if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) { + debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token); return NULL; } + + toggle = QT_TOKEN_GET_DT(token); + usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle); + if (!(cur->qh_link & QH_LINK_TERMINATE)) queue->current++; else @@ -1452,7 +1464,7 @@ static void *_ehci_poll_int_queue(struct usb_device *dev, queue->elementsize)); debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n", - hc32_to_cpu(cur_td->qt_token), cur, queue->first); + token, cur, queue->first); return cur->buffer; } diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index 27705d6627..e2574d7958 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -35,12 +35,6 @@ DECLARE_GLOBAL_DATA_PTR; #endif #endif -#ifndef CONFIG_DM_USB -enum { - USB_PORTS_MAX = 3, /* Maximum ports we allow */ -}; -#endif - /* Parameters we need for USB */ enum { PARAM_DIVN, /* PLL FEEDBACK DIVIDer */ @@ -82,9 +76,6 @@ struct fdt_usb { unsigned ulpi:1; /* 1 if port has external ULPI transceiver */ unsigned enabled:1; /* 1 to enable, 0 to disable */ unsigned has_legacy_mode:1; /* 1 if this port has legacy mode */ -#ifndef CONFIG_DM_USB - unsigned initialized:1; /* has this port already been initialized? */ -#endif enum usb_ctlr_type type; enum usb_init_type init_type; enum dr_mode dr_mode; /* dual role mode */ @@ -93,11 +84,6 @@ struct fdt_usb { struct gpio_desc phy_reset_gpio; /* GPIO to reset ULPI phy */ }; -#ifndef CONFIG_DM_USB -static struct fdt_usb port[USB_PORTS_MAX]; /* List of valid USB ports */ -static unsigned port_count; /* Number of available ports */ -#endif - /* * This table has USB timing parameters for each Oscillator frequency we * support. There are four sets of values: @@ -173,8 +159,6 @@ static const u8 utmip_elastic_limit = 16; static const u8 utmip_hs_sync_start_delay = 9; struct fdt_usb_controller { - /* TODO(sjg@chromium.org): Remove when we only use driver model */ - int compat; /* flag to determine whether controller supports hostpc register */ u32 has_hostpc:1; const unsigned *pll_parameter; @@ -182,17 +166,14 @@ struct fdt_usb_controller { static struct fdt_usb_controller fdt_usb_controllers[USB_CTRL_COUNT] = { { - .compat = COMPAT_NVIDIA_TEGRA20_USB, .has_hostpc = 0, .pll_parameter = (const unsigned *)T20_usb_pll, }, { - .compat = COMPAT_NVIDIA_TEGRA30_USB, .has_hostpc = 1, .pll_parameter = (const unsigned *)T30_usb_pll, }, { - .compat = COMPAT_NVIDIA_TEGRA114_USB, .has_hostpc = 1, .pll_parameter = (const unsigned *)T114_usb_pll, }, @@ -754,12 +735,6 @@ int usb_common_init(struct fdt_usb *config, enum usb_init_type init) return -1; } -#ifndef CONFIG_DM_USB - /* skip init, if the port is already initialized */ - if (config->initialized && config->init_type == init) - return 0; -#endif - debug("%d, %d\n", config->utmi, config->ulpi); if (config->utmi) ret = init_utmi_usb_controller(config, init); @@ -796,130 +771,6 @@ static const struct ehci_ops tegra_ehci_ops = { .powerup_fixup = tegra_ehci_powerup_fixup, }; -#ifndef CONFIG_DM_USB -/* - * process_usb_nodes() - Process a list of USB nodes, adding them to our list - * of USB ports. - * @blob: fdt blob - * @node_list: list of nodes to process (any <=0 are ignored) - * @count: number of nodes to process - * @id: controller type (enum usb_ctlr_type) - * - * Return: 0 - ok, -1 - error - */ -static int process_usb_nodes(const void *blob, int node_list[], int count, - enum usb_ctlr_type id) -{ - struct fdt_usb config; - int node, i; - int clk_done = 0; - - port_count = 0; - for (i = 0; i < count; i++) { - if (port_count == USB_PORTS_MAX) { - printf("tegrausb: Cannot register more than %d ports\n", - USB_PORTS_MAX); - return -1; - } - - debug("USB %d: ", i); - node = node_list[i]; - if (!node) - continue; - if (fdt_decode_usb(blob, node, &config)) { - debug("Cannot decode USB node %s\n", - fdt_get_name(blob, node, NULL)); - return -1; - } - if (!clk_done) { - config_clock(get_pll_timing( - &fdt_usb_controllers[id])); - clk_done = 1; - } - config.type = id; - config.initialized = 0; - - /* add new USB port to the list of available ports */ - port[port_count++] = config; - } - - return 0; -} - -int usb_process_devicetree(const void *blob) -{ - int node_list[USB_PORTS_MAX]; - int count, err = 0; - int i; - - for (i = 0; i < ARRAY_SIZE(fdt_usb_controllers); i++) { - count = fdtdec_find_aliases_for_id(blob, "usb", - fdt_usb_controllers[i].compat, node_list, - USB_PORTS_MAX); - if (count) { - err = process_usb_nodes(blob, node_list, count, i); - if (err) - printf("%s: Error processing USB node!\n", - __func__); - return err; - } - } - - return err; -} - -/** - * Start up the given port number (ports are numbered from 0 on each board). - * This returns values for the appropriate hccr and hcor addresses to use for - * USB EHCI operations. - * - * @param index port number to start - * @param hccr returns start address of EHCI HCCR registers - * @param hcor returns start address of EHCI HCOR registers - * @return 0 if ok, -1 on error (generally invalid port number) - */ -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - struct fdt_usb *config; - struct usb_ctlr *usbctlr; - int ret; - - if (index >= port_count) - return -1; - - config = &port[index]; - ehci_set_controller_priv(index, config, &tegra_ehci_ops); - - ret = usb_common_init(config, init); - if (ret) { - printf("tegrausb: Cannot init port %d\n", index); - return ret; - } - - config->initialized = 1; - - usbctlr = config->reg; - *hccr = (struct ehci_hccr *)&usbctlr->cap_length; - *hcor = (struct ehci_hcor *)&usbctlr->usb_cmd; - - return 0; -} - -/* - * Bring down the specified USB controller - */ -int ehci_hcd_stop(int index) -{ - usb_common_uninit(&port[index]); - - port[index].initialized = 0; - - return 0; -} -#endif /* !CONFIG_DM_USB */ - -#ifdef CONFIG_DM_USB static int ehci_usb_ofdata_to_platdata(struct udevice *dev) { struct fdt_usb *priv = dev_get_priv(dev); @@ -987,4 +838,3 @@ U_BOOT_DRIVER(usb_ehci) = { .priv_auto_alloc_size = sizeof(struct fdt_usb), .flags = DM_FLAG_ALLOC_PRIV_DMA, }; -#endif diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c index 54548554df..98e0fc6ca6 100644 --- a/drivers/usb/host/ehci-vf.c +++ b/drivers/usb/host/ehci-vf.c @@ -121,6 +121,11 @@ static void usb_oc_config(int index) setbits_le32(ctrl, UCTRL_OVER_CUR_DIS); } +int __weak board_ehci_hcd_init(int port) +{ + return 0; +} + int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { @@ -136,6 +141,9 @@ int ehci_hcd_init(int index, enum usb_init_type init, ehci = (struct usb_ehci *)nc_reg_bases[index]; + /* Do board specific initialisation */ + board_ehci_hcd_init(index); + usb_power_config(index); usb_oc_config(index); usb_internal_phy_clock_gate(index); diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c index 963464cff9..6e86f4a24a 100644 --- a/drivers/usb/host/usb-uclass.c +++ b/drivers/usb/host/usb-uclass.c @@ -628,6 +628,49 @@ int usb_scan_device(struct udevice *parent, int port, return 0; } +/* + * Detect if a USB device has been plugged or unplugged. + */ +int usb_detect_change(void) +{ + struct udevice *hub; + struct uclass *uc; + int change = 0; + int ret; + + ret = uclass_get(UCLASS_USB_HUB, &uc); + if (ret) + return ret; + + uclass_foreach_dev(hub, uc) { + struct usb_device *udev; + struct udevice *dev; + + if (!device_active(hub)) + continue; + for (device_find_first_child(hub, &dev); + dev; + device_find_next_child(&dev)) { + struct usb_port_status status; + + if (!device_active(dev)) + continue; + + udev = dev_get_parentdata(dev); + if (usb_get_port_status(udev, udev->portnr, &status) + < 0) + /* USB request failed */ + continue; + + if (le16_to_cpu(status.wPortChange) & + USB_PORT_STAT_C_CONNECTION) + change++; + } + } + + return change; +} + int usb_child_post_bind(struct udevice *dev) { struct usb_dev_platdata *plat = dev_get_parent_platdata(dev); diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index e8a3a23aa4..052e0657d0 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -105,16 +105,6 @@ static void USBC_EnableIdPullUp(__iomem void *base) musb_writel(base, USBC_REG_o_ISCR, reg_val); } -static void USBC_DisableIdPullUp(__iomem void *base) -{ - u32 reg_val; - - reg_val = musb_readl(base, USBC_REG_o_ISCR); - reg_val &= ~(1 << USBC_BP_ISCR_ID_PULLUP_EN); - reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); - musb_writel(base, USBC_REG_o_ISCR, reg_val); -} - static void USBC_EnableDpDmPullUp(__iomem void *base) { u32 reg_val; @@ -125,34 +115,35 @@ static void USBC_EnableDpDmPullUp(__iomem void *base) musb_writel(base, USBC_REG_o_ISCR, reg_val); } -static void USBC_DisableDpDmPullUp(__iomem void *base) +static void USBC_ForceIdToLow(__iomem void *base) { u32 reg_val; reg_val = musb_readl(base, USBC_REG_o_ISCR); - reg_val &= ~(1 << USBC_BP_ISCR_DPDM_PULLUP_EN); + reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID); + reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID); reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); musb_writel(base, USBC_REG_o_ISCR, reg_val); } -static void USBC_ForceIdToLow(__iomem void *base) +static void USBC_ForceIdToHigh(__iomem void *base) { u32 reg_val; reg_val = musb_readl(base, USBC_REG_o_ISCR); reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID); - reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID); + reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID); reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); musb_writel(base, USBC_REG_o_ISCR, reg_val); } -static void USBC_ForceIdToHigh(__iomem void *base) +static void USBC_ForceVbusValidToLow(__iomem void *base) { u32 reg_val; reg_val = musb_readl(base, USBC_REG_o_ISCR); - reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID); - reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID); + reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID); + reg_val |= (0x02 << USBC_BP_ISCR_FORCE_VBUS_VALID); reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); musb_writel(base, USBC_REG_o_ISCR, reg_val); } @@ -205,42 +196,41 @@ static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci) return retval; } +/* musb_core does not call enable / disable in a balanced manner <sigh> */ +static bool enabled = false; + static void sunxi_musb_enable(struct musb *musb) { pr_debug("%s():\n", __func__); + if (enabled) + return; + /* select PIO mode */ musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0); - if (is_host_enabled(musb)) { - /* port power on */ - sunxi_usb_phy_power_on(0); - } + if (is_host_enabled(musb)) + sunxi_usb_phy_power_on(0); /* port power on */ + + USBC_ForceVbusValidToHigh(musb->mregs); + + enabled = true; } static void sunxi_musb_disable(struct musb *musb) { - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - pr_debug("%s():\n", __func__); - /* Put the controller back in a pristane state for "usb reset" */ - if (musb->is_active) { - sunxi_usb_phy_exit(0); -#ifdef CONFIG_SUNXI_GEN_SUN6I - clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); -#endif - clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); + if (!enabled) + return; - mdelay(10); + if (is_host_enabled(musb)) + sunxi_usb_phy_power_off(0); /* port power off */ - setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); -#ifdef CONFIG_SUNXI_GEN_SUN6I - setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); -#endif - sunxi_usb_phy_init(0); - musb->is_active = 0; - } + USBC_ForceVbusValidToLow(musb->mregs); + mdelay(200); /* Wait for the current session to timeout */ + + enabled = false; } static int sunxi_musb_init(struct musb *musb) @@ -282,22 +272,8 @@ static int sunxi_musb_init(struct musb *musb) return 0; } -static int sunxi_musb_exit(struct musb *musb) -{ - pr_debug("%s():\n", __func__); - - USBC_DisableDpDmPullUp(musb->mregs); - USBC_DisableIdPullUp(musb->mregs); - sunxi_usb_phy_power_off(0); - sunxi_usb_phy_exit(0); - - return 0; -} - const struct musb_platform_ops sunxi_musb_ops = { .init = sunxi_musb_init, - .exit = sunxi_musb_exit, - .enable = sunxi_musb_enable, .disable = sunxi_musb_disable, }; diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 2544301614..9ae23e8dd0 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -1,6 +1,5 @@ config VIDEO_VESA bool "Enable VESA video driver support" - depends on X86 default n help Turn on this option to enable a very simple driver which uses vesa @@ -8,6 +7,144 @@ config VIDEO_VESA by U-Boot. This can in principle be used with any platform that supports PCI and video cards that support VESA BIOS Extension (VBE). +config FRAMEBUFFER_SET_VESA_MODE + bool "Set framebuffer graphics resolution" + depends on VIDEO_VESA + help + Set VESA/native framebuffer mode (needed for bootsplash and graphical + framebuffer console) + +choice + prompt "framebuffer graphics resolution" + default FRAMEBUFFER_VESA_MODE_117 + depends on FRAMEBUFFER_SET_VESA_MODE + help + This option sets the resolution used for the U-Boot framebuffer (and + bootsplash screen). + +config FRAMEBUFFER_VESA_MODE_100 + bool "640x400 256-color" + +config FRAMEBUFFER_VESA_MODE_101 + bool "640x480 256-color" + +config FRAMEBUFFER_VESA_MODE_102 + bool "800x600 16-color" + +config FRAMEBUFFER_VESA_MODE_103 + bool "800x600 256-color" + +config FRAMEBUFFER_VESA_MODE_104 + bool "1024x768 16-color" + +config FRAMEBUFFER_VESA_MODE_105 + bool "1024x7686 256-color" + +config FRAMEBUFFER_VESA_MODE_106 + bool "1280x1024 16-color" + +config FRAMEBUFFER_VESA_MODE_107 + bool "1280x1024 256-color" + +config FRAMEBUFFER_VESA_MODE_108 + bool "80x60 text" + +config FRAMEBUFFER_VESA_MODE_109 + bool "132x25 text" + +config FRAMEBUFFER_VESA_MODE_10A + bool "132x43 text" + +config FRAMEBUFFER_VESA_MODE_10B + bool "132x50 text" + +config FRAMEBUFFER_VESA_MODE_10C + bool "132x60 text" + +config FRAMEBUFFER_VESA_MODE_10D + bool "320x200 32k-color (1:5:5:5)" + +config FRAMEBUFFER_VESA_MODE_10E + bool "320x200 64k-color (5:6:5)" + +config FRAMEBUFFER_VESA_MODE_10F + bool "320x200 16.8M-color (8:8:8)" + +config FRAMEBUFFER_VESA_MODE_110 + bool "640x480 32k-color (1:5:5:5)" + +config FRAMEBUFFER_VESA_MODE_111 + bool "640x480 64k-color (5:6:5)" + +config FRAMEBUFFER_VESA_MODE_112 + bool "640x480 16.8M-color (8:8:8)" + +config FRAMEBUFFER_VESA_MODE_113 + bool "800x600 32k-color (1:5:5:5)" + +config FRAMEBUFFER_VESA_MODE_114 + bool "800x600 64k-color (5:6:5)" + +config FRAMEBUFFER_VESA_MODE_115 + bool "800x600 16.8M-color (8:8:8)" + +config FRAMEBUFFER_VESA_MODE_116 + bool "1024x768 32k-color (1:5:5:5)" + +config FRAMEBUFFER_VESA_MODE_117 + bool "1024x768 64k-color (5:6:5)" + +config FRAMEBUFFER_VESA_MODE_118 + bool "1024x768 16.8M-color (8:8:8)" + +config FRAMEBUFFER_VESA_MODE_119 + bool "1280x1024 32k-color (1:5:5:5)" + +config FRAMEBUFFER_VESA_MODE_11A + bool "1280x1024 64k-color (5:6:5)" + +config FRAMEBUFFER_VESA_MODE_11B + bool "1280x1024 16.8M-color (8:8:8)" + +config FRAMEBUFFER_VESA_MODE_USER + bool "Manually select VESA mode" + +endchoice + +# Map the config names to an integer (KB). +config FRAMEBUFFER_VESA_MODE + prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER + hex + default 0x100 if FRAMEBUFFER_VESA_MODE_100 + default 0x101 if FRAMEBUFFER_VESA_MODE_101 + default 0x102 if FRAMEBUFFER_VESA_MODE_102 + default 0x103 if FRAMEBUFFER_VESA_MODE_103 + default 0x104 if FRAMEBUFFER_VESA_MODE_104 + default 0x105 if FRAMEBUFFER_VESA_MODE_105 + default 0x106 if FRAMEBUFFER_VESA_MODE_106 + default 0x107 if FRAMEBUFFER_VESA_MODE_107 + default 0x108 if FRAMEBUFFER_VESA_MODE_108 + default 0x109 if FRAMEBUFFER_VESA_MODE_109 + default 0x10A if FRAMEBUFFER_VESA_MODE_10A + default 0x10B if FRAMEBUFFER_VESA_MODE_10B + default 0x10C if FRAMEBUFFER_VESA_MODE_10C + default 0x10D if FRAMEBUFFER_VESA_MODE_10D + default 0x10E if FRAMEBUFFER_VESA_MODE_10E + default 0x10F if FRAMEBUFFER_VESA_MODE_10F + default 0x110 if FRAMEBUFFER_VESA_MODE_110 + default 0x111 if FRAMEBUFFER_VESA_MODE_111 + default 0x112 if FRAMEBUFFER_VESA_MODE_112 + default 0x113 if FRAMEBUFFER_VESA_MODE_113 + default 0x114 if FRAMEBUFFER_VESA_MODE_114 + default 0x115 if FRAMEBUFFER_VESA_MODE_115 + default 0x116 if FRAMEBUFFER_VESA_MODE_116 + default 0x117 if FRAMEBUFFER_VESA_MODE_117 + default 0x118 if FRAMEBUFFER_VESA_MODE_118 + default 0x119 if FRAMEBUFFER_VESA_MODE_119 + default 0x11A if FRAMEBUFFER_VESA_MODE_11A + default 0x11B if FRAMEBUFFER_VESA_MODE_11B + default 0x117 if FRAMEBUFFER_VESA_MODE_USER + config VIDEO_LCD_SSD2828 bool "SSD2828 bridge chip" default n diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 4ed3a49bec..d43d8a59d3 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -81,12 +81,12 @@ void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue) #endif } -void lcd_set_cmap(bmp_image_t *bmp, unsigned colors) +void lcd_set_cmap(struct bmp_image *bmp, unsigned colors) { int i; for (i = 0; i < colors; ++i) { - bmp_color_table_entry_t cte = bmp->color_table[i]; + struct bmp_color_table_entry cte = bmp->color_table[i]; lcd_setcolreg(i, cte.red, cte.green, cte.blue); } } diff --git a/drivers/video/bus_vcxk.c b/drivers/video/bus_vcxk.c index 60a5cc5b71..2f54d3d147 100644 --- a/drivers/video/bus_vcxk.c +++ b/drivers/video/bus_vcxk.c @@ -358,7 +358,7 @@ void vcxk_draw_mono(unsigned char *dataptr, unsigned long linewidth, int vcxk_display_bitmap(ulong addr, int x, int y) { - bmp_image_t *bmp; + struct bmp_image *bmp; unsigned long width; unsigned long height; unsigned long bpp; @@ -369,7 +369,7 @@ int vcxk_display_bitmap(ulong addr, int x, int y) unsigned long c_height; unsigned char *dataptr; - bmp = (bmp_image_t *) addr; + bmp = (struct bmp_image *)addr; if ((bmp->header.signature[0] == 'B') && (bmp->header.signature[1] == 'M')) { width = le32_to_cpu(bmp->header.width); diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c index f4231b8e62..7f2ddc10c6 100644 --- a/drivers/video/cfb_console.c +++ b/drivers/video/cfb_console.c @@ -1295,7 +1295,7 @@ static void draw_bitmap(uchar **fb, uchar *bm, struct palette *p, *fb = (uchar *) addr; /* return modified address */ } -static int display_rle8_bitmap(bmp_image_t *img, int xoff, int yoff, +static int display_rle8_bitmap(struct bmp_image *img, int xoff, int yoff, int width, int height) { unsigned char *bm; @@ -1304,7 +1304,7 @@ static int display_rle8_bitmap(bmp_image_t *img, int xoff, int yoff, int decode = 1; int x, y, bpp, i, ncolors; struct palette p[256]; - bmp_color_table_entry_t cte; + struct bmp_color_table_entry cte; int green_shift, red_off; int limit = VIDEO_COLS * VIDEO_ROWS; int pixels = 0; @@ -1447,13 +1447,13 @@ int video_display_bitmap(ulong bmp_image, int x, int y) { ushort xcount, ycount; uchar *fb; - bmp_image_t *bmp = (bmp_image_t *) bmp_image; + struct bmp_image *bmp = (struct bmp_image *)bmp_image; uchar *bmap; ushort padded_line; unsigned long width, height, bpp; unsigned colors; unsigned long compression; - bmp_color_table_entry_t cte; + struct bmp_color_table_entry cte; #ifdef CONFIG_VIDEO_BMP_GZIP unsigned char *dst = NULL; @@ -1495,7 +1495,7 @@ int video_display_bitmap(ulong bmp_image, int x, int y) /* * Set addr to decompressed image */ - bmp = (bmp_image_t *)(dst+2); + bmp = (struct bmp_image *)(dst+2); if (!((bmp->header.signature[0] == 'B') && (bmp->header.signature[1] == 'M'))) { diff --git a/drivers/video/tegra124/tegra124-lcd.c b/drivers/video/tegra124/tegra124-lcd.c index 2733590754..cfdc77ffe3 100644 --- a/drivers/video/tegra124/tegra124-lcd.c +++ b/drivers/video/tegra124/tegra124-lcd.c @@ -51,15 +51,13 @@ static int tegra124_lcd_init(void *lcdbase) int ret; clock_set_up_plldp(); - clock_adjust_periph_pll_div(PERIPH_ID_HOST1X, CLOCK_ID_PERIPH, - 408000000, NULL); + clock_start_periph_pll(PERIPH_ID_HOST1X, CLOCK_ID_PERIPH, 408000000); clock_enable(PERIPH_ID_HOST1X); clock_enable(PERIPH_ID_DISP1); clock_enable(PERIPH_ID_PWM); clock_enable(PERIPH_ID_DPAUX); clock_enable(PERIPH_ID_SOR0); - udelay(2); reset_set_enable(PERIPH_ID_HOST1X, 0); diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index 519bb0be27..de91e57efc 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -42,7 +42,7 @@ * Note: With driver model, the label is allocated so there is no need for * the caller to preserve it. * - * @param gp GPIO number + * @param gpio GPIO number * @param label User label for this GPIO * @return 0 if ok, -1 on error */ @@ -127,7 +127,7 @@ struct gpio_desc { }; /** - * dm_gpio_is_valid() - Check if a GPIO is gpio_is_valie + * dm_gpio_is_valid() - Check if a GPIO is valid * * @desc: GPIO description containing device, offset and flags, * previously returned by gpio_request_by_name() @@ -167,7 +167,7 @@ int gpio_get_status(struct udevice *dev, int offset, char *buf, int buffsize); * * @dev: Device to check * @offset: Offset of device GPIO to check - * @namep: If non-NULL, this is set to the nane given when the GPIO + * @namep: If non-NULL, this is set to the name given when the GPIO * was requested, or -1 if it has not been requested * @return -ENODATA if the driver returned an unknown function, * -ENODEV if the device is not active, -EINVAL if the offset is invalid. @@ -186,7 +186,7 @@ int gpio_get_function(struct udevice *dev, int offset, const char **namep); * * @dev: Device to check * @offset: Offset of device GPIO to check - * @namep: If non-NULL, this is set to the nane given when the GPIO + * @namep: If non-NULL, this is set to the name given when the GPIO * was requested, or -1 if it has not been requested * @return -ENODATA if the driver returned an unknown function, * -ENODEV if the device is not active, -EINVAL if the offset is invalid. @@ -219,7 +219,7 @@ struct fdtdec_phandle_args; * Also it would be useful to standardise additional functions like * pullup, slew rate and drive strength. * - * gpio_request)( and gpio_free() are optional - if NULL then they will + * gpio_request() and gpio_free() are optional - if NULL then they will * not be called. * * Note that @offset is the offset from the base GPIO of the device. So @@ -271,7 +271,7 @@ struct dm_gpio_ops { * * @dev: GPIO device * @desc: Place to put GPIO description - * @args: Arguments provided in descripion + * @args: Arguments provided in description * @return 0 if OK, -ve on error */ int (*xlate)(struct udevice *dev, struct gpio_desc *desc, @@ -398,7 +398,7 @@ int gpio_request_by_name(struct udevice *dev, const char *list_name, /** * gpio_request_list_by_name() - Request a list of GPIOs * - * Reads all the GPIOs from a list and requetss them. See + * Reads all the GPIOs from a list and requests them. See * gpio_request_by_name() for additional details. Lists should not be * misused to hold unrelated or optional GPIOs. They should only be used * for things like parallel data lines. A zero phandle terminates the list @@ -533,7 +533,7 @@ int dm_gpio_set_dir_flags(struct gpio_desc *desc, ulong flags); /** * gpio_get_number() - Get the global GPIO number of a GPIO * - * This should only be used for debugging or interest. It returns the nummber + * This should only be used for debugging or interest. It returns the number * that should be used for gpio_get_value() etc. to access this GPIO. * * @desc: GPIO description containing device, offset and flags, diff --git a/include/bmp_layout.h b/include/bmp_layout.h index 22b1fbc943..55db8b86ea 100644 --- a/include/bmp_layout.h +++ b/include/bmp_layout.h @@ -11,17 +11,17 @@ #ifndef _BMP_H_ #define _BMP_H_ -typedef struct bmp_color_table_entry { +struct __packed bmp_color_table_entry { __u8 blue; __u8 green; __u8 red; __u8 reserved; -} __attribute__ ((packed)) bmp_color_table_entry_t; +}; /* When accessing these fields, remember that they are stored in little endian format, so use linux macros, e.g. le32_to_cpu(width) */ -typedef struct bmp_header { +struct __packed bmp_header { /* Header */ char signature[2]; __u32 file_size; @@ -40,15 +40,14 @@ typedef struct bmp_header { __u32 colors_used; __u32 colors_important; /* ColorTable */ +}; -} __attribute__ ((packed)) bmp_header_t; - -typedef struct bmp_image { - bmp_header_t header; +struct bmp_image { + struct bmp_header header; /* We use a zero sized array just as a placeholder for variable sized array */ - bmp_color_table_entry_t color_table[0]; -} bmp_image_t; + struct bmp_color_table_entry color_table[0]; +}; /* Data in the bmp_image is aligned to this length */ #define BMP_DATA_ALIGN 4 diff --git a/include/common.h b/include/common.h index ea5aeb0014..8f4b2ec212 100644 --- a/include/common.h +++ b/include/common.h @@ -714,6 +714,21 @@ void invalidate_dcache_range(unsigned long start, unsigned long stop); void invalidate_dcache_all(void); void invalidate_icache_all(void); +enum { + /* Disable caches (else flush caches but leave them active) */ + CBL_DISABLE_CACHES = 1 << 0, + CBL_SHOW_BOOTSTAGE_REPORT = 1 << 1, + + CBL_ALL = 3, +}; + +/** + * Clean up ready for linux + * + * @param flags Flags to control what is done + */ +int cleanup_before_linux_select(int flags); + /* arch/$(ARCH)/lib/ticks.S */ uint64_t get_ticks(void); void wait_ticks (unsigned long); diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 4d9f63d471..4c46ddad2b 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -15,58 +15,43 @@ #define CONFIG_CMD_AMBAPP /* AMBA Plug & Play Bus print utility */ #define CONFIG_CMD_ASKENV /* ask for env variable */ -#define CONFIG_CMD_BDI /* bdinfo */ #define CONFIG_CMD_BEDBUG /* Include BedBug Debugger */ #define CONFIG_CMD_BMP /* BMP support */ -#define CONFIG_CMD_BOOTD /* bootd */ #define CONFIG_CMD_BOOTZ /* boot zImage */ #define CONFIG_CMD_BSP /* Board Specific functions */ #define CONFIG_CMD_CACHE /* icache, dcache */ #define CONFIG_CMD_CDP /* Cisco Discovery Protocol */ #define CONFIG_CMD_CLK /* Clock support */ -#define CONFIG_CMD_CONSOLE /* coninfo */ #define CONFIG_CMD_DATE /* support for RTC, date/time...*/ #define CONFIG_CMD_DHCP /* DHCP Support */ #define CONFIG_CMD_DIAG /* Diagnostics */ #define CONFIG_CMD_DISPLAY /* Display support */ #define CONFIG_CMD_DOC /* Disk-On-Chip Support */ #define CONFIG_CMD_DTT /* Digital Therm and Thermostat */ -#define CONFIG_CMD_ECHO /* echo arguments */ -#define CONFIG_CMD_EDITENV /* editenv */ #define CONFIG_CMD_EEPROM /* EEPROM read/write support */ #define CONFIG_CMD_ELF /* ELF (VxWorks) load/boot cmd */ #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_FDC /* Floppy Disk Support */ -#define CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#define CONFIG_CMD_FPGA /* FPGA configuration Support */ #define CONFIG_CMD_FUSE /* Device fuse support */ #define CONFIG_CMD_GETTIME /* Get time since boot */ #define CONFIG_CMD_HASH /* calculate hash / digest */ #define CONFIG_CMD_HWFLOW /* RTS/CTS hw flow control */ #define CONFIG_CMD_I2C /* I2C serial bus support */ #define CONFIG_CMD_IDE /* IDE harddisk support */ -#define CONFIG_CMD_IMI /* iminfo */ -#define CONFIG_CMD_IMLS /* List all found images */ #define CONFIG_CMD_IMMAP /* IMMR dump support */ #define CONFIG_CMD_IO /* Access to X86 IO space */ #define CONFIG_CMD_IRQ /* irqinfo */ -#define CONFIG_CMD_ITEST /* Integer (and string) test */ #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ #define CONFIG_CMD_KGDB /* kgdb */ #define CONFIG_CMD_LICENSE /* console license display */ -#define CONFIG_CMD_LOADB /* loadb */ -#define CONFIG_CMD_LOADS /* loads */ #define CONFIG_CMD_MEMINFO /* meminfo */ -#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop */ #define CONFIG_CMD_MEMTEST /* mtest */ #define CONFIG_CMD_MFSL /* FSL support for Microblaze */ #define CONFIG_CMD_MII /* MII support */ -#define CONFIG_CMD_MISC /* Misc functions like sleep etc*/ #define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_CMD_MTDPARTS /* mtd parts support */ #define CONFIG_CMD_NAND /* NAND support */ -#define CONFIG_CMD_NFS /* NFS support */ #define CONFIG_CMD_ONENAND /* OneNAND support */ #define CONFIG_CMD_PCI /* pciinfo */ #define CONFIG_CMD_PCMCIA /* PCMCIA support */ @@ -76,15 +61,11 @@ #define CONFIG_CMD_REISER /* Reiserfs support */ #define CONFIG_CMD_RARP /* rarpboot support */ #define CONFIG_CMD_READ /* Read data from partition */ -#define CONFIG_CMD_RUN /* run command in env variable */ #define CONFIG_CMD_SANDBOX /* sb command to access sandbox features */ -#define CONFIG_CMD_SAVEENV /* saveenv */ #define CONFIG_CMD_SAVES /* save S record dump */ #define CONFIG_CMD_SCSI /* SCSI Support */ #define CONFIG_CMD_SDRAM /* SDRAM DIMM SPD info printout */ -#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ #define CONFIG_CMD_SNTP /* SNTP support */ -#define CONFIG_CMD_SOURCE /* "source" command support */ #define CONFIG_CMD_SPI /* SPI utility */ #define CONFIG_CMD_TERMINAL /* built-in Serial Terminal */ #define CONFIG_CMD_UBI /* UBI Support */ @@ -92,7 +73,6 @@ #define CONFIG_CMD_UNIVERSE /* Tundra Universe Support */ #define CONFIG_CMD_UNZIP /* unzip from memory to memory */ #define CONFIG_CMD_USB /* USB Support */ -#define CONFIG_CMD_XIMG /* Load part of Multi Image */ #define CONFIG_CMD_ZFS /* ZFS Support */ #endif /* _CONFIG_CMD_ALL_H */ diff --git a/include/config_cmd_default.h b/include/config_cmd_default.h deleted file mode 100644 index b915c2f2b3..0000000000 --- a/include/config_cmd_default.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright 2007 Freescale Semiconductor, Inc. - * - * This file is licensed under the terms of the GNU General Public - * License Version 2. This file is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef _CONFIG_CMD_DEFAULT_H -#define _CONFIG_CMD_DEFAULT_H - -/* - * Alphabetical list of all commands that are configured by default. - * This is essentially all commands minus those that are considered - * "non-standard" for some reason (memory hogs, requires special - * hardware, not fully tested, etc.). - */ - -#define CONFIG_CMD_BDI /* bdinfo */ -#define CONFIG_CMD_BOOTD /* bootd */ -#define CONFIG_CMD_CONSOLE /* coninfo */ -#define CONFIG_CMD_ECHO /* echo arguments */ -#define CONFIG_CMD_EDITENV /* editenv */ -#define CONFIG_CMD_ENV_EXISTS /* query whether env variables exists */ -#define CONFIG_CMD_FPGA /* FPGA configuration Support */ -#define CONFIG_CMD_IMI /* iminfo */ -#define CONFIG_CMD_ITEST /* Integer (and string) test */ -#ifndef CONFIG_SYS_NO_FLASH -#define CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#define CONFIG_CMD_IMLS /* List all found images */ -#endif -#define CONFIG_CMD_LOADB /* loadb */ -#define CONFIG_CMD_LOADS /* loads */ -#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop */ -#define CONFIG_CMD_MISC /* Misc functions like sleep etc*/ -#define CONFIG_CMD_NFS /* NFS support */ -#define CONFIG_CMD_RUN /* run command in env variable */ -#define CONFIG_CMD_SAVEENV /* saveenv */ -#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ -#define CONFIG_CMD_SOURCE /* "source" command support */ -#define CONFIG_CMD_XIMG /* Load part of Multi Image */ - -#endif /* _CONFIG_CMD_DEFAULT_H */ diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h index 38cb0e8aba..c191f5634e 100644 --- a/include/config_uncmd_spl.h +++ b/include/config_uncmd_spl.h @@ -20,7 +20,9 @@ #undef CONFIG_CMD_SNTP #undef CONFIG_CMD_TFTPPUT #undef CONFIG_CMD_TFTPSRV +#ifdef CONFIG_SPL_DISABLE_OF_CONTROL #undef CONFIG_OF_CONTROL +#endif #ifndef CONFIG_SPL_DM #undef CONFIG_DM_SERIAL diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 6b5aa1b9f2..b396764ffa 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -590,7 +590,6 @@ unsigned long get_board_ddr_clk(void); * eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SST #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 @@ -756,8 +755,6 @@ unsigned long get_board_ddr_clk(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index ec4979634a..a7c927759c 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -279,7 +279,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_FSL_ESPI /* eSPI - Enhanced SPI */ #ifdef CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 @@ -341,8 +340,6 @@ extern unsigned long get_sdram_size(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_ERRATA #define CONFIG_CMD_ELF diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 65a7067a03..e5cd26797c 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -485,7 +485,6 @@ combinations. this should be removed later /* eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI /* SPI */ #ifdef CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 @@ -581,8 +580,6 @@ combinations. this should be removed later /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index e737960c54..235780973f 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -432,7 +432,6 @@ /* eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_SPI_FLASH_EON #define CONFIG_CMD_SF @@ -496,8 +495,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ERRATA #define CONFIG_CMD_ELF #define CONFIG_CMD_IRQ diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h index 3ccb9a725c..638a586492 100644 --- a/include/configs/CPCI2DP.h +++ b/include/configs/CPCI2DP.h @@ -53,8 +53,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PCI #define CONFIG_CMD_IRQ #define CONFIG_CMD_ELF @@ -62,7 +60,6 @@ #define CONFIG_CMD_BSP #define CONFIG_CMD_EEPROM -#undef CONFIG_CMD_NFS #undef CONFIG_WATCHDOG /* watchdog disabled */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index ceddd7accc..9c25751c8f 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -67,8 +67,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_PCI #define CONFIG_CMD_IRQ @@ -94,7 +92,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#undef CONFIG_SYS_LONGHELP /* undef to save memory */ #undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ @@ -141,12 +139,6 @@ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ -#define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#undef CONFIG_AUTOBOOT_DELAY_STR -#define CONFIG_AUTOBOOT_STOP_STR " " - #define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */ /*----------------------------------------------------------------------- diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 03fa5e68f1..a2468c3820 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -22,14 +22,9 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 /* Command line configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #undef CONFIG_CMD_I2C -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 04e52f22f8..2e86016184 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -37,19 +37,11 @@ #define CONFIG_BOOTP_HOSTNAME /* Command line configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC -#undef CONFIG_CMD_NFS #define CONFIG_CMD_REGINFO #undef CONFIG_CMD_USB #undef CONFIG_CMD_BMP @@ -140,7 +132,6 @@ #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI # define CONFIG_SYS_DSPI_CS2 -# define CONFIG_SPI_FLASH # define CONFIG_SPI_FLASH_STMICRO # define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 8bf4e5318f..ae11e7d879 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -35,23 +35,15 @@ #define CONFIG_BOOTP_HOSTNAME /* Command line configuration */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_BOOTD #define CONFIG_CMD_CACHE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index b4fa5afe9b..a93bafcb75 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -39,7 +39,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> #define CONFIG_CMD_CACHE #define CONFIG_SYS_LONGHELP /* undef to save memory */ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 5d978747fe..ddb5cdab2d 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -39,16 +39,10 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_CMD_IDE -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_PING #ifdef CONFIG_CMD_IDE diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h index 0bfa946cde..7f5ee8ad4a 100644 --- a/include/configs/M5253EVBE.h +++ b/include/configs/M5253EVBE.h @@ -49,15 +49,10 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> #define CONFIG_CMD_CACHE -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_CMD_IDE -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC /* ATA */ #define CONFIG_DOS_PARTITION diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index f5cd0a0d11..d888c3e549 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -56,18 +56,11 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_MII #define CONFIG_CMD_PING -#define CONFIG_CMD_MISC #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_LOADB #define CONFIG_BOOTDELAY 5 #define CONFIG_MCFFEC diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 3660dda5a8..fa9b973fa8 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -55,19 +55,13 @@ #define CONFIG_BOOTP_HOSTNAME /* Available command configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_PING #define CONFIG_CMD_MII #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_DHCP -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_LOADB #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index aeba9c0f02..860abe7bca 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -47,14 +47,10 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> #define CONFIG_CMD_CACHE #define CONFIG_CMD_PING #define CONFIG_CMD_MII -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_LOADB - #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC # define CONFIG_MII 1 diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 65adadc69d..817b142bf9 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -27,15 +27,10 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 /* Command line configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #undef CONFIG_CMD_I2C -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 16ef80b2aa..4724a9c89d 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -27,15 +27,10 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ /* Command line configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index e3c36a65f5..32afa44147 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -27,15 +27,10 @@ #define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */ /* Command line configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index e40bbfd102..1f65918d0d 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -38,30 +38,20 @@ #define CONFIG_BOOTP_HOSTNAME /* Command line configuration */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_BOOTD #define CONFIG_CMD_CACHE #undef CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF -#undef CONFIG_CMD_FLASH #undef CONFIG_CMD_I2C #undef CONFIG_CMD_JFFS2 #undef CONFIG_CMD_UBI -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MII #undef CONFIG_CMD_NAND -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_SPI #define CONFIG_CMD_SF -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS /* * NAND FLASH @@ -204,7 +194,6 @@ #define CONFIG_HARD_SPI #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI -# define CONFIG_SPI_FLASH # define CONFIG_SPI_FLASH_ATMEL # define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index d26ad9125c..2c08512ff6 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -39,27 +39,18 @@ #define CONFIG_BOOTP_HOSTNAME /* Command line configuration */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_BOOTD #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C #undef CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_SPI #define CONFIG_CMD_SF -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS /* Network configuration */ #define CONFIG_MCFFEC @@ -151,7 +142,6 @@ #define CONFIG_HARD_SPI #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI -# define CONFIG_SPI_FLASH # define CONFIG_SPI_FLASH_STMICRO # define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index b735a26f0c..e82ba32984 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -39,21 +39,15 @@ #define CONFIG_BOOTP_HOSTNAME /* Command line configuration */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_BOOTD #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MII #undef CONFIG_CMD_PCI #define CONFIG_CMD_PING @@ -61,8 +55,6 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_SF -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS /* Network configuration */ #define CONFIG_MCFFEC @@ -182,7 +174,6 @@ #define CONFIG_HARD_SPI #define CONFIG_SYS_SBFHDR_SIZE 0x13 #ifdef CONFIG_CMD_SPI -# define CONFIG_SPI_FLASH # define CONFIG_SPI_FLASH_STMICRO # define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index 427ccf03c3..3c1bb90de1 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -29,15 +29,10 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ /* Command line configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #undef CONFIG_CMD_DATE #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_PCI #define CONFIG_CMD_PING diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h index 26a16eca03..7e1b3646f8 100644 --- a/include/configs/M5485EVB.h +++ b/include/configs/M5485EVB.h @@ -29,15 +29,10 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ /* Command line configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #undef CONFIG_CMD_DATE #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_PCI #define CONFIG_CMD_PING diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index 147f122967..cb21b7396e 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -51,8 +51,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 9b196ad2e4..4150d5aad0 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -355,7 +355,6 @@ #ifdef CONFIG_MPC8XXX_SPI #define CONFIG_CMD_SPI #define CONFIG_USE_SPIFLASH -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #endif @@ -447,8 +446,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 9cea76ae9b..d558db7e50 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -489,8 +489,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C @@ -498,11 +496,6 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_PCI -#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_NAND) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif - #define CONFIG_CMDLINE_EDITING 1 #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index fbf38c88d9..cbe10af19f 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -469,19 +469,12 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII #define CONFIG_CMD_DATE #define CONFIG_CMD_PCI -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif - #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 2dd71b7ed9..7547c12996 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -335,8 +335,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_EEPROM @@ -345,10 +343,6 @@ #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI #endif -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif #undef CONFIG_WATCHDOG /* watchdog disabled */ diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index 14abd3512c..9805df75b9 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -420,8 +420,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_ASKENV @@ -430,12 +428,6 @@ #define CONFIG_CMD_PCI #endif -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif - - #undef CONFIG_WATCHDOG /* watchdog disabled */ /* diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 17f230f4a1..57547a48bf 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -486,8 +486,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_DATE @@ -497,12 +495,6 @@ #define CONFIG_CMD_PCI #endif -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif - - #undef CONFIG_WATCHDOG /* watchdog disabled */ /* diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 720406821b..32cb007ab7 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -496,8 +496,6 @@ boards, we say we have two, but don't display a message if we find only one. */ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_IRQ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 521904daad..cebd175ff5 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -490,8 +490,6 @@ extern int board_pci_host_broken(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII @@ -501,11 +499,6 @@ extern int board_pci_host_broken(void); #define CONFIG_CMD_PCI #endif -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif - #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 19e0e30eef..5c6ad193c0 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -500,8 +500,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII @@ -511,11 +509,6 @@ #define CONFIG_CMD_PCI #endif -#if defined(CONFIG_SYS_RAMBOOT) -#undef CONFIG_CMD_SAVEENV -#undef CONFIG_CMD_LOADS -#endif - #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index f57afff3c4..6a90531f3d 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -50,7 +50,6 @@ #define CONFIG_MPC8536DS 1 #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ -#define CONFIG_SPI_FLASH 1 /* Has SPI Flash */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* Enable PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -636,8 +635,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_IRQ #define CONFIG_CMD_PING #define CONFIG_CMD_I2C diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index ff9a67de57..931816bf36 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -348,8 +348,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_ELF @@ -359,12 +357,6 @@ #define CONFIG_CMD_PCI #endif -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif - - #undef CONFIG_WATCHDOG /* watchdog disabled */ /* diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 6b7f78403b..d24d1ca522 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -366,8 +366,6 @@ extern unsigned long get_clock_freq(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index ad2c52cb36..ef268a8c1a 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -382,8 +382,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index f49b1e5745..a80221a13a 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -491,8 +491,6 @@ extern unsigned long get_clock_freq(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 15b6e6c709..675ca874f6 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -364,8 +364,6 @@ extern unsigned long get_clock_freq(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 2250c2fe01..5a481d5207 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -384,8 +384,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_ELF @@ -400,12 +398,6 @@ #define CONFIG_CMD_MII #endif -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif - - #undef CONFIG_WATCHDOG /* watchdog disabled */ /* diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 91bf267165..05e5a3d08e 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -386,8 +386,6 @@ extern unsigned long get_clock_freq(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 4cb586d43c..78019b9c3a 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -477,8 +477,6 @@ extern unsigned long get_clock_freq(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 943c575e50..71bd51b168 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -593,8 +593,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ERRATA #define CONFIG_CMD_IRQ #define CONFIG_CMD_PING diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 4b99fc3632..de56c489cd 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -467,16 +467,10 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII -#if defined(CONFIG_SYS_RAMBOOT) -#undef CONFIG_CMD_SAVEENV -#endif - #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI #define CONFIG_CMD_SCSI diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 938874fe42..f20ee79e87 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -627,16 +627,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_REGINFO -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV -#endif - #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI #define CONFIG_CMD_SCSI diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index d10bd2a985..f1af928977 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -13,14 +13,8 @@ #define CONFIG_CPU_SH7722 1 #define CONFIG_MIGO_R 1 -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_PING -#define CONFIG_CMD_NFS #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_SAVEENV #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 3 diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 37bb42b28f..4e3c05ad27 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -680,7 +680,6 @@ extern unsigned long get_sdram_size(void); #if !defined(CONFIG_NAND) || !defined(CONFIG_NAND_SECBOOT) /* eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 @@ -813,8 +812,6 @@ extern unsigned long get_sdram_size(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DATE #define CONFIG_CMD_ERRATA #define CONFIG_CMD_ELF diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 0f5915daea..6ddf4470b1 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -479,7 +479,6 @@ /* * eSPI - Enhanced SPI */ -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_HARD_SPI @@ -680,8 +679,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ELF #define CONFIG_CMD_ERRATA #define CONFIG_CMD_IRQ diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 233995c227..8fff431090 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -271,8 +271,6 @@ extern unsigned long get_clock_freq(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_IRQ #define CONFIG_CMD_PING #define CONFIG_CMD_MII diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index c78a421ce5..cc8700bfb3 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -412,7 +412,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); * eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 @@ -619,8 +618,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_ERRATA diff --git a/include/configs/PATI.h b/include/configs/PATI.h index 3ca204e1e2..dfc4fc0f36 100644 --- a/include/configs/PATI.h +++ b/include/configs/PATI.h @@ -42,21 +42,11 @@ /* * Command line configuration. */ -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_LOADB #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_BDI -#define CONFIG_CMD_CONSOLE -#define CONFIG_CMD_RUN #define CONFIG_CMD_BSP -#define CONFIG_CMD_IMI #define CONFIG_CMD_EEPROM #define CONFIG_CMD_IRQ -#define CONFIG_CMD_MISC #if 0 diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 9a1b2acac3..c9d08e6600 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -41,8 +41,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_IDE #define CONFIG_CMD_DHCP #define CONFIG_CMD_PCI diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index a236e117a0..3a71ff8617 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -61,8 +61,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_PCI #define CONFIG_CMD_IRQ @@ -138,15 +136,6 @@ #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ -/* Only interrupt boot if space is pressed */ -/* If a long serial cable is connected but */ -/* other end is dead, garbage will be read */ -#define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#undef CONFIG_AUTOBOOT_DELAY_STR -#define CONFIG_AUTOBOOT_STOP_STR " " - #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ #define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */ diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h index f7d28e39dd..5712298743 100644 --- a/include/configs/PMC405DE.h +++ b/include/configs/PMC405DE.h @@ -54,8 +54,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_BSP #define CONFIG_CMD_CHIP_CONFIG #define CONFIG_CMD_DATE @@ -65,7 +63,6 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PCI #define CONFIG_CMD_PING @@ -110,12 +107,6 @@ #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ -#define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#undef CONFIG_AUTOBOOT_DELAY_STR -#define CONFIG_AUTOBOOT_STOP_STR " " - /* * PCI stuff */ diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index b8d4dc5eb8..9ed6c61ab7 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -271,8 +271,6 @@ #define CONFIG_DOS_PARTITION #define CONFIG_ISO_PARTITION -#include <config_cmd_default.h> - #define CONFIG_CMD_BSP #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -283,7 +281,6 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_MII #define CONFIG_CMD_NAND -#define CONFIG_CMD_NFS #define CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_USB @@ -331,12 +328,6 @@ #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ -#define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#undef CONFIG_AUTOBOOT_DELAY_STR -#define CONFIG_AUTOBOOT_STOP_STR " " - /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------*/ diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 0f8b61412a..0fa03cf93c 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -581,7 +581,6 @@ unsigned long get_board_ddr_clk(void); * eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #ifndef CONFIG_SPL_BUILD #define CONFIG_SPI_FLASH_SST @@ -849,8 +848,6 @@ unsigned long get_board_ddr_clk(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 5ada99f96a..f99663a65b 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -575,7 +575,6 @@ unsigned long get_board_ddr_clk(void); * eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #if defined(CONFIG_T1024RDB) #define CONFIG_SPI_FLASH_STMICRO #elif defined(CONFIG_T1023RDB) @@ -854,8 +853,6 @@ unsigned long get_board_ddr_clk(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM @@ -866,9 +863,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_I2C #define CONFIG_CMD_MII #define CONFIG_CMD_PING -#define CONFIG_CMD_ECHO #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_BDI #ifdef CONFIG_PCI #define CONFIG_CMD_PCI diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 6cc4cdb82d..0206e54063 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -486,7 +486,6 @@ unsigned long get_board_ddr_clk(void); * eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_SST #define CONFIG_SPI_FLASH_EON @@ -723,8 +722,6 @@ unsigned long get_board_ddr_clk(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 262aeaf32f..16d2e0e1c7 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -516,7 +516,6 @@ * eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_BAR #define CONFIG_CMD_SF @@ -746,8 +745,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #ifdef CONFIG_T1042RDB_PI #define CONFIG_CMD_DATE #endif diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index e80b0b5031..b0ee0de136 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -15,7 +15,6 @@ #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ #define CONFIG_MMC -#define CONFIG_SPI_FLASH #define CONFIG_USB_EHCI #if defined(CONFIG_PPC_T2080) #define CONFIG_T2080QDS @@ -793,8 +792,6 @@ unsigned long get_board_ddr_clk(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_ERRATA @@ -804,7 +801,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_BDI #ifdef CONFIG_PCI #define CONFIG_CMD_PCI diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index c5db4f3eb1..8c637c2377 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -16,7 +16,6 @@ #define CONFIG_T2080RDB #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ #define CONFIG_MMC -#define CONFIG_SPI_FLASH #define CONFIG_USB_EHCI #define CONFIG_FSL_SATA_V2 @@ -749,17 +748,13 @@ unsigned long get_board_ddr_clk(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_ERRATA #define CONFIG_CMD_MII #define CONFIG_CMD_I2C #define CONFIG_CMD_PING -#define CONFIG_CMD_ECHO #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_BDI #ifdef CONFIG_PCI #define CONFIG_CMD_PCI diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index cfe6557caa..4edb3cb91f 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -402,7 +402,6 @@ unsigned long get_board_ddr_clk(void); * eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SST #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index e38a6f7f73..8ed6bf71ec 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -318,8 +318,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_ERRATA @@ -616,7 +614,6 @@ unsigned long get_board_ddr_clk(void); * eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SST #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index cdccbef1f6..5a59b80d50 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -166,8 +166,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -175,7 +173,6 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_SNTP diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h index 0d5a2b96f1..9b9217ebc1 100644 --- a/include/configs/TQM823L.h +++ b/include/configs/TQM823L.h @@ -106,8 +106,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -115,7 +113,6 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP #ifdef CONFIG_SPLASH_SCREEN diff --git a/include/configs/TQM823M.h b/include/configs/TQM823M.h index e765a03cfb..5240e0f0b1 100644 --- a/include/configs/TQM823M.h +++ b/include/configs/TQM823M.h @@ -104,8 +104,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -113,7 +111,6 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 7b496c853f..4164303e94 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -289,15 +289,12 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_DTT #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C -#define CONFIG_CMD_NFS #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII #define CONFIG_CMD_PING @@ -308,11 +305,6 @@ #define CONFIG_CMD_PCI #endif -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif - /* * Miscellaneous configurable options */ diff --git a/include/configs/TQM850L.h b/include/configs/TQM850L.h index bbdc3f81fc..edadf55f51 100644 --- a/include/configs/TQM850L.h +++ b/include/configs/TQM850L.h @@ -94,8 +94,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -103,7 +101,6 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h index 5fc87f2138..166bb2c6c0 100644 --- a/include/configs/TQM850M.h +++ b/include/configs/TQM850M.h @@ -94,8 +94,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -103,7 +101,6 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h index 589d168eba..8b16ad2750 100644 --- a/include/configs/TQM855L.h +++ b/include/configs/TQM855L.h @@ -97,8 +97,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -106,7 +104,6 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h index 60acb564e8..8a05fa4860 100644 --- a/include/configs/TQM855M.h +++ b/include/configs/TQM855M.h @@ -126,8 +126,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -136,7 +134,6 @@ #define CONFIG_CMD_EEPROM #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h index ebc5571632..bf3a25b993 100644 --- a/include/configs/TQM860L.h +++ b/include/configs/TQM860L.h @@ -97,8 +97,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -106,7 +104,6 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h index f4ce07f20e..47e5c6cae1 100644 --- a/include/configs/TQM860M.h +++ b/include/configs/TQM860M.h @@ -97,8 +97,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -106,7 +104,6 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h index 97db519d53..fa892a9152 100644 --- a/include/configs/TQM862L.h +++ b/include/configs/TQM862L.h @@ -100,8 +100,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -109,7 +107,6 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h index 25d60a74ef..13319f2cfb 100644 --- a/include/configs/TQM862M.h +++ b/include/configs/TQM862M.h @@ -100,8 +100,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -109,7 +107,6 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h index 928b879609..0e378f29db 100644 --- a/include/configs/TQM866M.h +++ b/include/configs/TQM866M.h @@ -140,8 +140,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM @@ -149,7 +147,6 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP diff --git a/include/configs/TQM885D.h b/include/configs/TQM885D.h index 598020c867..76ddef54e6 100644 --- a/include/configs/TQM885D.h +++ b/include/configs/TQM885D.h @@ -136,8 +136,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -146,7 +144,6 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_IDE #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index ec52d6a768..bdedef5374 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -47,7 +47,6 @@ #define CONFIG_ETHPRIME "eTSEC3" #ifndef CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH y #endif #define CONFIG_SYS_REDUNDAND_ENVIRONMENT @@ -89,7 +88,6 @@ #define CONFIG_ETHPRIME "eTSEC1" #ifndef CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH y #endif #define CONFIG_SYS_REDUNDAND_ENVIRONMENT @@ -492,8 +490,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_IRQ #define CONFIG_CMD_PING #define CONFIG_CMD_I2C @@ -626,17 +622,6 @@ /* default location for tftp and bootm */ #define CONFIG_LOADADDR 1000000 -/* - * Autobooting - */ -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_STOP_STR "\x1b" -#define DEBUG_BOOTKEYS 0 -#undef CONFIG_AUTOBOOT_DELAY_STR -#undef CONFIG_BOOTARGS -#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \ - "press \"<Esc>\" to stop\n", bootdelay - #define CONFIG_BOOTARGS /* the boot command will set bootargs */ #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 6aee6db3f3..60c2948f07 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -49,8 +49,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index e229256730..ddd6377516 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -59,8 +59,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_BSP #define CONFIG_CMD_IRQ diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h index f8cea62b59..fc4595b27c 100644 --- a/include/configs/a3m071.h +++ b/include/configs/a3m071.h @@ -45,8 +45,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_BSP #define CONFIG_CMD_CACHE #define CONFIG_CMD_MII diff --git a/include/configs/a4m072.h b/include/configs/a4m072.h index 00589b7e68..1be78fdf33 100644 --- a/include/configs/a4m072.h +++ b/include/configs/a4m072.h @@ -93,13 +93,10 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_EEPROM #define CONFIG_CMD_FAT #define CONFIG_CMD_I2C #define CONFIG_CMD_IDE -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB #define CONFIG_CMD_MII @@ -123,10 +120,6 @@ #define CONFIG_SYS_AUTOLOAD "n" -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "asdfg" - #undef CONFIG_BOOTARGS #define CONFIG_PREBOOT "run try_update" diff --git a/include/configs/ac14xx.h b/include/configs/ac14xx.h index 28f4de21dc..8a5d1e6fa4 100644 --- a/include/configs/ac14xx.h +++ b/include/configs/ac14xx.h @@ -394,8 +394,6 @@ #define CONFIG_LOADS_ECHO 1 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM @@ -405,7 +403,6 @@ #undef CONFIG_CMD_EXT2 #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO diff --git a/include/configs/adp-ag101.h b/include/configs/adp-ag101.h index e318c7543f..4d52ba1dcd 100644 --- a/include/configs/adp-ag101.h +++ b/include/configs/adp-ag101.h @@ -109,8 +109,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_PING diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index 24904b0b7c..06860b545e 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -109,8 +109,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_PING diff --git a/include/configs/adp-ag102.h b/include/configs/adp-ag102.h index c46eed9ead..026696ca39 100644 --- a/include/configs/adp-ag102.h +++ b/include/configs/adp-ag102.h @@ -104,8 +104,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_PING @@ -113,8 +111,6 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_ELF -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS /* * PCI diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 0f125dce09..f113ebd74b 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -217,18 +217,12 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM -#define CONFIG_CMD_FPGA #define CONFIG_CMD_FPGA_LOADMK #define CONFIG_CMD_I2C -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS #define CONFIG_CMD_MII #define CONFIG_CMD_NAND -#undef CONFIG_CMD_NFS #define CONFIG_CMD_PCI #undef CONFIG_WATCHDOG /* watchdog disabled */ diff --git a/include/configs/alt.h b/include/configs/alt.h index 646cb6102c..524da4280d 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -43,7 +43,6 @@ #define CONFIG_SPI #define CONFIG_SPI_FLASH_BAR #define CONFIG_SH_QSPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_SPI_FLASH_QUAD #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 8da3325b7e..035c1569ad 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -54,12 +54,12 @@ "${optargs} " \ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ - "nandroot=ubi0:rootfs rw ubi.mtd=9,2048\0" \ + "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \ "nandrootfstype=ubifs rootwait=1\0" \ "nandboot=echo Booting from nand ...; " \ "run nandargs; " \ - "nand read ${fdtaddr} u-boot-spl-os; " \ - "nand read ${loadaddr} kernel; " \ + "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ + "nand read ${loadaddr} NAND.kernel; " \ "bootz ${loadaddr} - ${fdtaddr}\0" #else #define NANDARGS "" @@ -248,7 +248,7 @@ "128k(NAND.u-boot-env)," \ "128k(NAND.u-boot-env.backup1)," \ "8m(NAND.kernel)," \ - "-(NAND.rootfs)" + "-(NAND.file-system)" #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 #undef CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_IS_IN_NAND @@ -429,7 +429,6 @@ /* SPI flash. */ #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_SPEED 24000000 @@ -452,7 +451,6 @@ */ #if defined(CONFIG_NOR) #undef CONFIG_SYS_NO_FLASH -#define CONFIG_CMD_FLASH #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_CFI diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 9b31b9c590..2f4117db29 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -127,8 +127,6 @@ #endif /* CONFIG_USB_AM35X */ /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ @@ -139,10 +137,6 @@ #define CONFIG_CMD_DHCP #undef CONFIG_CMD_PING -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C @@ -150,7 +144,6 @@ #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 #define CONFIG_SYS_I2C_OMAP34XX -#undef CONFIG_CMD_NFS /* * Board NAND Info. */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 31e758d81b..e5b462174e 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -126,8 +126,6 @@ #endif /* CONFIG_USB_MUSB_AM35X */ /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ @@ -138,10 +136,6 @@ #define CONFIG_CMD_DHCP #undef CONFIG_CMD_PING -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index d4f4c236a9..466ded7ddf 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -12,12 +12,11 @@ #define CONFIG_AM43XX #define CONFIG_CMD_FAT -#define CONFIG_CMD_SAVEENV #define CONFIG_BOARD_LATE_INIT #define CONFIG_ARCH_CPU_INIT #define CONFIG_SYS_CACHELINE_SIZE 32 -#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ +#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #include <asm/arch/omap.h> @@ -42,7 +41,16 @@ #define CONFIG_POWER_TPS62362 /* SPL defines. */ +#ifdef CONFIG_SPL_USB_HOST_SUPPORT +/* + * For USB host boot, ROM uses DMA for copying MLO from USB storage + * and ARM internal ram is not accessible for DMA, so SPL text base + * should be in OCMC ram + */ #define CONFIG_SPL_TEXT_BASE 0x40300350 +#else +#define CONFIG_SPL_TEXT_BASE 0x402F4000 +#endif #define CONFIG_SPL_MAX_SIZE (220 << 10) /* 220KB */ #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (128 << 20)) @@ -95,8 +103,8 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" /* SPL USB Support */ +#ifdef CONFIG_SPL_USB_HOST_SUPPORT #define CONFIG_SPL_USB_SUPPORT -#define CONFIG_SPL_USB_HOST_SUPPORT #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 #define CONFIG_CMD_USB @@ -108,6 +116,7 @@ #define CONFIG_OMAP_USB_PHY #define CONFIG_AM437X_USB2PHY2_HOST +#endif /* USB GADGET */ #if !defined(CONFIG_SPL_BUILD) || \ @@ -191,7 +200,6 @@ /* SPI */ #undef CONFIG_OMAP3_SPI #define CONFIG_TI_QSPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_MACRONIX #define CONFIG_CMD_SF #define CONFIG_CMD_SPI @@ -295,21 +303,23 @@ "setenv fdtfile am437x-idk-evm.dtb; fi; " \ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine device tree; fi; \0" \ + NANDARGS \ NETARGS \ DFUARGS \ #define CONFIG_BOOTCOMMAND \ "run findfdt; " \ "run mmcboot;" \ - "run usbboot;" + "run usbboot;" \ + NANDBOOT \ #endif +#ifndef CONFIG_SPL_BUILD /* CPSW Ethernet */ #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING #define CONFIG_CMD_MII -#define CONFIG_DRIVER_TI_CPSW #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS @@ -319,13 +329,20 @@ #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_PHY_GIGE +#endif + +#define CONFIG_DRIVER_TI_CPSW #define CONFIG_PHYLIB #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_NET_VCI_STRING "AM43xx U-Boot SPL" -#define CONFIG_SPL_ETH_SUPPORT +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ETH_SUPPORT) +#undef CONFIG_ENV_IS_IN_FAT +#define CONFIG_ENV_IS_NOWHERE #define CONFIG_SPL_NET_SUPPORT +#endif + #define CONFIG_SYS_RX_ETH_BUFFER 64 /* NAND support */ @@ -378,7 +395,7 @@ "256k(NAND.u-boot-env)," \ "256k(NAND.u-boot-env.backup1)," \ "7m(NAND.kernel)," \ - "-(NAND.rootfs)" + "-(NAND.file-system)" #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000 /* NAND: SPL related configs */ #ifdef CONFIG_SPL_NAND_SUPPORT @@ -390,6 +407,24 @@ #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */ #define CONFIG_CMD_SPL_WRITE_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #endif -#endif /* !CONFIG_NAND */ +#define NANDARGS \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "nandargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ + "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \ + "nandrootfstype=ubifs rootwait=1\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ + "nand read ${loadaddr} NAND.kernel; " \ + "bootz ${loadaddr} - ${fdtaddr}\0" +#define NANDBOOT "run nandboot; " +#else /* !CONFIG_NAND */ +#define NANDARGS +#define NANDBOOT +#endif /* CONFIG_NAND */ #endif /* __CONFIG_AM43XX_EVM_H */ diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index 9d6146a5a3..37dac7d131 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -53,8 +53,6 @@ /* * Commands */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #if defined(CONFIG_440) #define CONFIG_CMD_CACHE @@ -67,7 +65,6 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO diff --git a/include/configs/amcore.h b/include/configs/amcore.h index 5e197bec26..45fd265d67 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -21,12 +21,7 @@ #define CONFIG_BOOTDELAY 1 #define CONFIG_BOOTCOMMAND "bootm ffc20000" -#include <config_cmd_default.h> #undef CONFIG_CMD_AES -#undef CONFIG_CMD_BOOTD -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_XIMG #define CONFIG_CMD_CACHE #define CONFIG_CMD_TIMER #define CONFIG_CMD_DIAG diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index 573c98f481..03810c3b21 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -14,14 +14,8 @@ #define CONFIG_CPU_SH7723 1 #define CONFIG_AP325RXA 1 -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_PING -#define CONFIG_CMD_NFS #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_IDE #define CONFIG_CMD_EXT2 #define CONFIG_DOS_PARTITION diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index 5b95dd3676..4bcfb4c89f 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -18,14 +18,10 @@ #define CONFIG_BOARD_LATE_INIT #define CONFIG_SYS_TEXT_BASE 0x8BFC0000 -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_PING #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_SDRAM #define CONFIG_CMD_ENV -#define CONFIG_CMD_SAVEENV #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 3 diff --git a/include/configs/apf27.h b/include/configs/apf27.h index 7554023834..a0a26bbf61 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -25,7 +25,7 @@ /* * Enable the call to miscellaneous platform dependent initialization. */ -#define CONFIG_SYS_NO_FLASH /* to be define before <config_cmd_default.h> */ +#define CONFIG_SYS_NO_FLASH /* * Board display option @@ -65,8 +65,6 @@ /* * U-Boot Commands */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV /* ask for env variable */ #define CONFIG_CMD_BSP /* Board Specific functions */ #define CONFIG_CMD_CACHE /* icache, dcache */ @@ -84,7 +82,6 @@ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_NAND_LOCK_UNLOCK #define CONFIG_CMD_NAND_TRIMFFS -#define CONFIG_CMD_NFS /* NFS support */ #define CONFIG_CMD_PING /* ping support */ #define CONFIG_CMD_UBI #define CONFIG_CMD_UBIFS diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h index 445cb190a7..2bbef551b4 100644 --- a/include/configs/apx4devkit.h +++ b/include/configs/apx4devkit.h @@ -21,7 +21,6 @@ /* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH -#include <config_cmd_default.h> #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DOS_PARTITION @@ -34,9 +33,7 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_MMC #define CONFIG_CMD_NAND -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_USB /* Memory configuration */ diff --git a/include/configs/arcangel4.h b/include/configs/arcangel4.h index 5e4097fb82..6636e0e3c6 100644 --- a/include/configs/arcangel4.h +++ b/include/configs/arcangel4.h @@ -41,8 +41,6 @@ /* * Command line configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ELF #define CONFIG_OF_LIBFDT diff --git a/include/configs/aria.h b/include/configs/aria.h index 2f9677c332..2265f3e774 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -407,8 +407,6 @@ #define CONFIG_LOADS_ECHO 1 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM @@ -417,7 +415,6 @@ #undef CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h index eb50639c53..dd012f1c3e 100644 --- a/include/configs/aristainetos-common.h +++ b/include/configs/aristainetos-common.h @@ -45,7 +45,6 @@ #define CONFIG_PHY_MICREL #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_MTD #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_MXC_SPI diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index e540e3f1f3..7f5cbccb17 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -16,15 +16,11 @@ #include <asm/arch/rmobile.h> -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_RUN -#define CONFIG_CMD_LOADS #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#define CONFIG_CMD_NFS #define CONFIG_CMD_BOOTZ #define CONFIG_OF_LIBFDT diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h index f4cf1c0980..62c537448b 100644 --- a/include/configs/aspenite.h +++ b/include/configs/aspenite.h @@ -40,9 +40,7 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_I2C -#undef CONFIG_CMD_NFS /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index bd0919ead9..c6e1f5635a 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -42,8 +42,6 @@ #define CONFIG_ASTRO5373L /* define board type */ /* Command line configuration */ -#include <config_cmd_default.h> - /* * CONFIG_RAM defines if u-boot is loaded via BDM (or started from * a different bootloader that has already performed RAM setup) or @@ -64,19 +62,11 @@ #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC -#define CONFIG_CMD_XIMG -#undef CONFIG_CMD_NFS #if ENABLE_JFFS #define CONFIG_CMD_JFFS2 #endif #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_FPGA #define CONFIG_CMD_FPGA_LOADMK #define CONFIG_CMDLINE_EDITING diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h index 9289964364..c2621ffe84 100644 --- a/include/configs/at91-sama5_common.h +++ b/include/configs/at91-sama5_common.h @@ -48,10 +48,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_LOADS #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index 735c82aa8d..6f1f65fb3c 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -122,14 +122,11 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_FAT #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_USB -#undef CONFIG_CMD_FPGA /* * Network Driver Setting diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index c4b2e1666f..e98cf0ca5c 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -79,14 +79,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_SOURCE - #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 407a53e555..42461d2968 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -86,14 +86,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_SOURCE - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_NAND diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index fa19e8bcc8..731c7f1f0e 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -94,14 +94,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_SOURCE - #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index e4c49f4c14..09d8bec064 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -80,14 +80,6 @@ /* No NOR flash */ #define CONFIG_SYS_NO_FLASH - -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_NAND diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index c44da1c19e..a19d4d9e17 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -70,9 +70,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_FPGA - #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP @@ -97,7 +94,6 @@ /* DataFlash */ #ifdef CONFIG_CMD_SF #define CONFIG_ATMEL_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_ENV_SPI_MODE SPI_MODE_3 diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 637d150fd4..e709f9cf37 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -76,14 +76,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_USB #define CONFIG_CMD_NAND 1 diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 1a481b3fd1..b9a77547b6 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -68,10 +68,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_NAND @@ -97,7 +93,6 @@ /* DataFlash */ #ifdef CONFIG_CMD_SF #define CONFIG_ATMEL_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SF_DEFAULT_SPEED 30000000 #endif diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index 540e86ae47..1cab0a92c2 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -14,6 +14,9 @@ #define CONFIG_AT32AP7000 #define CONFIG_ATNGW100 +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R + /* * Set up the PLL to run at 140 MHz, the CPU to run at the PLL * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency @@ -59,17 +62,7 @@ #define CONFIG_BOOTCOMMAND \ "fsload; bootm" -/* - * Only interrupt autoboot if <space> is pressed. Otherwise, garbage - * data on the serial line may interrupt the boot sequence. - */ #define CONFIG_BOOTDELAY 1 -#define CONFIG_AUTOBOOT -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "d" -#define CONFIG_AUTOBOOT_STOP_STR " " /* * After booting the board for the first time, new ethernet addresses @@ -87,8 +80,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_EXT2 @@ -98,10 +89,6 @@ #define CONFIG_CMD_SF #define CONFIG_CMD_SPI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_SOURCE -#undef CONFIG_CMD_XIMG #define CONFIG_ATMEL_USART #define CONFIG_MACB @@ -113,7 +100,6 @@ #define CONFIG_GENERIC_MMC #define CONFIG_ATMEL_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SYS_DCACHE_LINESZ 32 diff --git a/include/configs/atngw100mkii.h b/include/configs/atngw100mkii.h index 83747336c6..486d9ee63c 100644 --- a/include/configs/atngw100mkii.h +++ b/include/configs/atngw100mkii.h @@ -16,7 +16,6 @@ #define CONFIG_AT32AP7000 #define CONFIG_ATNGW100MKII -#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R @@ -82,17 +81,7 @@ #define CONFIG_BOOTCOMMAND \ "fsload 0x10400000 /uImage; bootm" -/* - * Only interrupt autoboot if <space> is pressed. Otherwise, garbage - * data on the serial line may interrupt the boot sequence. - */ #define CONFIG_BOOTDELAY 1 -#define CONFIG_AUTOBOOT -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "d" -#define CONFIG_AUTOBOOT_STOP_STR " " /* * After booting the board for the first time, new ethernet addresses @@ -110,8 +99,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_EXT2 @@ -122,9 +109,6 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_MII -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_XIMG #define CONFIG_ATMEL_USART #define CONFIG_MACB @@ -136,7 +120,6 @@ #define CONFIG_GENERIC_MMC #define CONFIG_ATMEL_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SYS_DCACHE_LINESZ 32 diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index a9c064a45d..1cd99e9765 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -79,17 +79,7 @@ #define CONFIG_BOOTCOMMAND \ "fsload; bootm $(fileaddr)" -/* - * Only interrupt autoboot if <space> is pressed. Otherwise, garbage - * data on the serial line may interrupt the boot sequence. - */ #define CONFIG_BOOTDELAY 1 -#define CONFIG_AUTOBOOT -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "d" -#define CONFIG_AUTOBOOT_STOP_STR " " /* * After booting the board for the first time, new ethernet addresses @@ -105,15 +95,12 @@ #define CONFIG_BOOTP_GATEWAY /* generic board */ -#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_EXT2 @@ -121,10 +108,6 @@ #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MMC -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_SOURCE -#undef CONFIG_CMD_XIMG #define CONFIG_ATMEL_USART #define CONFIG_MACB diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h deleted file mode 100644 index b2ad30ec90..0000000000 --- a/include/configs/atstk1003.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - * Copyright (C) 2007 Atmel Corporation - * - * Configuration settings for the ATSTK1003 CPU daughterboard - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <asm/arch/hardware.h> - -#define CONFIG_AT32AP -#define CONFIG_AT32AP7001 -#define CONFIG_ATSTK1003 -#define CONFIG_ATSTK1000 - -/* - * Set up the PLL to run at 140 MHz, the CPU to run at the PLL - * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the - * PLL frequency. - * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz - */ -#define CONFIG_PLL -#define CONFIG_SYS_POWER_MANAGER -#define CONFIG_SYS_OSC0_HZ 20000000 -#define CONFIG_SYS_PLL0_DIV 1 -#define CONFIG_SYS_PLL0_MUL 7 -#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 -/* - * Set the CPU running at: - * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz - */ -#define CONFIG_SYS_CLKDIV_CPU 0 -/* - * Set the HSB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz - */ -#define CONFIG_SYS_CLKDIV_HSB 1 -/* - * Set the PBA running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz - */ -#define CONFIG_SYS_CLKDIV_PBA 2 -/* - * Set the PBB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz - */ -#define CONFIG_SYS_CLKDIV_PBB 1 - -/* Reserve VM regions for SDRAM and NOR flash */ -#define CONFIG_SYS_NR_VM_REGIONS 2 - -/* - * The PLLOPT register controls the PLL like this: - * icp = PLLOPT<2> - * ivco = PLLOPT<1:0> - * - * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). - */ -#define CONFIG_SYS_PLL0_OPT 0x04 - -#define CONFIG_USART_BASE ATMEL_BASE_USART1 -#define CONFIG_USART_ID 1 - -/* User serviceable stuff */ -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_STACKSIZE (2048) - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "console=ttyS0 root=/dev/mmcblk0p1 rootwait" - -#define CONFIG_BOOTCOMMAND \ - "mmc rescan; ext2load mmc 0:1 0x10400000 /boot/uImage; bootm" - -/* - * Only interrupt autoboot if <space> is pressed. Otherwise, garbage - * data on the serial line may interrupt the boot sequence. - */ -#define CONFIG_BOOTDELAY 1 -#define CONFIG_AUTOBOOT -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "d" -#define CONFIG_AUTOBOOT_STOP_STR " " - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MMC - -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_XIMG - -#define CONFIG_ATMEL_USART -#define CONFIG_PORTMUX_PIO -#define CONFIG_SYS_HSDRAMC -#define CONFIG_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_GENERIC_MMC - -#define CONFIG_SYS_DCACHE_LINESZ 32 -#define CONFIG_SYS_ICACHE_LINESZ 32 - -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x800000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 135 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_TEXT_BASE 0x00000000 - -#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE -#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE -#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SIZE 65536 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) - -#define CONFIG_SYS_MALLOC_LEN (256*1024) - -/* Allow 4MB for the kernel run-time image */ -#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) -#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) - -/* Other configuration settings that shouldn't have to change all that often */ -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP - -#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000) -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } - -#endif /* __CONFIG_H */ diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h deleted file mode 100644 index 19f049a519..0000000000 --- a/include/configs/atstk1004.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - * Copyright (C) 2007 Atmel Corporation - * - * Configuration settings for the ATSTK1003 CPU daughterboard - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <asm/arch/hardware.h> - -#define CONFIG_AT32AP -#define CONFIG_AT32AP7002 -#define CONFIG_ATSTK1004 -#define CONFIG_ATSTK1000 - -/* - * Set up the PLL to run at 140 MHz, the CPU to run at the PLL - * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the - * PLL frequency. - * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz - */ -#define CONFIG_PLL -#define CONFIG_SYS_POWER_MANAGER -#define CONFIG_SYS_OSC0_HZ 20000000 -#define CONFIG_SYS_PLL0_DIV 1 -#define CONFIG_SYS_PLL0_MUL 7 -#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 -/* - * Set the CPU running at: - * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz - */ -#define CONFIG_SYS_CLKDIV_CPU 0 -/* - * Set the HSB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz - */ -#define CONFIG_SYS_CLKDIV_HSB 1 -/* - * Set the PBA running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz - */ -#define CONFIG_SYS_CLKDIV_PBA 2 -/* - * Set the PBB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz - */ -#define CONFIG_SYS_CLKDIV_PBB 1 - -/* Reserve VM regions for SDRAM and NOR flash */ -#define CONFIG_SYS_NR_VM_REGIONS 2 - -/* - * The PLLOPT register controls the PLL like this: - * icp = PLLOPT<2> - * ivco = PLLOPT<1:0> - * - * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). - */ -#define CONFIG_SYS_PLL0_OPT 0x04 - -#define CONFIG_USART_BASE ATMEL_BASE_USART1 -#define CONFIG_USART_ID 1 - -/* User serviceable stuff */ -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_STACKSIZE (2048) - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "console=ttyS0 root=/dev/mmcblk0p1 rootwait" - -#define CONFIG_BOOTCOMMAND \ - "mmc rescan; ext2load mmc 0:1 0x10200000 /boot/uImage; bootm" - -/* - * Only interrupt autoboot if <space> is pressed. Otherwise, garbage - * data on the serial line may interrupt the boot sequence. - */ -#define CONFIG_BOOTDELAY 1 -#define CONFIG_AUTOBOOT -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "d" -#define CONFIG_AUTOBOOT_STOP_STR " " - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MMC - -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_XIMG - -#define CONFIG_ATMEL_USART -#define CONFIG_PORTMUX_PIO -#define CONFIG_SYS_HSDRAMC -#define CONFIG_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_GENERIC_MMC - -#define CONFIG_SYS_DCACHE_LINESZ 32 -#define CONFIG_SYS_ICACHE_LINESZ 32 - -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x800000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 135 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_TEXT_BASE 0x00000000 - -#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE -#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE -#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SIZE 65536 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) - -#define CONFIG_SYS_MALLOC_LEN (256*1024) - -/* Allow 2MB for the kernel run-time image */ -#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00200000) -#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) - -/* Other configuration settings that shouldn't have to change all that often */ -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP - -#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000) -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } - -#endif /* __CONFIG_H */ diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h deleted file mode 100644 index 25090a68fa..0000000000 --- a/include/configs/atstk1006.h +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (C) 2005-2006 Atmel Corporation - * - * Configuration settings for the ATSTK1002 CPU daughterboard - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <asm/arch/hardware.h> - -#define CONFIG_AT32AP -#define CONFIG_AT32AP7000 -#define CONFIG_ATSTK1006 -#define CONFIG_ATSTK1000 - - -/* - * Set up the PLL to run at 140 MHz, the CPU to run at the PLL - * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the - * PLL frequency. - * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz - */ -#define CONFIG_PLL -#define CONFIG_SYS_POWER_MANAGER -#define CONFIG_SYS_OSC0_HZ 20000000 -#define CONFIG_SYS_PLL0_DIV 1 -#define CONFIG_SYS_PLL0_MUL 7 -#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 -/* - * Set the CPU running at: - * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz - */ -#define CONFIG_SYS_CLKDIV_CPU 0 -/* - * Set the HSB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz - */ -#define CONFIG_SYS_CLKDIV_HSB 1 -/* - * Set the PBA running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz - */ -#define CONFIG_SYS_CLKDIV_PBA 2 -/* - * Set the PBB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz - */ -#define CONFIG_SYS_CLKDIV_PBB 1 - -/* Reserve VM regions for SDRAM and NOR flash */ -#define CONFIG_SYS_NR_VM_REGIONS 2 - -/* - * The PLLOPT register controls the PLL like this: - * icp = PLLOPT<2> - * ivco = PLLOPT<1:0> - * - * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). - */ -#define CONFIG_SYS_PLL0_OPT 0x04 - -#define CONFIG_USART_BASE ATMEL_BASE_USART1 -#define CONFIG_USART_ID 1 - -/* User serviceable stuff */ -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_STACKSIZE (2048) - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "console=ttyS0 root=mtd3 fbmem=2400k" - -#define CONFIG_BOOTCOMMAND \ - "fsload; bootm $(fileaddr)" - -/* - * Only interrupt autoboot if <space> is pressed. Otherwise, garbage - * data on the serial line may interrupt the boot sequence. - */ -#define CONFIG_BOOTDELAY 1 -#define CONFIG_AUTOBOOT -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "d" -#define CONFIG_AUTOBOOT_STOP_STR " " - -/* - * After booting the board for the first time, new ethernet addresses - * should be generated and assigned to the environment variables - * "ethaddr" and "eth1addr". This is normally done during production. - */ -#define CONFIG_OVERWRITE_ETHADDR_ONCE - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MMC - -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_SOURCE -#undef CONFIG_CMD_XIMG - -#define CONFIG_ATMEL_USART -#define CONFIG_MACB -#define CONFIG_PORTMUX_PIO -#define CONFIG_SYS_NR_PIOS 5 -#define CONFIG_SYS_HSDRAMC -#define CONFIG_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_GENERIC_MMC - -#define CONFIG_SYS_DCACHE_LINESZ 32 -#define CONFIG_SYS_ICACHE_LINESZ 32 - -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x800000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 135 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_TEXT_BASE 0x00000000 - -#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE -#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE -#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SIZE 65536 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) - -#define CONFIG_SYS_MALLOC_LEN (256*1024) - -/* Allow 4MB for the kernel run-time image */ -#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) -#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) - -/* Other configuration settings that shouldn't have to change all that often */ -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP - -#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x3f00000) -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } - -#endif /* __CONFIG_H */ diff --git a/include/configs/axs101.h b/include/configs/axs101.h index 5e8c14d721..25116e50bb 100644 --- a/include/configs/axs101.h +++ b/include/configs/axs101.h @@ -121,8 +121,6 @@ /* * Command line configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h index 60981f9f56..12c5a6cd15 100644 --- a/include/configs/balloon3.h +++ b/include/configs/balloon3.h @@ -46,13 +46,8 @@ /* * Bootloader Components Configuration */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_NFS #undef CONFIG_CMD_ENV -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_USB -#define CONFIG_CMD_FPGA #define CONFIG_CMD_FPGA_LOADMK #undef CONFIG_LCD diff --git a/include/configs/baltos.h b/include/configs/baltos.h new file mode 100644 index 0000000000..68bfee5e8c --- /dev/null +++ b/include/configs/baltos.h @@ -0,0 +1,338 @@ +/* + * am335x_evm.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __CONFIG_BALTOS_H +#define __CONFIG_BALTOS_H + +#include <configs/ti_am335x_common.h> + +#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */ +#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM +#define CONFIG_BOARD_LATE_INIT + +/* Clock Defines */ +#define V_OSCK 24000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK) + +/* Custom script for NOR */ +#define CONFIG_SYS_LDSCRIPT "board/vscom/baltos/u-boot.lds" + +/* Always 128 KiB env size */ +#define CONFIG_ENV_SIZE (128 << 10) + +/* Enhance our eMMC support / experience. */ +#define CONFIG_CMD_GPT +#define CONFIG_EFI_PARTITION +#define CONFIG_PARTITION_UUIDS +#define CONFIG_CMD_PART + +/* FIT support */ +#define CONFIG_FIT +#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ +#define CONFIG_OF_BOARD_SETUP + +/* UBI Support */ +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS + +/* I2C configuration */ +#undef CONFIG_SYS_OMAP24_I2C_SPEED +#define CONFIG_SYS_OMAP24_I2C_SPEED 10000 + +#ifdef CONFIG_NAND +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 +#ifdef CONFIG_SPL_OS_BOOT +#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */ +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ +#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 +#endif +#define NANDARGS \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "nandargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "${mtdparts} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ + "nandroot=ubi0:rootfs rw ubi.mtd=5\0" \ + "nandrootfstype=ubifs rootwait=1\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "setenv loadaddr 0x84000000; " \ + "ubi part UBI; " \ + "ubifsmount ubi0:kernel; " \ + "ubifsload $loadaddr kernel-fit.itb;" \ + "ubifsumount; " \ + "bootm ${loadaddr}#conf${board_name}\0" +#else +#define NANDARGS "" +#endif + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ + "boot_fdt=try\0" \ + "bootpart=0:2\0" \ + "bootdir=/boot\0" \ + "bootfile=zImage\0" \ + "fdtfile=undefined\0" \ + "console=ttyO0,115200n8\0" \ + "partitions=" \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ + "optargs=\0" \ + "mmcdev=0\0" \ + "mmcroot=/dev/mmcblk0p2 ro\0" \ + "mmcrootfstype=ext4 rootwait\0" \ + "rootpath=/export/rootfs\0" \ + "nfsopts=nolock\0" \ + "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \ + "::off\0" \ + "ramroot=/dev/ram0 rw\0" \ + "ramrootfstype=ext2\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "${mtdparts} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "spiroot=/dev/mtdblock4 rw\0" \ + "spirootfstype=jffs2\0" \ + "spisrcaddr=0xe0000\0" \ + "spiimgsize=0x362000\0" \ + "spibusno=0\0" \ + "spiargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${spiroot} " \ + "rootfstype=${spirootfstype}\0" \ + "netargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=/dev/nfs " \ + "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ + "ip=dhcp\0" \ + "bootenv=uEnv.txt\0" \ + "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ + "importbootenv=echo Importing environment from mmc ...; " \ + "env import -t $loadaddr $filesize\0" \ + "ramargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${ramroot} " \ + "rootfstype=${ramrootfstype}\0" \ + "loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ + "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ + "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ + "mmcloados=run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdtaddr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" \ + "mmcboot=mmc dev ${mmcdev}; " \ + "if mmc rescan; then " \ + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run loadimage; then " \ + "run mmcloados;" \ + "fi;" \ + "fi;\0" \ + "spiboot=echo Booting from spi ...; " \ + "run spiargs; " \ + "sf probe ${spibusno}:0; " \ + "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \ + "bootz ${loadaddr}\0" \ + "netboot=echo Booting from network ...; " \ + "setenv autoload no; " \ + "dhcp; " \ + "tftp ${loadaddr} ${bootfile}; " \ + "tftp ${fdtaddr} ${fdtfile}; " \ + "run netargs; " \ + "bootz ${loadaddr} - ${fdtaddr}\0" \ + "ramboot=echo Booting from ramdisk ...; " \ + "run ramargs; " \ + "bootz ${loadaddr} ${rdaddr} ${fdtaddr}\0" \ + "findfdt=setenv fdtfile am335x-baltos.dtb\0" \ + NANDARGS + /*DFUARGS*/ +#endif + +#define CONFIG_BOOTCOMMAND \ + "run findfdt; " \ + "run mmcboot;" \ + "setenv mmcdev 1; " \ + "setenv bootpart 1:2; " \ + "run mmcboot;" \ + "run nandboot;" + + +/* NS16550 Configuration */ +#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ +#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ +#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ +#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ +#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ +#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_CMD_EEPROM +#define CONFIG_ENV_EEPROM_IS_ON_I2C +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_I2C_MULTI_EEPROMS + +/* PMIC support */ +#define CONFIG_POWER_TPS65910 + +/* SPL */ +#ifndef CONFIG_NOR_BOOT +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_YMODEM_SUPPORT + +/* Bootcount using the RTC block */ +#define CONFIG_BOOTCOUNT_LIMIT +#define CONFIG_BOOTCOUNT_AM33XX + +/* USB gadget RNDIS */ +/*#define CONFIG_SPL_MUSB_NEW_SUPPORT*/ + +/* General network SPL, both CPSW and USB gadget RNDIS */ +/*#define CONFIG_SPL_NET_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"*/ + +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" + +#ifdef CONFIG_NAND +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_NAND_OMAP_ELM +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ + CONFIG_SYS_NAND_PAGE_SIZE) +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, \ + 18, 19, 20, 21, 22, 23, 24, 25, \ + 26, 27, 28, 29, 30, 31, 32, 33, \ + 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 43, 44, 45, 46, 47, 48, 49, \ + 50, 51, 52, 53, 54, 55, 56, 57, } + +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 14 +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#endif +#endif + +/* + * USB configuration. We enable MUSB support, both for host and for + * gadget. We set USB0 as peripheral and USB1 as host, based on the + * board schematic and physical port wired to each. Then for host we + * add mass storage support and for gadget we add both RNDIS ethernet + * and DFU. + */ +#define CONFIG_USB_MUSB_DSPS +#define CONFIG_ARCH_MISC_INIT +#define CONFIG_MUSB_GADGET +#define CONFIG_MUSB_PIO_ONLY +#define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT +#define CONFIG_USB_GADGET +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 +#define CONFIG_MUSB_HOST +#define CONFIG_AM335X_USB0 +#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL +#define CONFIG_AM335X_USB1 +#define CONFIG_AM335X_USB1_MODE MUSB_HOST + +#ifdef CONFIG_MUSB_HOST +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#endif + +#ifdef CONFIG_MUSB_GADGET +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_RNDIS +#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" + +/* USB TI's IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0403 +#define CONFIG_G_DNL_PRODUCT_NUM 0xBD00 +#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" +#endif /* CONFIG_MUSB_GADGET */ + +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT) +/* disable host part of MUSB in SPL */ +#undef CONFIG_MUSB_HOST +/* disable EFI partitions and partition UUID support */ +#undef CONFIG_PARTITION_UUIDS +#undef CONFIG_EFI_PARTITION +/* + * Disable CPSW SPL support so we fit within the 101KiB limit. + */ +#undef CONFIG_SPL_ETH_SUPPORT +#endif + +/* Network. */ +#define CONFIG_PHY_GIGE +#define CONFIG_PHYLIB +#define CONFIG_PHY_ADDR 0 +#define CONFIG_PHY_SMSC +#define CONFIG_MII +#define CONFIG_CMD_MII +#define CONFIG_PHY_ATHEROS + +/* NAND support */ +#ifdef CONFIG_NAND +#define CONFIG_CMD_NAND +#define GPMC_NAND_ECC_LP_x8_LAYOUT 1 +#if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT) +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:128k(SPL)," \ + "128k(SPL.backup1)," \ + "128k(SPL.backup2)," \ + "128k(SPL.backup3)," \ + "1920k(u-boot)," \ + "-(UBI)" +#define CONFIG_ENV_IS_NOWHERE +#endif +#endif + +#endif /* ! __CONFIG_BALTOS_H */ diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index 490c53e92f..741fb05a7d 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -579,7 +579,6 @@ DEFAULT_LINUX_BOOT_ENV \ /* SPI flash. */ #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_SPEED 24000000 @@ -602,7 +601,6 @@ DEFAULT_LINUX_BOOT_ENV \ */ #if defined(CONFIG_NOR) #undef CONFIG_SYS_NO_FLASH -#define CONFIG_CMD_FLASH #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_CFI diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index 900dc42fc3..8f0f7f03fc 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -71,7 +71,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* No mtest functions as recommended */ -#undef CONFIG_CMD_MEMORY /* * This is the initial SP which is used only briefly for relocating the u-boot @@ -124,7 +123,6 @@ #define CONFIG_BOOTCOMMAND "" /* Commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_ASKENV #define CONFIG_CMD_CACHE #define CONFIG_CMD_FAT @@ -134,6 +132,5 @@ #define CONFIG_CMD_BOOTZ #define CONFIG_FAT_WRITE -#undef CONFIG_CMD_NFS #endif /* __BCM28155_AP_H */ diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h index fb85c7263b..ba26964fea 100644 --- a/include/configs/bcm_ep_board.h +++ b/include/configs/bcm_ep_board.h @@ -35,9 +35,6 @@ /* Some commands use this as the default load address */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE -/* No mtest functions as recommended */ -#undef CONFIG_CMD_MEMORY - /* * This is the initial SP which is used only briefly for relocating the u-boot * image to the top of SDRAM. After relocation u-boot moves the stack to the @@ -85,8 +82,6 @@ #define CONFIG_MX_CYCLIC /* Commands */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_CACHE #define CONFIG_CMD_FAT diff --git a/include/configs/beagle_x15.h b/include/configs/beagle_x15.h index 369f7b82e6..17fdded138 100644 --- a/include/configs/beagle_x15.h +++ b/include/configs/beagle_x15.h @@ -14,6 +14,12 @@ #define CONFIG_AM57XX +#ifdef CONFIG_SPL_BUILD +#define CONFIG_IODELAY_RECALIBRATION +#endif + +#define CONFIG_BOARD_EARLY_INIT_F + #define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_ENV_SIZE (64 << 10) @@ -22,8 +28,6 @@ #define FAT_ENV_DEVICE_AND_PART "0:1" #define FAT_ENV_FILE "uboot.env" -#define CONFIG_CMD_SAVEENV - #define CONSOLEDEV "ttyO2" #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ @@ -44,7 +48,6 @@ #define CONFIG_EFI_PARTITION /* CPSW Ethernet */ -#define CONFIG_CMD_NFS #define CONFIG_CMD_DHCP #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ #define CONFIG_BOOTP_DNS2 diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 84541b9c6e..c403729a8e 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -55,7 +55,6 @@ /* SPI */ #define CONFIG_TEGRA20_SLINK #define CONFIG_TEGRA_SLINK_CTRLS 6 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 24000000 diff --git a/include/configs/bf506f-ezkit.h b/include/configs/bf506f-ezkit.h index 0b66cdbc01..64db3acd2f 100644 --- a/include/configs/bf506f-ezkit.h +++ b/include/configs/bf506f-ezkit.h @@ -62,7 +62,6 @@ #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 71 -#define CONFIG_CMD_FLASH #define CONFIG_MONITOR_IS_IN_RAM */ #define CONFIG_SYS_NO_FLASH @@ -74,7 +73,6 @@ #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 /* -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_CMD_SF #define CONFIG_CMD_SPI @@ -97,7 +95,6 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_BFIN_SERIAL -#define CONFIG_CMD_MEMORY #undef CONFIG_GZIP #undef CONFIG_ZLIB #undef CONFIG_BOOTM_RTEMS diff --git a/include/configs/bf518f-ezbrd.h b/include/configs/bf518f-ezbrd.h index 0df463f5b6..b7ceba40cb 100644 --- a/include/configs/bf518f-ezbrd.h +++ b/include/configs/bf518f-ezbrd.h @@ -105,7 +105,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SST #define CONFIG_SPI_FLASH_STMICRO diff --git a/include/configs/bf525-ucr2.h b/include/configs/bf525-ucr2.h index 0ac3a09406..fce6fc2e12 100644 --- a/include/configs/bf525-ucr2.h +++ b/include/configs/bf525-ucr2.h @@ -67,7 +67,6 @@ /* support for serial flash */ #define CONFIG_BFIN_SPI -#define CONFIG_SPI_FLASH #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_HZ 30000000 #define CONFIG_SPI_FLASH_EON @@ -94,9 +93,4 @@ "sf read 0x1000000 0x20000 0x300000;" \ "bootm 0x1000000\0" -/* this sets up the default list of enabled commands */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_IMLS - #endif diff --git a/include/configs/bf526-ezbrd.h b/include/configs/bf526-ezbrd.h index 83f57cdcf9..5767ac1bd7 100644 --- a/include/configs/bf526-ezbrd.h +++ b/include/configs/bf526-ezbrd.h @@ -103,7 +103,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SST diff --git a/include/configs/bf527-ad7160-eval.h b/include/configs/bf527-ad7160-eval.h index c2958e834e..1c5fc9e492 100644 --- a/include/configs/bf527-ad7160-eval.h +++ b/include/configs/bf527-ad7160-eval.h @@ -89,7 +89,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h index 32ac961b67..28b3760f69 100644 --- a/include/configs/bf527-ezkit.h +++ b/include/configs/bf527-ezkit.h @@ -101,7 +101,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO diff --git a/include/configs/bf527-sdp.h b/include/configs/bf527-sdp.h index b374ab5772..51814a677f 100644 --- a/include/configs/bf527-sdp.h +++ b/include/configs/bf527-sdp.h @@ -77,7 +77,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ALL diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h index 322705decb..4876169104 100644 --- a/include/configs/bf533-stamp.h +++ b/include/configs/bf533-stamp.h @@ -98,7 +98,6 @@ #define CONFIG_ENV_SPI_MAX_HZ 30000000 /* #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ALL */ diff --git a/include/configs/bf537-minotaur.h b/include/configs/bf537-minotaur.h index 53b7ab51b8..7e52d17627 100644 --- a/include/configs/bf537-minotaur.h +++ b/include/configs/bf537-minotaur.h @@ -101,7 +101,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO @@ -146,22 +145,16 @@ # define CONFIG_BOOTDELAY 5 #endif -#include <config_cmd_default.h> - #ifdef CONFIG_BFIN_MAC # define CONFIG_CMD_DHCP # define CONFIG_CMD_PING -#else -# undef CONFIG_CMD_NFS #endif #define CONFIG_CMD_BOOTLDR #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_ELF -#undef CONFIG_CMD_FLASH #define CONFIG_CMD_I2C -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_SF #define CONFIG_BOOTCOMMAND "run ramboot" diff --git a/include/configs/bf537-pnav.h b/include/configs/bf537-pnav.h index 850c5164da..e922bd5637 100644 --- a/include/configs/bf537-pnav.h +++ b/include/configs/bf537-pnav.h @@ -82,7 +82,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO diff --git a/include/configs/bf537-srv1.h b/include/configs/bf537-srv1.h index 2da5d29302..d8a0cc6b5d 100644 --- a/include/configs/bf537-srv1.h +++ b/include/configs/bf537-srv1.h @@ -100,7 +100,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO @@ -145,22 +144,16 @@ # define CONFIG_BOOTDELAY 5 #endif -#include <config_cmd_default.h> - #ifdef CONFIG_BFIN_MAC # define CONFIG_CMD_DHCP # define CONFIG_CMD_PING -#else -# undef CONFIG_CMD_NFS #endif #define CONFIG_CMD_BOOTLDR #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_ELF -#undef CONFIG_CMD_FLASH #define CONFIG_CMD_I2C -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_SF #define CONFIG_BOOTCOMMAND "run flashboot" diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index 84ef4ed4c2..f250cdbf0a 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -84,7 +84,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ALL @@ -269,10 +268,6 @@ /* These are for board tests */ #if 0 #define CONFIG_BOOTCOMMAND "bootldr 0x203f0100" -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "autoboot in %d seconds: press space to stop\n", bootdelay -#define CONFIG_AUTOBOOT_STOP_STR " " #endif diff --git a/include/configs/bf538f-ezkit.h b/include/configs/bf538f-ezkit.h index 3c82bf2701..b1d4f263ae 100644 --- a/include/configs/bf538f-ezkit.h +++ b/include/configs/bf538f-ezkit.h @@ -83,7 +83,6 @@ #define CONFIG_ENV_SPI_MAX_HZ 30000000 /* #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ALL */ diff --git a/include/configs/bf548-ezkit.h b/include/configs/bf548-ezkit.h index 53f655890f..c7b44ae427 100644 --- a/include/configs/bf548-ezkit.h +++ b/include/configs/bf548-ezkit.h @@ -92,7 +92,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO diff --git a/include/configs/bf561-acvilon.h b/include/configs/bf561-acvilon.h index 299c4c29dc..da28396314 100644 --- a/include/configs/bf561-acvilon.h +++ b/include/configs/bf561-acvilon.h @@ -114,7 +114,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 10000000 #define CONFIG_SF_DEFAULT_SPEED 10000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ATMEL @@ -122,7 +121,6 @@ * Env Storage Settings */ #define CONFIG_ENV_IS_IN_SPI_FLASH -/* #define CONFIG_CMD_SAVEENV */ #define CONFIG_ENV_SECT_SIZE (1056 * 8) #define CONFIG_ENV_OFFSET ((16 + 256) * 1056) #define CONFIG_ENV_SIZE (8 * 1056) diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h index 73f3bfe197..0e353b9941 100644 --- a/include/configs/bf609-ezkit.h +++ b/include/configs/bf609-ezkit.h @@ -84,7 +84,6 @@ /* * Flash Settings */ -#undef CONFIG_CMD_IMLS #undef CONFIG_CMD_JFFS2 #define CONFIG_SYS_FLASH_CFI_WIDTH 2 #define CONFIG_FLASH_CFI_DRIVER @@ -101,7 +100,6 @@ #define CONFIG_BFIN_SPI6XX #define CONFIG_ENV_SPI_MAX_HZ 25000000 #define CONFIG_SF_DEFAULT_SPEED 25000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ALL /* @@ -141,7 +139,6 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_UART_CONSOLE 0 -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_SOFTSWITCH #define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 20*1024*1024 + 4) diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h index 1c9d584578..7b2faf29cb 100644 --- a/include/configs/bfin_adi_common.h +++ b/include/configs/bfin_adi_common.h @@ -9,7 +9,6 @@ * Command Settings */ #ifndef _CONFIG_CMD_DEFAULT_H -# include <config_cmd_default.h> # ifdef ADI_CMDS_NETWORK # define CONFIG_CMD_DHCP # define CONFIG_BOOTP_SUBNETMASK @@ -23,9 +22,6 @@ # ifdef CONFIG_BFIN_MAC # define CONFIG_CMD_MII # endif -# else -# undef CONFIG_CMD_BOOTD -# undef CONFIG_CMD_NFS # endif # ifdef CONFIG_LIBATA # define CONFIG_CMD_FAT @@ -75,10 +71,7 @@ # define CONFIG_CMD_I2C # define CONFIG_SOFT_I2C_READ_REPEATED_START # endif -# ifdef CONFIG_SYS_NO_FLASH -# undef CONFIG_CMD_FLASH -# undef CONFIG_CMD_IMLS -# else +# ifndef CONFIG_SYS_NO_FLASH # define CONFIG_CMD_JFFS2 # endif # ifdef CONFIG_CMD_JFFS2 diff --git a/include/configs/bg0900.h b/include/configs/bg0900.h index 7f364cd649..76c1c6a094 100644 --- a/include/configs/bg0900.h +++ b/include/configs/bg0900.h @@ -11,7 +11,6 @@ /* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH -#include <config_cmd_default.h> #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DOS_PARTITION @@ -22,9 +21,7 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_NAND #define CONFIG_CMD_NAND_TRIMFFS -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_SF #define CONFIG_CMD_SPI @@ -52,7 +49,6 @@ /* SPI FLASH */ #ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_BAR #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SF_DEFAULT_BUS 2 diff --git a/include/configs/blackstamp.h b/include/configs/blackstamp.h index ee526afab1..c0197ca0e6 100644 --- a/include/configs/blackstamp.h +++ b/include/configs/blackstamp.h @@ -102,8 +102,6 @@ #define CONFIG_AUTO_COMPLETE 1 #define CONFIG_ENV_OVERWRITE 1 -#include <config_cmd_default.h> - #ifdef CONFIG_SMC91111 # define CONFIG_CMD_DHCP # define CONFIG_CMD_PING @@ -219,7 +217,6 @@ /* For the M25P64 SCK Should be Kept < 15Mhz */ #define CONFIG_ENV_SPI_MAX_HZ 15000000 #define CONFIG_SF_DEFAULT_SPEED 15000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO /* @@ -237,8 +234,6 @@ * hardware don't support Parallel Flash at all. */ #define CONFIG_SYS_NO_FLASH -#undef CONFIG_CMD_IMLS #undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_FLASH #endif diff --git a/include/configs/blackvme.h b/include/configs/blackvme.h index 27dccf65c4..4752b072a1 100644 --- a/include/configs/blackvme.h +++ b/include/configs/blackvme.h @@ -142,7 +142,6 @@ #define CONFIG_ENV_SPI_MAX_HZ 15000000 #define CONFIG_SF_DEFAULT_SPEED 15000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO /* @@ -153,8 +152,6 @@ #define CONFIG_CMDLINE_EDITING 1 #define CONFIG_AUTO_COMPLETE 1 -#include <config_cmd_default.h> - #define CONFIG_CMD_BOOTLDR #define CONFIG_CMD_CACHE #define CONFIG_CMD_CPLBINFO @@ -234,8 +231,6 @@ * No Parallel Flash on this board */ #define CONFIG_SYS_NO_FLASH -#undef CONFIG_CMD_IMLS #undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_FLASH #endif diff --git a/include/configs/br4.h b/include/configs/br4.h index a44c18c66e..cbef809c5a 100644 --- a/include/configs/br4.h +++ b/include/configs/br4.h @@ -82,7 +82,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 99c142ae02..152141531c 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -17,17 +17,13 @@ "defaultip=192.168.60.253\0" \ "defaultsip=192.168.60.254\0" \ "netconsole=echo switching to network console ...; " \ -"if dhcp; then " \ -"setenv ncip ${serverip}; else " \ -"setenv ncip 192.168.60.254; " \ -"setenv serverip 192.168.60.254; " \ -"setenv gatewayip 192.168.60.254; " \ -"setenv ipaddr 192.168.60.1; " \ -"fi;" \ -"setenv netdisplay0 '" \ -"setcurs 1 9; puts myip; setcurs 10 9; puts ${ipaddr};" \ -"setcurs 1 10;puts serverip; setcurs 10 10; puts ${serverip};" \ -"run netdisplay0; " \ +"if dhcp; then setenv ncip ${serverip}; " \ +"else " \ +"setenv ncip 192.168.60.254; setenv serverip 192.168.60.254; " \ +"setenv gatewayip 192.168.60.254; setenv ipaddr 192.168.60.1; " \ +"fi; " \ +"setcurs 1 9; lcdputs myip; setcurs 10 9; lcdputs ${ipaddr};" \ +"setcurs 1 10;lcdputs serverip; setcurs 10 10; lcdputs ${serverip};" \ "setenv stdout nc;setenv stdin nc;setenv stderr nc\0" #define CONFIG_CMD_TIME @@ -155,28 +151,6 @@ sizeof(CONFIG_SYS_PROMPT) + 16) /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -/* - * For commands to use, we take the default list and add a few other - * useful commands. Note that we must have set CONFIG_SYS_NO_FLASH - * prior to this include, in order to skip a few commands. When we do - * have flash, if we expect these commands they must be enabled in that - * config. If desired, a specific list of desired commands can be used - * instead. - */ -#include <config_cmd_default.h> -/* undefine commands, which we do not need */ -#undef CONFIG_CMD_EDITENV -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_ITEST -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_XIMG -/* define command we need always */ -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_SOURCE /* * Our platforms make use of SPL to initalize the hardware (primarily diff --git a/include/configs/calimain.h b/include/configs/calimain.h index 5169b41b4f..7d8bb4790d 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -221,8 +221,6 @@ #define CONFIG_BOOTDELAY 0 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_BOOT_RETRY_TIME 60 /* continue boot after 60 s inactivity */ -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_DELAY_STR "\x0d" /* press ENTER to interrupt BOOT */ #define CONFIG_RESET_TO_RETRY /* @@ -313,7 +311,6 @@ /* * U-Boot commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_ENV #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP @@ -321,7 +318,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_GPIO #ifndef CONFIG_DRIVER_TI_EMAC diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index f8785dbafc..21e3a0c2db 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -75,7 +75,6 @@ /* SPI support */ #define CONFIG_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE @@ -91,12 +90,6 @@ #define CONFIG_MMC_MBLOCK /* U-Boot command configuration */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_BDI -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR #define CONFIG_CMD_ASKENV #define CONFIG_CMD_CACHE #define CONFIG_CMD_DHCP diff --git a/include/configs/canmb.h b/include/configs/canmb.h index c90179380f..c6563780d7 100644 --- a/include/configs/canmb.h +++ b/include/configs/canmb.h @@ -49,14 +49,11 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_IMMAP #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_REGINFO #define CONFIG_CMD_SNTP diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index c76a426db8..96dfe07c0a 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -58,7 +58,6 @@ /* SPI */ #define CONFIG_TEGRA20_SLINK #define CONFIG_TEGRA_SLINK_CTRLS 6 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 24000000 diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h index 93938642fa..4607d9f6bc 100644 --- a/include/configs/cm5200.h +++ b/include/configs/cm5200.h @@ -26,8 +26,6 @@ /* * Supported commands */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_BSP #define CONFIG_CMD_DATE @@ -37,7 +35,6 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_SNTP diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index a3908d0ef5..231f4ba33d 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -19,10 +19,6 @@ /* CMD */ #define CONFIG_CMD_GREPENV -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_XIMG -#undef CONFIG_CMD_FPGA /* MMC */ #define CONFIG_SYS_FSL_USDHC_NUM 3 @@ -167,7 +163,6 @@ /* SPI */ #define CONFIG_SPI #define CONFIG_MXC_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SPI_FLASH_EON #define CONFIG_SPI_FLASH_GIGADEVICE diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 3eb7886eb6..41df106ee0 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -110,8 +110,6 @@ #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ @@ -129,9 +127,6 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMLS /* List all found images */ #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h index 8c63138322..a8d0b97287 100644 --- a/include/configs/cm_t3517.h +++ b/include/configs/cm_t3517.h @@ -120,8 +120,6 @@ #define CONFIG_CMD_USB /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ @@ -140,9 +138,6 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_GPIO -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMLS /* List all found images */ #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h index a129f68814..2a8b73022e 100644 --- a/include/configs/cm_t54.h +++ b/include/configs/cm_t54.h @@ -57,7 +57,6 @@ #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) #define CONFIG_SYS_REDUNDAND_ENVIRONMENT -#define CONFIG_CMD_SAVEENV /* Enhance our eMMC support / experience. */ #define CONFIG_HSMMC2_8BIT diff --git a/include/configs/cmi_mpc5xx.h b/include/configs/cmi_mpc5xx.h index 9bc3795d91..d081865749 100644 --- a/include/configs/cmi_mpc5xx.h +++ b/include/configs/cmi_mpc5xx.h @@ -44,21 +44,8 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_NFS - -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_LOADB #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_LOADS #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_BDI -#define CONFIG_CMD_CONSOLE -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_RUN -#define CONFIG_CMD_IMI #if 0 diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 11dd4d712b..8a6106d3a7 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -120,12 +120,8 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_LOADB #undef CONFIG_CMD_MII #ifdef CONFIG_MCFFEC diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 6f25fdba77..e3f0ab027f 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -52,15 +52,9 @@ /* * Bootloader Components Configuration */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_LOADB /* Both together */ -#undef CONFIG_CMD_LOADS /* saves 10 KB */ #define CONFIG_CMD_ENV -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_MMC #define CONFIG_CMD_USB -#define CONFIG_CMD_FLASH /* * Networking Configuration diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index a3f27e36a1..8228e4208b 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -55,7 +55,6 @@ #define CONFIG_ENV_SIZE (SZ_64K) /* Debug commands */ -#define CONFIG_CMD_BDI #define CONFIG_CMD_CACHE /* Miscellaneous commands */ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 4dec42a953..aff2810a05 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -13,7 +13,6 @@ #define __CONFIG_H #include <asm/arch/imx-regs.h> -#include <config_cmd_default.h> #define CONFIG_VF610 #define CONFIG_SYS_THUMB_BUILD @@ -54,6 +53,11 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR +/* GPIO support */ +#define CONFIG_DM_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_VYBRID_GPIO + /* Dynamic MTD partition support */ #define CONFIG_CMD_MTDPARTS /* Enable 'mtdparts' command line support */ #define CONFIG_MTD_PARTITIONS @@ -65,7 +69,6 @@ "512k(u-boot-env)," \ "-(ubi)" -#undef CONFIG_CMD_IMLS #define CONFIG_MMC #define CONFIG_FSL_ESDHC @@ -266,4 +269,11 @@ #define CONFIG_USB_GADGET_MASS_STORAGE #define CONFIG_CMD_USB_MASS_STORAGE +/* Enable SPI support */ +#ifdef CONFIG_OF_CONTROL +#define CONFIG_DM_SPI +#define CONFIG_CMD_SPI +#define CONFIG_FSL_DSPI +#endif + #endif /* __CONFIG_H */ diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 9cab9fb8f9..8f829eddb1 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -219,7 +219,6 @@ #define CONFIG_HARD_SPI #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_CMD_SF @@ -353,7 +352,6 @@ #if defined(CONFIG_TRAILBLAZER) #define CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ -#undef CONFIG_CMD_SAVEENV #elif defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SPI_BUS 0 @@ -395,8 +393,6 @@ #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#include <config_cmd_default.h> - #ifndef CONFIG_TRAILBLAZER #define CONFIG_CMD_ELF diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index bf765afc11..88750e057e 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -408,7 +408,6 @@ * eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 @@ -620,8 +619,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_ERRATA diff --git a/include/configs/corvus.h b/include/configs/corvus.h index f5b8f9b442..3cfae212d4 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -70,13 +70,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_NAND diff --git a/include/configs/cpu9260.h b/include/configs/cpu9260.h index 1feaefd14e..d3c6f75a12 100644 --- a/include/configs/cpu9260.h +++ b/include/configs/cpu9260.h @@ -249,13 +249,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_IMLS - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_NAND diff --git a/include/configs/cpuat91.h b/include/configs/cpuat91.h index 8c7d97a18e..f990cf7067 100644 --- a/include/configs/cpuat91.h +++ b/include/configs/cpuat91.h @@ -108,16 +108,10 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_MII #define CONFIG_CMD_CACHE #undef CONFIG_CMD_USB -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_NFS #undef CONFIG_CMD_DHCP #ifdef CONFIG_SYS_I2C_SOFT @@ -195,12 +189,6 @@ #define CONFIG_DEVICE_NULLDEV #define CONFIG_SILENT_CONSOLE -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot\n" -#define CONFIG_AUTOBOOT_STOP_STR " " -#define CONFIG_AUTOBOOT_DELAY_STR "d" - #define CONFIG_VERSION_VARIABLE #define MTDIDS_DEFAULT "nor0=physmap-flash.0" diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 4fef433252..0e1f0467c7 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -17,8 +17,6 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_ARCH_MISC_INIT -#define CONFIG_NR_DRAM_BANKS 1 - #define CONFIG_X86_SERIAL #define CONFIG_SMSC_LPC47M diff --git a/include/configs/csb272.h b/include/configs/csb272.h index a5c6f8474b..71cb5dff36 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -71,8 +71,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_ELF diff --git a/include/configs/csb472.h b/include/configs/csb472.h index 6aa98efd4e..5bd3867908 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -71,8 +71,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_ELF diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h index ab5226b5fa..729b6e74aa 100644 --- a/include/configs/da830evm.h +++ b/include/configs/da830evm.h @@ -123,7 +123,6 @@ #define CONFIG_ENV_SECT_SIZE 4096 #define CONFIG_SYS_NO_FLASH #define CONFIG_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_BASE DAVINCI_SPI0_BASE @@ -171,7 +170,6 @@ /* * U-Boot commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_ENV #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP @@ -179,9 +177,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#define CONFIG_CMD_MEMORY -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR #ifdef CONFIG_CMD_BDI #define CONFIG_CLOCKS @@ -194,8 +189,6 @@ #endif #ifdef CONFIG_USE_NAND -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_NAND #define CONFIG_CMD_MTDPARTS #define CONFIG_MTD_PARTITIONS @@ -203,11 +196,8 @@ #endif #ifdef CONFIG_USE_SPIFLASH -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_FLASH #define CONFIG_CMD_SPI #define CONFIG_CMD_SF -#define CONFIG_CMD_SAVEENV #endif /* SD/MMC configuration */ @@ -238,8 +228,6 @@ #define CONFIG_ENV_IS_NOWHERE #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_SIZE (16 << 10) -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_FLASH #undef CONFIG_CMD_ENV #endif diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 37a485b0a9..3da9da42df 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -142,7 +142,6 @@ #define CONFIG_BAUDRATE 115200 /* Default baud rate */ #define CONFIG_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_CMD_SF @@ -294,7 +293,6 @@ /* * U-Boot commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_ENV #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP @@ -302,7 +300,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#define CONFIG_CMD_MEMORY #ifdef CONFIG_CMD_BDI #define CONFIG_CLOCKS @@ -315,8 +312,6 @@ #endif #ifdef CONFIG_USE_NAND -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_NAND #define CONFIG_CMD_MTDPARTS @@ -329,10 +324,7 @@ #endif #ifdef CONFIG_USE_SPIFLASH -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_FLASH #define CONFIG_CMD_SPI -#define CONFIG_CMD_SAVEENV #endif #if !defined(CONFIG_USE_NAND) && \ @@ -341,7 +333,6 @@ #define CONFIG_ENV_IS_NOWHERE #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_SIZE (16 << 10) -#undef CONFIG_CMD_IMLS #undef CONFIG_CMD_ENV #endif diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index e702a50380..89b6f23c93 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -53,7 +53,6 @@ /* SPI */ #define CONFIG_TEGRA114_SPI #define CONFIG_TEGRA114_SPI_CTRLS 6 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 24000000 diff --git a/include/configs/davinci_dm355evm.h b/include/configs/davinci_dm355evm.h index 16b901b01b..847d788292 100644 --- a/include/configs/davinci_dm355evm.h +++ b/include/configs/davinci_dm355evm.h @@ -69,13 +69,6 @@ /* NYET -- #define CONFIG_USB_DAVINCI */ /* U-Boot command configuration */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C diff --git a/include/configs/davinci_dm355leopard.h b/include/configs/davinci_dm355leopard.h index 4eed72292d..d4b994ad2b 100644 --- a/include/configs/davinci_dm355leopard.h +++ b/include/configs/davinci_dm355leopard.h @@ -54,13 +54,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* U-Boot command configuration */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C diff --git a/include/configs/davinci_dm365evm.h b/include/configs/davinci_dm365evm.h index c50c059f65..8b42c50dd9 100644 --- a/include/configs/davinci_dm365evm.h +++ b/include/configs/davinci_dm365evm.h @@ -112,13 +112,6 @@ #endif /* CONFIG_MUSB_UDC */ /* U-Boot command configuration */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h index b02e73c02a..8571cbdbae 100644 --- a/include/configs/davinci_dm6467evm.h +++ b/include/configs/davinci_dm6467evm.h @@ -112,7 +112,6 @@ extern unsigned int davinci_arm_clk_get(void); "root=/dev/hda1 rw noinitrd ip=dhcp" /* U-Boot commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DIAG #define CONFIG_CMD_I2C @@ -121,12 +120,7 @@ extern unsigned int davinci_arm_clk_get(void); #define CONFIG_CMD_EEPROM #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR #ifdef CONFIG_SYS_USE_NAND -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_NAND #endif diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index 2467f70522..61087363b2 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -169,7 +169,6 @@ /*=================*/ /* U-Boot commands */ /*=================*/ -#include <config_cmd_default.h> #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG @@ -178,17 +177,12 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES #define CONFIG_CMD_EEPROM -#undef CONFIG_CMD_BDI #ifdef CONFIG_CMD_BDI #define CONFIG_CLOCKS #endif -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR #ifdef CONFIG_SYS_USE_NAND -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_NAND #elif defined(CONFIG_SYS_USE_NOR) #define CONFIG_CMD_JFFS2 diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index 2505465242..db636e4cf8 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -111,7 +111,6 @@ /*=================*/ /* U-Boot commands */ /*=================*/ -#include <config_cmd_default.h> #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG @@ -122,11 +121,6 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_NAND #undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS #ifdef CONFIG_CMD_BDI #define CONFIG_CLOCKS diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index e773835dd9..9ecf6cebc2 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -104,7 +104,6 @@ "nand read 87A00000 100000 300000;" \ "bootelf 87A00000" /* U-Boot commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG @@ -115,11 +114,6 @@ #define CONFIG_CMD_NAND #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF /* Needed to load Integrity kernel. */ -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS #ifdef CONFIG_CMD_BDI #define CONFIG_CLOCKS diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index dae37cdaf6..410cf68741 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -157,7 +157,6 @@ /*=================*/ /* U-Boot commands */ /*=================*/ -#include <config_cmd_default.h> #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG @@ -166,12 +165,7 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES #define CONFIG_CMD_EEPROM -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR #ifdef CONFIG_SYS_USE_NAND -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_NAND #elif defined(CONFIG_SYS_USE_NOR) #define CONFIG_CMD_JFFS2 diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 12a24ced1b..24dbf6bf71 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -26,7 +26,6 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_CACHE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV @@ -63,6 +62,11 @@ #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ #define CONFIG_SYS_ALT_MEMTEST +/* Keep device tree and initrd in lower memory so the kernel can access them */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x10000000\0" \ + "initrd_high=0x10000000\0" + /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 77d34080fd..c33a58895a 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -24,7 +24,6 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_I2C diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h index ea55084a31..0abab78d2a 100644 --- a/include/configs/dbau1x00.h +++ b/include/configs/dbau1x00.h @@ -74,26 +74,15 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_BDI #undef CONFIG_CMD_BEDBUG #undef CONFIG_CMD_ELF -#undef CONFIG_CMD_SAVEENV #undef CONFIG_CMD_FAT -#undef CONFIG_CMD_FPGA #undef CONFIG_CMD_MII -#undef CONFIG_CMD_RUN - #ifdef CONFIG_DBAU1550 -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_LOADB - #undef CONFIG_CMD_I2C #undef CONFIG_CMD_IDE -#undef CONFIG_CMD_NFS #undef CONFIG_CMD_PCMCIA #else @@ -101,10 +90,6 @@ #define CONFIG_CMD_IDE #define CONFIG_CMD_DHCP -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS - #endif diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index bd96a7d3f4..4f35234ced 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -49,7 +49,6 @@ /* * NOR Flash */ -#define CONFIG_CMD_FLASH #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 71 #define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE @@ -78,7 +77,6 @@ /* * U-Boot Commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_CACHE /* diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 84b047e53f..215dc30bde 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -100,8 +100,6 @@ #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ #undef CONFIG_CMD_SPI #undef CONFIG_CMD_GPIO #undef CONFIG_CMD_ASKENV diff --git a/include/configs/dig297.h b/include/configs/dig297.h index 5ec3c99799..f6d7ec4e78 100644 --- a/include/configs/dig297.h +++ b/include/configs/dig297.h @@ -103,8 +103,6 @@ #define CONFIG_LZO /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_UBI /* UBI Support */ #define CONFIG_CMD_UBIFS /* UBIFS Support */ @@ -118,12 +116,6 @@ #define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_CMD_NAND /* NAND support */ -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ -#undef CONFIG_CMD_NFS /* NFS support */ - #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index 76ec168c20..a7af35196b 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -99,8 +99,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #ifdef CONFIG_VIDEO #define CONFIG_CMD_BMP #endif @@ -396,10 +394,6 @@ #define CONFIG_CMDLINE_EDITING 1 #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR " " - #define CONFIG_LOOPW 1 #define CONFIG_MX_CYCLIC 1 #define CONFIG_ZERO_BOOTDELAY_CHECK diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index d9bd564880..e6bfe58e98 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -29,8 +29,6 @@ #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ -#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ -#define CONFIG_AUTOBOOT_STOP_STR " " /* * Configure PLL @@ -73,7 +71,6 @@ #undef CONFIG_CMD_ELF #undef CONFIG_CMD_I2C #undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_NFS /* * SDRAM configuration (please see cpu/ppc/sdram.[ch]) diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h index a9cfc10d0c..0299d16e83 100644 --- a/include/configs/dlvision.h +++ b/include/configs/dlvision.h @@ -67,7 +67,6 @@ #undef CONFIG_CMD_ELF #undef CONFIG_CMD_I2C #undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_NFS /* * SDRAM configuration (please see cpu/ppc/sdram.[ch]) diff --git a/include/configs/dnp5370.h b/include/configs/dnp5370.h index 3cbd67f6b0..e809f20359 100644 --- a/include/configs/dnp5370.h +++ b/include/configs/dnp5370.h @@ -118,11 +118,4 @@ "cp.b 0x01000000 0x20030000 0x2c0000\0" \ "runme=bootm 0x01000000\0" -/* this sets up the default list of enabled commands */ -#include <config_cmd_default.h> - -#ifndef CONFIG_BFIN_MAC -# undef CONFIG_CMD_NFS -#endif - #endif diff --git a/include/configs/dns325.h b/include/configs/dns325.h index 379e6c79b8..54be415712 100644 --- a/include/configs/dns325.h +++ b/include/configs/dns325.h @@ -32,7 +32,6 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_NAND diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h index ec7f721ff3..b27b2026c3 100644 --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h @@ -31,7 +31,6 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_MII diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 77edc21d9c..914e1cf069 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -15,6 +15,10 @@ #define CONFIG_DRA7XX #define CONFIG_BOARD_EARLY_INIT_F +#ifdef CONFIG_SPL_BUILD +#define CONFIG_IODELAY_RECALIBRATION +#endif + #ifndef CONFIG_QSPI_BOOT /* MMC ENV related defines */ #define CONFIG_ENV_IS_IN_MMC @@ -24,7 +28,6 @@ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) #define CONFIG_SYS_REDUNDAND_ENVIRONMENT #endif -#define CONFIG_CMD_SAVEENV #if (CONFIG_CONS_INDEX == 1) #define CONSOLEDEV "ttyO0" @@ -38,6 +41,7 @@ #define CONFIG_SYS_OMAP_ABE_SYSCK +#ifndef CONFIG_SPL_BUILD /* Define the default GPT table for eMMC */ #define PARTS_DEFAULT \ "uuid_disk=${uuid_gpt_disk};" \ @@ -91,6 +95,7 @@ #define CONFIG_USB_FASTBOOT_BUF_SIZE 0x2F000000 #define CONFIG_FASTBOOT_FLASH #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 +#endif #include <configs/ti_omap5_common.h> @@ -117,7 +122,6 @@ /* SPI */ #undef CONFIG_OMAP3_SPI #define CONFIG_TI_QSPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #define CONFIG_CMD_SPI @@ -248,7 +252,7 @@ "128k(NAND.u-boot-env)," \ "128k(NAND.u-boot-env.backup1)," \ "8m(NAND.kernel)," \ - "-(NAND.rootfs)" + "-(NAND.file-system)" #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 /* NAND: SPL related configs */ #ifdef CONFIG_SPL_NAND_SUPPORT @@ -270,7 +274,6 @@ #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ /* #define CONFIG_INIT_IGNORE_ERROR */ #undef CONFIG_SYS_NO_FLASH -#define CONFIG_CMD_FLASH #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_CFI diff --git a/include/configs/draco.h b/include/configs/draco.h index a2438d883e..acefd3e35d 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -19,18 +19,23 @@ #include "siemens-am33x-common.h" -#define CONFIG_SYS_MPUCLK 275 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_SYS_MPUCLK 300 #define DDR_PLL_FREQ 303 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC -#define BOARD_DFU_BUTTON_GPIO 27 -#define BOARD_DFU_BUTTON_LED 64 /* red LED */ -#define BOARD_STATUS_LED 103 /* green LED */ +#define BOARD_DFU_BUTTON_GPIO 27 /* Use as default */ #define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ +#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + "button_dfu0=27\0" \ + "led0=103,1,0\0" \ + "led1=64,0,1\0" + #undef CONFIG_DOS_PARTITION #undef CONFIG_CMD_FAT +#define CONFIG_BOARD_LATE_INIT /* Physical Memory Map */ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ @@ -57,13 +62,25 @@ /* Watchdog */ #define CONFIG_OMAP_WATCHDOG +/* Define own nand partitions */ +#define CONFIG_ENV_OFFSET_REDUND 0x2E0000 +#define CONFIG_ENV_SIZE_REDUND 0x2000 +#define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) + + +#define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_V2 + #ifndef CONFIG_SPL_BUILD /* Default env settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ + "hostname=draco\0" \ "nand_img_size=0x400000\0" \ "optargs=\0" \ - CONFIG_COMMON_ENV_SETTINGS + "preboot=draco_led 0\0" \ + CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + CONFIG_ENV_SETTINGS_V2 \ + CONFIG_ENV_SETTINGS_NAND_V2 #ifndef CONFIG_RESTORE_FLASH /* set to negative value for no autoboot */ @@ -75,6 +92,7 @@ "reset; " \ "fi;" \ "run nand_boot;" \ +"run nand_boot_backup;" \ "reset;" diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index ea6e5c0329..133c7f4a35 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -46,7 +46,6 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_FAT @@ -73,7 +72,6 @@ #endif #ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH 1 #define CONFIG_HARD_SPI 1 #define CONFIG_KIRKWOOD_SPI 1 #define CONFIG_SPI_FLASH_MACRONIX 1 diff --git a/include/configs/ea20.h b/include/configs/ea20.h index 1e522c3b6b..b9f28a34b8 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -66,7 +66,6 @@ #define CONFIG_BAUDRATE 115200 /* Default baud rate */ #define CONFIG_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE @@ -148,7 +147,6 @@ /* * U-Boot commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_ENV #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP @@ -156,7 +154,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_I2C #define CONFIG_CMD_GPIO @@ -172,8 +169,6 @@ /* NAND Setup */ #ifdef CONFIG_SYS_USE_NAND -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_NAND #define CONFIG_CMD_MTDPARTS @@ -197,11 +192,8 @@ /* SPI Flash */ #ifdef CONFIG_USE_SPIFLASH -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_FLASH #define CONFIG_CMD_SPI #define CONFIG_CMD_SF -#define CONFIG_CMD_SAVEENV #endif #if !defined(CONFIG_SYS_USE_NAND) && \ @@ -210,7 +202,6 @@ #define CONFIG_ENV_IS_NOWHERE #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_SIZE (16 << 10) -#undef CONFIG_CMD_IMLS #undef CONFIG_CMD_ENV #endif diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 5f6148e754..924362cb23 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -64,9 +64,6 @@ * Command line configuration. */ #define CONFIG_CMDLINE_EDITING -#include <config_cmd_default.h> - -#undef CONFIG_CMD_LOADB #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index f7e70aa573..271e071cbb 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -112,9 +112,6 @@ /* * Command line configuration */ - -#include <config_cmd_default.h> - #define CONFIG_CMD_BMP #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index 358314c240..8e62674b3f 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -30,17 +30,13 @@ #define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_PING #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_SDRAM #define CONFIG_CMD_ENV #define CONFIG_CMD_USB #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 -#define CONFIG_CMD_SAVEENV #define CONFIG_USB_STORAGE #define CONFIG_DOS_PARTITION diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h index 70f122643a..87b29f8901 100644 --- a/include/configs/edb93xx.h +++ b/include/configs/edb93xx.h @@ -91,11 +91,6 @@ #undef CONFIG_USE_IRQ /* Don't need IRQ/FIQ */ /* Monitor configuration */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_XIMG - #undef CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_JFFS2 diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index bd0874065c..b5e8e0ec20 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -135,9 +135,8 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ /* - * Commands configuration - using default command set for now + * Commands configuration */ -#include <config_cmd_default.h> #define CONFIG_CMD_IDE #define CONFIG_CMD_I2C #define CONFIG_CMD_USB diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 5dfd56ca21..cba58aa70f 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -68,7 +68,6 @@ #define CONFIG_CMD_SF #ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 @@ -77,9 +76,6 @@ #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #endif -/* Command definition */ -#undef CONFIG_CMD_FPGA - #define CONFIG_CMD_BMODE #define CONFIG_ARP_TIMEOUT 200UL diff --git a/include/configs/enbw_cmc.h b/include/configs/enbw_cmc.h index 3be17f166f..141489d179 100644 --- a/include/configs/enbw_cmc.h +++ b/include/configs/enbw_cmc.h @@ -152,8 +152,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 128 #define CONFIG_FLASH_16BIT /* Flash is 16-bit */ -#define CONFIG_CMD_FLASH - #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_MONITOR_LEN 0x80000 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ @@ -246,7 +244,6 @@ /* * U-Boot commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_ENV #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP @@ -254,7 +251,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_CACHE #ifdef CONFIG_CMD_BDI @@ -268,7 +264,6 @@ #endif #ifdef CONFIG_USE_NAND -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_NAND #define CONFIG_CMD_MTDPARTS @@ -286,7 +281,6 @@ #define CONFIG_ENV_IS_NOWHERE #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_SIZE (16 << 10) -#undef CONFIG_CMD_IMLS #undef CONFIG_CMD_ENV #endif diff --git a/include/configs/espt.h b/include/configs/espt.h index f717954484..d854341b07 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -18,13 +18,9 @@ * Command line configuration. */ #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_ENV -#define CONFIG_CMD_NFS -#define CONFIG_CMD_SAVEENV #define CONFIG_BOOTDELAY -1 #define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01" diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 2b638bf733..c7b1e5cbf7 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -60,7 +60,6 @@ /* 512kB DataFlash at NPCS0 */ #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 #define CONFIG_HAS_DATAFLASH -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ATMEL #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 @@ -91,29 +90,13 @@ #define CONFIG_AT91_GPIO /* Command line configuration */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS - #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII #define CONFIG_CMD_MTDPARTS #define CONFIG_CMD_NAND #define CONFIG_CMD_SPI -#ifdef MINIMAL_LOADER -#undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_EDITENV -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_ITEST -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_XIMG -#else +#ifndef MINIMAL_LOADER #define CONFIG_CMD_ASKENV #define CONFIG_CMD_BSP #define CONFIG_CMD_CACHE diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 87f8db0fba..d7bf80b69b 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -59,8 +59,6 @@ #define CONFIG_PWM /* Command definition*/ -#include <config_cmd_default.h> - #define CONFIG_CMD_MMC #define CONFIG_CMD_EXT4_WRITE #define CONFIG_FAT_WRITE @@ -79,7 +77,6 @@ /* FLASH and environment organization */ #define CONFIG_SYS_NO_FLASH -#undef CONFIG_CMD_IMLS #include <config_distro_defaults.h> diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index f6b0a6ff2b..08e2009870 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -22,10 +22,6 @@ #define CONFIG_MMC_SDMA #define CONFIG_MMC_DEFAULT_DEV 0 -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_MISC -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_XIMG #undef CONFIG_CMD_ONENAND #undef CONFIG_CMD_MTDPARTS #define CONFIG_CMD_DFU diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h deleted file mode 100644 index 75bff4ce28..0000000000 --- a/include/configs/favr-32-ezkit.h +++ /dev/null @@ -1,181 +0,0 @@ -/* - * Copyright (C) 2008 Atmel Corporation - * - * Configuration settings for the Favr-32 EarthLCD LCD kit. - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <asm/arch/hardware.h> - -#define CONFIG_AT32AP -#define CONFIG_AT32AP7000 -#define CONFIG_FAVR32_EZKIT - -#define CONFIG_FAVR32_EZKIT_EXT_FLASH - -/* - * Set up the PLL to run at 140 MHz, the CPU to run at the PLL - * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the - * PLL frequency. - * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz - */ -#define CONFIG_PLL -#define CONFIG_SYS_POWER_MANAGER -#define CONFIG_SYS_OSC0_HZ 20000000 -#define CONFIG_SYS_PLL0_DIV 1 -#define CONFIG_SYS_PLL0_MUL 7 -#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 -/* - * Set the CPU running at: - * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz - */ -#define CONFIG_SYS_CLKDIV_CPU 0 -/* - * Set the HSB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz - */ -#define CONFIG_SYS_CLKDIV_HSB 1 -/* - * Set the PBA running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz - */ -#define CONFIG_SYS_CLKDIV_PBA 2 -/* - * Set the PBB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz - */ -#define CONFIG_SYS_CLKDIV_PBB 1 - -/* Reserve VM regions for SDRAM and NOR flash */ -#define CONFIG_SYS_NR_VM_REGIONS 2 - -/* - * The PLLOPT register controls the PLL like this: - * icp = PLLOPT<2> - * ivco = PLLOPT<1:0> - * - * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). - */ -#define CONFIG_SYS_PLL0_OPT 0x04 - -#define CONFIG_USART_BASE ATMEL_BASE_USART3 -#define CONFIG_USART_ID 3 - -/* User serviceable stuff */ -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_STACKSIZE (2048) - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "root=/dev/mtdblock1 rootfstype=jffs fbmem=1800k" - -#define CONFIG_BOOTCOMMAND \ - "fsload; bootm $(fileaddr)" - -/* - * Only interrupt autoboot if <space> is pressed. Otherwise, garbage - * data on the serial line may interrupt the boot sequence. - */ -#define CONFIG_BOOTDELAY 1 -#define CONFIG_AUTOBOOT -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "d" -#define CONFIG_AUTOBOOT_STOP_STR " " - -/* - * After booting the board for the first time, new ethernet addresses - * should be generated and assigned to the environment variables - * "ethaddr" and "eth1addr". This is normally done during production. - */ -#define CONFIG_OVERWRITE_ETHADDR_ONCE - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MMC - -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_SOURCE -#undef CONFIG_CMD_XIMG - -#define CONFIG_ATMEL_USART -#define CONFIG_MACB -#define CONFIG_PORTMUX_PIO -#define CONFIG_SYS_NR_PIOS 5 -#define CONFIG_SYS_HSDRAMC -#define CONFIG_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_GENERIC_MMC - -#define CONFIG_SYS_DCACHE_LINESZ 32 -#define CONFIG_SYS_ICACHE_LINESZ 32 - -#define CONFIG_NR_DRAM_BANKS 1 - -/* External flash on Favr-32 */ -#if 0 -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 -#endif - -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x800000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 135 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_TEXT_BASE 0x00000000 - -#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE -#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE -#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SIZE 65536 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) - -#define CONFIG_SYS_MALLOC_LEN (256*1024) - -/* Allow 4MB for the kernel run-time image */ -#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) -#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) - -/* Other configuration settings that shouldn't have to change all that often */ -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP - -#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000) -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } - -#endif /* __CONFIG_H */ diff --git a/include/configs/flea3.h b/include/configs/flea3.h index 846b86889b..5d66901f8b 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -72,9 +72,6 @@ /* * Command definition */ - -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_BOOTP_SUBNETMASK diff --git a/include/configs/galileo.h b/include/configs/galileo.h index f780b8fa51..fd89bf30ef 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -15,8 +15,7 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_BOARD_EARLY_INIT_F - -#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_ARCH_MISC_INIT #define CONFIG_X86_SERIAL diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h index 12fd75d743..bfaba42643 100644 --- a/include/configs/gdppc440etx.h +++ b/include/configs/gdppc440etx.h @@ -35,8 +35,6 @@ #define CONFIG_SYS_GENERIC_BOARD #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ -#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ -#define CONFIG_AUTOBOOT_STOP_STR " " /* * Base addresses -- Note these are effective addresses where the diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index 836515d178..967a05a2cb 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -53,7 +53,6 @@ #define CONFIG_CONSOLE_MUX #define CONFIG_SYS_CONSOLE_IS_IN_ENV -#include <config_cmd_default.h> #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_MII diff --git a/include/configs/gose.h b/include/configs/gose.h index 04f0383cbe..f088649afd 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -44,7 +44,6 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_SPI #define CONFIG_SH_QSPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_BAR #define CONFIG_SPI_FLASH_SPANSION diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h index 0ac198df8d..0de6ae8088 100644 --- a/include/configs/gplugd.h +++ b/include/configs/gplugd.h @@ -57,9 +57,7 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_I2C -#undef CONFIG_CMD_FPGA #define CONFIG_CMD_USB #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT @@ -122,8 +120,6 @@ #define CONFIG_ENV_OFFSET 0x07C000 #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_EDITENV -#define CONFIG_CMD_SAVEENV #ifdef CONFIG_CMD_USB #define CONFIG_USB_EHCI diff --git a/include/configs/gr_cpci_ax2000.h b/include/configs/gr_cpci_ax2000.h index 5d28d8bf08..782746e4e0 100644 --- a/include/configs/gr_cpci_ax2000.h +++ b/include/configs/gr_cpci_ax2000.h @@ -59,8 +59,6 @@ /* * Supported commands */ -#include <config_cmd_default.h> - #define CONFIG_CMD_REGINFO #define CONFIG_CMD_AMBAPP #define CONFIG_CMD_PING diff --git a/include/configs/gr_ep2s60.h b/include/configs/gr_ep2s60.h index dd8653a879..5c466f2929 100644 --- a/include/configs/gr_ep2s60.h +++ b/include/configs/gr_ep2s60.h @@ -53,8 +53,6 @@ /* * Supported commands */ -#include <config_cmd_default.h> - #define CONFIG_CMD_REGINFO #define CONFIG_CMD_AMBAPP #define CONFIG_CMD_PING diff --git a/include/configs/gr_xc3s_1500.h b/include/configs/gr_xc3s_1500.h index fdd0aa5455..e01578cbb2 100644 --- a/include/configs/gr_xc3s_1500.h +++ b/include/configs/gr_xc3s_1500.h @@ -40,8 +40,6 @@ /* * Supported commands */ -#include <config_cmd_default.h> - #define CONFIG_CMD_REGINFO #define CONFIG_CMD_AMBAPP #define CONFIG_CMD_PING diff --git a/include/configs/grasshopper.h b/include/configs/grasshopper.h index 54eb9777d7..231f25a38b 100644 --- a/include/configs/grasshopper.h +++ b/include/configs/grasshopper.h @@ -62,7 +62,6 @@ #define CONFIG_USART_BASE ATMEL_BASE_USART1 #define CONFIG_USART_ID 1 -#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R @@ -75,17 +74,7 @@ #define CONFIG_BAUDRATE 115200 -/* - * Only interrupt autoboot if <space> is pressed. Otherwise, garbage - * data on the serial line may interrupt the boot sequence. - */ #define CONFIG_BOOTDELAY 1 -#define CONFIG_AUTOBOOT -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d" \ - " seconds\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "d" -#define CONFIG_AUTOBOOT_STOP_STR " " /* * After booting the board for the first time, new ethernet addresses @@ -103,12 +92,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - -/* remove unneeded commands */ -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR - /* add useful commands */ #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP diff --git a/include/configs/grsim.h b/include/configs/grsim.h index 6c52a17ee4..f54919eaae 100644 --- a/include/configs/grsim.h +++ b/include/configs/grsim.h @@ -48,22 +48,10 @@ * Supported commands */ #define CONFIG_CMD_AMBAPP /* AMBA Plyg&Play information */ -#define CONFIG_CMD_BDI /* bdinfo */ -#define CONFIG_CMD_CONSOLE /* coninfo */ #define CONFIG_CMD_DIAG -#define CONFIG_CMD_ECHO /* echo arguments */ -#define CONFIG_CMD_FPGA /* FPGA configuration Support */ #define CONFIG_CMD_FPGA_LOADMK #define CONFIG_CMD_IRQ -#define CONFIG_CMD_ITEST /* Integer (and string) test */ -#define CONFIG_CMD_LOADB /* loadb */ -#define CONFIG_CMD_LOADS /* loads */ -#define CONFIG_CMD_MISC /* Misc functions like sleep etc */ #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_RUN /* run command in env variable */ -#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ -#define CONFIG_CMD_SOURCE /* "source" command support */ -#define CONFIG_CMD_XIMG /* Load part of Multi Image */ /* * Autobooting diff --git a/include/configs/grsim_leon2.h b/include/configs/grsim_leon2.h index f050754a75..bd2eaa9fda 100644 --- a/include/configs/grsim_leon2.h +++ b/include/configs/grsim_leon2.h @@ -46,22 +46,10 @@ /* * Supported commands */ -#define CONFIG_CMD_BDI /* bdinfo */ -#define CONFIG_CMD_CONSOLE /* coninfo */ #define CONFIG_CMD_DIAG -#define CONFIG_CMD_ECHO /* echo arguments */ -#define CONFIG_CMD_FPGA /* FPGA configuration Support */ #define CONFIG_CMD_FPGA_LOADMK #define CONFIG_CMD_IRQ -#define CONFIG_CMD_ITEST /* Integer (and string) test */ -#define CONFIG_CMD_LOADB /* loadb */ -#define CONFIG_CMD_LOADS /* loads */ -#define CONFIG_CMD_MISC /* Misc functions like sleep etc */ #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_RUN /* run command in env variable */ -#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ -#define CONFIG_CMD_SOURCE /* "source" command support */ -#define CONFIG_CMD_XIMG /* Load part of Multi Image */ /* * Autobooting diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h index 8e53af8c04..5f095677f1 100644 --- a/include/configs/guruplug.h +++ b/include/configs/guruplug.h @@ -46,7 +46,6 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 6b8c82d2b8..902ec2c536 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -48,11 +48,8 @@ /* Driver Model */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_DM #define CONFIG_DM_GPIO -#define CONFIG_DM_SERIAL #define CONFIG_DM_THERMAL -#define CONFIG_CMD_DM #endif /* GPIO */ diff --git a/include/configs/h2200.h b/include/configs/h2200.h index c00b951ac4..1d2d09ad54 100644 --- a/include/configs/h2200.h +++ b/include/configs/h2200.h @@ -116,11 +116,6 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200 } -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_SOURCE -#define CONFIG_CMD_RUN -#define CONFIG_CMD_IMI - #define CONFIG_FIT #define CONFIG_FIT_DISABLE_SHA256 #define CONFIG_SETUP_MEMORY_TAGS diff --git a/include/configs/hammerhead.h b/include/configs/hammerhead.h deleted file mode 100644 index 0bc42f12e0..0000000000 --- a/include/configs/hammerhead.h +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Copyright (C) 2008 Miromico AG - * - * Configuration settings for the Miromico Hammerhead AVR32 board - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_AT32AP -#define CONFIG_AT32AP7000 -#define CONFIG_HAMMERHEAD - -/* - * Set up the PLL to run at 125 MHz, the CPU to run at the PLL - * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency - * and the PBA bus to run at 1/4 the PLL frequency. - */ -#define CONFIG_PLL -#define CONFIG_SYS_POWER_MANAGER -#define CONFIG_SYS_OSC0_HZ 25000000 -#define CONFIG_SYS_PLL0_DIV 1 -#define CONFIG_SYS_PLL0_MUL 5 -#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 -#define CONFIG_SYS_CLKDIV_CPU 0 -#define CONFIG_SYS_CLKDIV_HSB 1 -#define CONFIG_SYS_CLKDIV_PBA 2 -#define CONFIG_SYS_CLKDIV_PBB 1 - -/* Reserve VM regions for SDRAM and NOR flash */ -#define CONFIG_SYS_NR_VM_REGIONS 2 - -/* - * The PLLOPT register controls the PLL like this: - * icp = PLLOPT<2> - * ivco = PLLOPT<1:0> - * - * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). - */ -#define CONFIG_SYS_PLL0_OPT 0x04 - -#define CONFIG_USART_BASE ATMEL_BASE_USART1 -#define CONFIG_USART_ID 1 - -#define CONFIG_HOSTNAME hammerhead - -/* User serviceable stuff */ -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_STACKSIZE (2048) - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "console=ttyS0 root=mtd1 rootfstype=jffs2" -#define CONFIG_BOOTCOMMAND \ - "fsload; bootm" - -/* - * Only interrupt autoboot if <space> is pressed. Otherwise, garbage - * data on the serial line may interrupt the boot sequence. - */ -#define CONFIG_BOOTDELAY 1 -#define CONFIG_AUTOBOOT -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "d" -#define CONFIG_AUTOBOOT_STOP_STR " " - -/* - * After booting the board for the first time, new ethernet address - * should be generated and assigned to the environment variables - * "ethaddr". This is normally done during production. - */ -#define CONFIG_OVERWRITE_ETHADDR_ONCE - -/* - * BOOTP/DHCP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MMC -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR - -#define CONFIG_ATMEL_USART -#define CONFIG_MACB -#define CONFIG_PORTMUX_PIO -#define CONFIG_SYS_NR_PIOS 5 -#define CONFIG_SYS_HSDRAMC -#define CONFIG_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_GENERIC_MMC - -#define CONFIG_SYS_DCACHE_LINESZ 32 -#define CONFIG_SYS_ICACHE_LINESZ 32 - -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x800000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 135 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_TEXT_BASE 0x00000000 - -#define CONFIG_SYS_INTRAM_BASE 0x24000000 -#define CONFIG_SYS_INTRAM_SIZE 0x8000 - -#define CONFIG_SYS_SDRAM_BASE 0x10000000 - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SIZE 65536 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) - -#define CONFIG_SYS_MALLOC_LEN (256*1024) - - -/* Allow 4MB for the kernel run-time image */ -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00400000) -#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) - -/* Other configuration settings that shouldn't have to change all that often */ -#define CONFIG_SYS_PROMPT "Hammerhead> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP - -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000) - -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } - -#endif /* __CONFIG_H */ diff --git a/include/configs/highbank.h b/include/configs/highbank.h index da1c837cc7..86823e235c 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -54,18 +54,11 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_BDI -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_LOADS #define CONFIG_CMD_SCSI #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_RESET_TO_RETRY -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds...\nPress <s> to stop or <d> to delay\n", bootdelay -#define CONFIG_AUTOBOOT_KEYED_CTRLC + /* * Miscellaneous configurable options */ diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index 2916987cf2..08e2f42da6 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -471,8 +471,6 @@ int fpga_gpio_get(unsigned int bus, int pin); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_I2C #define CONFIG_CMD_MII #define CONFIG_CMD_PCI @@ -490,8 +488,6 @@ int fpga_gpio_get(unsigned int bus, int pin); #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ -#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ -#define CONFIG_AUTOBOOT_STOP_STR " " #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index f1ddf21580..ee524527aa 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -45,7 +45,6 @@ */ #define CONFIG_SYS_NO_FLASH /* declare no flash (NOR/SPI) */ #define CONFIG_SYS_MVFS -#include <config_cmd_default.h> #define CONFIG_CMD_ENV #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_IDE diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index 2baf50cc4e..1a5c93d11b 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -40,7 +40,6 @@ */ #define CONFIG_SYS_NO_FLASH /* declare no flash (NOR/SPI) */ #define CONFIG_SYS_MVFS -#include <config_cmd_default.h> #define CONFIG_CMD_ENV #define CONFIG_CMD_MII #define CONFIG_CMD_NAND diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 8b4278dfd3..e60e753e40 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -25,10 +25,6 @@ #define CONFIG_MISC_INIT_R -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "\nEnter password - autoboot in %d seconds...\n", CONFIG_BOOTDELAY -#define CONFIG_AUTOBOOT_DELAY_STR "ids" #define CONFIG_BOOT_RETRY_TIME 900 #define CONFIG_BOOT_RETRY_MIN 30 #define CONFIG_BOOTDELAY 1 @@ -422,18 +418,13 @@ /* * U-Boot environment setup */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING -#define CONFIG_CMD_NFS #define CONFIG_CMD_NAND -#define CONFIG_CMD_FLASH #define CONFIG_CMD_SNTP #define CONFIG_CMD_MII #define CONFIG_CMD_DATE #define CONFIG_CMDLINE_EDITING -#define CONFIG_CMD_EDITENV #define CONFIG_CMD_JFFS2 #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_BOOTP_GATEWAY diff --git a/include/configs/ima3-mx53.h b/include/configs/ima3-mx53.h index 71ca77a513..5a0291753d 100644 --- a/include/configs/ima3-mx53.h +++ b/include/configs/ima3-mx53.h @@ -63,7 +63,6 @@ #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 /* SPI FLASH - not used for environment */ -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 25000000 @@ -74,7 +73,6 @@ #define CONFIG_BAUDRATE 115200 /* Command definition */ -#include <config_cmd_default.h> #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 386dbd8895..526659c978 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -171,7 +171,6 @@ /* * U-Boot commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_ASKENV #define CONFIG_CMD_CACHE #define CONFIG_CMD_DHCP diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index 0f22032545..c552e9f76e 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -73,9 +73,6 @@ /*********************************************************** * Command definition ***********************************************************/ - -#include <config_cmd_default.h> - #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_SPI diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index db197f340c..54e8121008 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -52,9 +52,6 @@ /*********************************************************** * Command definition ***********************************************************/ - -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h index 92587349d1..c7bf531f6a 100644 --- a/include/configs/inka4x0.h +++ b/include/configs/inka4x0.h @@ -80,14 +80,11 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_CMD_IDE -#define CONFIG_CMD_NFS #define CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_SNTP diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h index 12c7382c17..1d307ca1e6 100644 --- a/include/configs/integrator-common.h +++ b/include/configs/integrator-common.h @@ -94,7 +94,6 @@ * - SIB block * - U-Boot environment */ -#define CONFIG_CMD_FLASH #define CONFIG_CMD_ARMFLASH #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index 12eb172a14..c76ebcbb60 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -43,8 +43,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_BOOTDELAY 2 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyAM0 console=tty" #define CONFIG_BOOTCOMMAND "" diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 7518b60fb2..d6f2602875 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -40,8 +40,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_BOOTDELAY 2 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" #define CONFIG_BOOTCOMMAND "tftpboot ; bootm" diff --git a/include/configs/intip.h b/include/configs/intip.h index 928eb5b9db..18d314006f 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -51,8 +51,6 @@ #define CFG_ALT_MEMTEST #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ -#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ -#define CONFIG_AUTOBOOT_STOP_STR " " /* * Base addresses -- Note these are effective addresses where the diff --git a/include/configs/io.h b/include/configs/io.h index d4ae0adfda..f5b09b6162 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -35,8 +35,6 @@ #define PLLMR1_DEFAULT PLLMR1_266_133_66 #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ -#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ -#define CONFIG_AUTOBOOT_STOP_STR " " /* new uImage format support */ #define CONFIG_FIT @@ -73,7 +71,6 @@ #undef CONFIG_CMD_ELF #undef CONFIG_CMD_I2C #undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_NFS /* * SDRAM configuration (please see cpu/ppc/sdram.[ch]) diff --git a/include/configs/io64.h b/include/configs/io64.h index 2a9ff376ef..94ccb6bab7 100644 --- a/include/configs/io64.h +++ b/include/configs/io64.h @@ -46,8 +46,6 @@ #define CONFIG_SYS_GENERIC_BOARD #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ -#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ -#define CONFIG_AUTOBOOT_STOP_STR " " /* new uImage format support */ #define CONFIG_FIT diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 38d473de42..f7ae6631cc 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -34,8 +34,6 @@ #define PLLMR1_DEFAULT PLLMR1_266_133_66 #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ -#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ -#define CONFIG_AUTOBOOT_STOP_STR " " /* new uImage format support */ #define CONFIG_FIT @@ -69,7 +67,6 @@ #undef CONFIG_CMD_ELF #undef CONFIG_CMD_I2C #undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_NFS /* * SDRAM configuration (please see cpu/ppc/sdram.[ch]) diff --git a/include/configs/ip04.h b/include/configs/ip04.h index 73bbcb6b69..dd2a618a88 100644 --- a/include/configs/ip04.h +++ b/include/configs/ip04.h @@ -91,7 +91,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_WINBOND @@ -136,7 +135,6 @@ /* Enable this if bootretry required; currently it's disabled */ #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_BOOTCOMMAND "run nandboot" -#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n" /* diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index 16bc373dd3..e68b6617c5 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -255,7 +255,6 @@ /* * U-Boot commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_ENV #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP @@ -263,7 +262,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#define CONFIG_CMD_MEMORY #ifdef CONFIG_CMD_BDI #define CONFIG_CLOCKS diff --git a/include/configs/ipek01.h b/include/configs/ipek01.h index 41ced15c48..230f2c4d30 100644 --- a/include/configs/ipek01.h +++ b/include/configs/ipek01.h @@ -101,8 +101,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #ifdef CONFIG_VIDEO #define CONFIG_CMD_BMP /* BMP support */ #endif diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 606e6b4c55..3bbff282df 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -43,7 +43,6 @@ /* SPI */ #define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ #define CONFIG_TEGRA114_SPI_CTRLS 6 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 24000000 diff --git a/include/configs/jornada.h b/include/configs/jornada.h index dd30ba2c93..71f2ee18a3 100644 --- a/include/configs/jornada.h +++ b/include/configs/jornada.h @@ -43,14 +43,7 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#define CONFIG_CMD_FLASH #define CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_MISC -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_XIMG #define CONFIG_BOOTDELAY 5 #define CONFIG_BOOTARGS "root=/dev/hda1 console=ttySA0,19200n8 console=tty1" diff --git a/include/configs/jupiter.h b/include/configs/jupiter.h index 7dfaa221ee..65b3df601d 100644 --- a/include/configs/jupiter.h +++ b/include/configs/jupiter.h @@ -85,9 +85,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP #if defined(CONFIG_PCI) diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 56499018ad..f3248bc1d5 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -13,13 +13,10 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_DEFAULTENV_VARS #define CONFIG_CMD_GREPENV -#define CONFIG_CMD_ECHO #define CONFIG_CMD_IMMAP #define CONFIG_CMD_MII #define CONFIG_CMD_PING diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index 2ed0855fdd..15fca1abe6 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -124,14 +124,11 @@ */ #define CONFIG_CMD_ELF #define CONFIG_CMD_MTDPARTS -#define CONFIG_CMD_NFS /* * Without NOR FLASH we need this */ #define CONFIG_SYS_NO_FLASH -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS /* * NAND Flash configuration @@ -253,7 +250,6 @@ int get_scl(void); #define CONFIG_SYS_REDUNDAND_ENVIRONMENT -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO /* SPI bus claim MPP configuration */ diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 686d2f3285..a8cf3f7341 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -299,7 +299,6 @@ int get_scl(void); * eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_BAR /* 4 byte-addressing */ #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_SPANSION @@ -410,8 +409,6 @@ int get_scl(void); /* we don't need flash support */ #define CONFIG_SYS_NO_FLASH -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_FLASH #undef CONFIG_FLASH_CFI_MTD #undef CONFIG_JFFS2_CMDLINE diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 61c015f3ca..ff948f963c 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -44,7 +44,6 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_SPI #define CONFIG_SH_QSPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_BAR #define CONFIG_SPI_FLASH_SPANSION diff --git a/include/configs/ks2_evm.h b/include/configs/ks2_evm.h index 036f2cb85a..e05d56cd82 100644 --- a/include/configs/ks2_evm.h +++ b/include/configs/ks2_evm.h @@ -72,7 +72,6 @@ /* SPI Configuration */ #define CONFIG_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_DAVINCI_SPI #define CONFIG_CMD_SPI @@ -209,7 +208,6 @@ #define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE /* U-Boot command configuration */ -#include <config_cmd_default.h> #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index 7111b08387..93c2976b21 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -24,7 +24,6 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_OF_LIBFDT -#include <config_cmd_default.h> #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index 9ac5d3319e..30810d3752 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -53,7 +53,6 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_ENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING diff --git a/include/configs/lager.h b/include/configs/lager.h index f121b9c9aa..546863ea48 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -44,7 +44,6 @@ #define CONFIG_SPI #define CONFIG_SPI_FLASH_BAR #define CONFIG_SH_QSPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/lp8x4x.h b/include/configs/lp8x4x.h index e3dd5e022c..e9ee3fb638 100644 --- a/include/configs/lp8x4x.h +++ b/include/configs/lp8x4x.h @@ -44,10 +44,7 @@ /* * Bootloader Components Configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ENV -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_MMC #define CONFIG_CMD_USB #undef CONFIG_LCD diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index ca913b0671..46c609af89 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include <config_cmd_default.h> - #define CONFIG_LS102XA #define CONFIG_SYS_GENERIC_BOARD @@ -409,16 +407,24 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION -/* QSPI */ +/* SPI */ #ifdef CONFIG_QSPI_BOOT +/* QSPI */ #define CONFIG_FSL_QSPI #define QSPI0_AMBA_BASE 0x40000000 #define FSL_QSPI_FLASH_SIZE (1 << 24) #define FSL_QSPI_FLASH_NUM 2 +#define CONFIG_SPI_FLASH_SPANSION + +/* DSPI */ +#define CONFIG_FSL_DSPI +/* DM SPI */ +#if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI) #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_DM_SPI_FLASH +#define CONFIG_SF_DATAFLASH +#endif #endif /* @@ -539,12 +545,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMDLINE_TAG #define CONFIG_CMDLINE_EDITING -#ifdef CONFIG_QSPI_BOOT -#undef CONFIG_CMD_IMLS -#else -#define CONFIG_CMD_IMLS -#endif - #define CONFIG_ARMV7_NONSEC #define CONFIG_ARMV7_VIRT #define CONFIG_PEN_ADDR_BIG_ENDIAN @@ -587,7 +587,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_CMD_ENV_EXISTS #define CONFIG_CMD_GREPENV #define CONFIG_CMD_MEMINFO #define CONFIG_CMD_MEMTEST diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 6b6f2ba676..233b3d092c 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include <config_cmd_default.h> - #define CONFIG_LS102XA #define CONFIG_SYS_GENERIC_BOARD @@ -252,16 +250,20 @@ #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION -/* QSPI */ +/* SPI */ #ifdef CONFIG_QSPI_BOOT +/* QSPI */ #define CONFIG_FSL_QSPI #define QSPI0_AMBA_BASE 0x40000000 #define FSL_QSPI_FLASH_SIZE (1 << 24) #define FSL_QSPI_FLASH_NUM 2 +#define CONFIG_SPI_FLASH_STMICRO +/* DM SPI */ +#if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI) #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_DM_SPI_FLASH +#endif #endif /* @@ -356,12 +358,6 @@ #define CONFIG_CMDLINE_TAG #define CONFIG_CMDLINE_EDITING -#ifdef CONFIG_QSPI_BOOT -#undef CONFIG_CMD_IMLS -#else -#define CONFIG_CMD_IMLS -#endif - #define CONFIG_ARMV7_NONSEC #define CONFIG_ARMV7_VIRT #define CONFIG_PEN_ADDR_BIG_ENDIAN @@ -400,7 +396,6 @@ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_CMD_ENV_EXISTS #define CONFIG_CMD_GREPENV #define CONFIG_CMD_MEMINFO #define CONFIG_CMD_MEMTEST diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 547026ee3f..72ba3b394e 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -205,20 +205,10 @@ unsigned long long get_qixis_addr(void); /* Command line configuration */ #define CONFIG_CMD_CACHE -#define CONFIG_CMD_BDI #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_IMI -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_MII #define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_RUN -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_SOURCE /* Miscellaneous configurable options */ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) diff --git a/include/configs/ls2085aqds.h b/include/configs/ls2085aqds.h index cd2b080335..e488ac8ebf 100644 --- a/include/configs/ls2085aqds.h +++ b/include/configs/ls2085aqds.h @@ -8,7 +8,6 @@ #define __LS2_QDS_H #include "ls2085a_common.h" -#include <config_cmd_default.h> #define CONFIG_IDENT_STRING " LS2085A-QDS" #define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-QDS" diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h index 0837fcd306..600261e42b 100644 --- a/include/configs/ls2085ardb.h +++ b/include/configs/ls2085ardb.h @@ -8,8 +8,6 @@ #define __LS2_RDB_H #include "ls2085a_common.h" -#include <config_cmd_default.h> - #define CONFIG_IDENT_STRING " LS2085A-RDB" #define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-RDB" diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 7d22173943..ddbf5cec67 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -53,7 +53,6 @@ /* * Commands configuration */ -#include <config_cmd_default.h> #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 799850a5a1..513167e2ef 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -428,8 +428,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -440,7 +438,6 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_SDRAM diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index eba1b2f7b4..29c60b75a5 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -18,7 +18,6 @@ /* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH -#include <config_cmd_default.h> #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DOS_PARTITION #define CONFIG_FAT_WRITE @@ -40,7 +39,6 @@ #define CONFIG_CMD_MMC #define CONFIG_CMD_NAND #define CONFIG_CMD_NAND_TRIMFFS -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_SF #define CONFIG_CMD_SPI @@ -127,7 +125,6 @@ /* SPI FLASH */ #ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SF_DEFAULT_BUS 2 #define CONFIG_SF_DEFAULT_CS 0 diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h index 2d2b2263ac..35058e222a 100644 --- a/include/configs/m53evk.h +++ b/include/configs/m53evk.h @@ -26,7 +26,6 @@ /* * U-Boot Commands */ -#include <config_cmd_default.h> #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_DOS_PARTITION #define CONFIG_FAT_WRITE diff --git a/include/configs/malta.h b/include/configs/malta.h index 9445c9b1d7..ab2335fab8 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -119,13 +119,6 @@ /* * Commands */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_NFS - #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF diff --git a/include/configs/manroland/common.h b/include/configs/manroland/common.h index ab4a4710c7..941290c776 100644 --- a/include/configs/manroland/common.h +++ b/include/configs/manroland/common.h @@ -21,8 +21,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DATE #define CONFIG_CMD_DISPLAY #define CONFIG_CMD_DHCP @@ -32,7 +30,6 @@ #define CONFIG_CMD_DTT #define CONFIG_CMD_IDE #define CONFIG_CMD_FAT -#define CONFIG_CMD_NFS #define CONFIG_CMD_MII #define CONFIG_CMD_SNTP diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index d8811a47cd..0839d39a39 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -22,7 +22,6 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_I2C diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 3405c83bf0..0a7b7cf36e 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -113,8 +113,6 @@ #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ @@ -137,11 +135,6 @@ #define CONFIG_CMD_MTDPARTS #define CONFIG_CMD_GPIO -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ - #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 @@ -153,7 +146,6 @@ #define CONFIG_SYS_I2C_RTC_ADDR 0x68 #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS /* * Board NAND Info. */ diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h index 0b9cbae5ba..a8b4b24470 100644 --- a/include/configs/mecp5123.h +++ b/include/configs/mecp5123.h @@ -296,13 +296,10 @@ #define CONFIG_LOADS_ECHO /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_EEPROM diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 955d0e278a..e5bb87302c 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -86,12 +86,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_IMLS - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_NAND diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index db463c0b2e..e16965c56c 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -176,7 +176,6 @@ # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR # define CONFIG_XILINX_SPI 1 # define CONFIG_SPI 1 -# define CONFIG_SPI_FLASH 1 # define CONFIG_SPI_FLASH_STMICRO 1 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ @@ -245,12 +244,9 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_IRQ #define CONFIG_CMD_MFSL -#define CONFIG_CMD_ECHO #define CONFIG_CMD_GPIO #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) @@ -259,9 +255,7 @@ # undef CONFIG_CMD_CACHE #endif -#ifndef CONFIG_SYS_ENET -# undef CONFIG_CMD_NFS -#else +#ifdef CONFIG_SYS_ENET # define CONFIG_CMD_PING # define CONFIG_CMD_DHCP # define CONFIG_CMD_TFTPPUT @@ -273,15 +267,11 @@ #endif #if defined(FLASH) -# define CONFIG_CMD_ECHO -# define CONFIG_CMD_FLASH -# define CONFIG_CMD_IMLS # define CONFIG_CMD_JFFS2 # define CONFIG_CMD_UBI # undef CONFIG_CMD_UBIFS # if !defined(RAMENV) -# define CONFIG_CMD_SAVEENV # define CONFIG_CMD_SAVES # endif @@ -290,12 +280,9 @@ # define CONFIG_CMD_SF # if !defined(RAMENV) -# define CONFIG_CMD_SAVEENV # define CONFIG_CMD_SAVES # endif #else -# undef CONFIG_CMD_IMLS -# undef CONFIG_CMD_FLASH # undef CONFIG_CMD_JFFS2 # undef CONFIG_CMD_UBI # undef CONFIG_CMD_UBIFS diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h deleted file mode 100644 index e8e5ae73ec..0000000000 --- a/include/configs/mimc200.h +++ /dev/null @@ -1,176 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * Configuration settings for the AVR32 Network Gateway - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <asm/arch/hardware.h> - -#define CONFIG_AT32AP -#define CONFIG_AT32AP7000 -#define CONFIG_MIMC200 - -#define CONFIG_MIMC200_EXT_FLASH - -/* - * Set up the PLL to run at 140 MHz, the CPU to run at the PLL - * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency - * and the PBA bus to run at 1/4 the PLL frequency. - */ -#define CONFIG_PLL -#define CONFIG_SYS_POWER_MANAGER -#define CONFIG_SYS_OSC0_HZ 10000000 -#define CONFIG_SYS_PLL0_DIV 1 -#define CONFIG_SYS_PLL0_MUL 15 -#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 -#define CONFIG_SYS_CLKDIV_CPU 0 -#define CONFIG_SYS_CLKDIV_HSB 1 -#define CONFIG_SYS_CLKDIV_PBA 2 -#define CONFIG_SYS_CLKDIV_PBB 1 - -/* Reserve VM regions for SDRAM, NOR flash and FRAM */ -#define CONFIG_SYS_NR_VM_REGIONS 3 - -/* - * The PLLOPT register controls the PLL like this: - * icp = PLLOPT<2> - * ivco = PLLOPT<1:0> - * - * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). - */ -#define CONFIG_SYS_PLL0_OPT 0x04 - -#define CONFIG_USART_BASE ATMEL_BASE_USART1 -#define CONFIG_USART_ID 1 - -#define CONFIG_MIMC200_DBGLINK 1 - -/* User serviceable stuff */ -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_STACKSIZE (2048) - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "root=/dev/mtdblock1 rootfstype=jffs2 fbmem=512k console=ttyS1" -#define CONFIG_BOOTCOMMAND \ - "fsload boot/uImage; bootm" - -#define CONFIG_SILENT_CONSOLE /* enable silent startup */ -#define CONFIG_DISABLE_CONSOLE /* disable console */ -#define CONFIG_SYS_DEVICE_NULLDEV /* include nulldev device */ - -#define CONFIG_LCD 1 - -/* - * Only interrupt autoboot if <space> is pressed. Otherwise, garbage - * data on the serial line may interrupt the boot sequence. - */ -#define CONFIG_BOOTDELAY 0 -#define CONFIG_ZERO_BOOTDELAY_CHECK -#define CONFIG_AUTOBOOT - -/* - * After booting the board for the first time, new ethernet addresses - * should be generated and assigned to the environment variables - * "ethaddr" and "eth1addr". This is normally done during production. - */ -#define CONFIG_OVERWRITE_ETHADDR_ONCE - -/* - * BOOTP/DHCP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MMC - -#define CONFIG_ATMEL_USART -#define CONFIG_MACB -#define CONFIG_PORTMUX_PIO -#define CONFIG_SYS_NR_PIOS 5 -#define CONFIG_SYS_HSDRAMC -#define CONFIG_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_GENERIC_MMC - -#if defined(CONFIG_LCD) -#define CONFIG_CMD_BMP -#define CONFIG_ATMEL_LCD 1 -#define LCD_BPP LCD_COLOR16 -#define CONFIG_BMP_16BPP 1 -#define CONFIG_FB_ADDR 0x10600000 -#define CONFIG_WHITE_ON_BLACK 1 -#define CONFIG_VIDEO_BMP_GZIP 1 -#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144 -#define CONFIG_ATMEL_LCD_BGR555 1 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 -#define CONFIG_SPLASH_SCREEN 1 -#endif - -#define CONFIG_SYS_DCACHE_LINESZ 32 -#define CONFIG_SYS_ICACHE_LINESZ 32 - -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x800000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 135 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_TEXT_BASE 0x00000000 - -#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE -#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE -#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE - -#define CONFIG_SYS_FRAM_BASE 0x08000000 -#define CONFIG_SYS_FRAM_SIZE 0x20000 - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SIZE 65536 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) - -#define CONFIG_SYS_MALLOC_LEN (1024*1024) - -/* Allow 4MB for the kernel run-time image */ -#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) -#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) - -/* Other configuration settings that shouldn't have to change all that often */ -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP - -#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000) - -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } - -#endif /* __CONFIG_H */ diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 2a1915d872..547765d137 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -15,8 +15,7 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_BOARD_EARLY_INIT_F - -#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_X86_SERIAL #define CONFIG_SMSC_LPC47M @@ -56,9 +55,6 @@ #define CONFIG_X86_OPTION_ROM_FILE vga.bin #define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000 -#ifndef CONFIG_SYS_COREBOOT -#define CONFIG_VIDEO_VESA -#endif #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO #define CONFIG_VGA_AS_SINGLE_DEVICE diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h index 96a6b89232..6dc84eb359 100644 --- a/include/configs/motionpro.h +++ b/include/configs/motionpro.h @@ -33,8 +33,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_DATE @@ -72,13 +70,7 @@ * Autobooting */ #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_STOP_STR "\x1b\x1b" -#define DEBUG_BOOTKEYS 0 -#undef CONFIG_AUTOBOOT_DELAY_STR #undef CONFIG_BOOTARGS -#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \ - "press \"<Esc><Esc>\" to stop\n", bootdelay #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */ diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index 41ae0a53f8..782b29dc97 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -415,8 +415,6 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -426,7 +424,6 @@ #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index 195bc18996..1b09e7076e 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -398,8 +398,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C #define CONFIG_CMD_MII diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h index 8ae497c6d5..3ac4b0b780 100644 --- a/include/configs/mpr2.h +++ b/include/configs/mpr2.h @@ -11,10 +11,7 @@ #define __MPR2_H /* Supported commands */ -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_CACHE -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_FLASH /* Default environment variables */ #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index 585d68f208..3e9996641a 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -12,10 +12,7 @@ #define CONFIG_CPU_SH7720 1 #define CONFIG_MS7720SE 1 -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_CACHE #define CONFIG_CMD_PCMCIA #define CONFIG_CMD_IDE diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index fb5fcc6e7e..12bb3a0438 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -12,13 +12,9 @@ #define CONFIG_CPU_SH7722 1 #define CONFIG_MS7722SE 1 -#define CONFIG_CMD_FLASH #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_SAVEENV #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 3 diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 4cf8efeca0..bbd2d6bfed 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -18,11 +18,6 @@ /* * Command line configuration. */ -/*#include <config_cmd_default.h>*/ - -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_SAVEENV - #define CONFIG_SCIF_CONSOLE 1 #define CONFIG_BAUDRATE 38400 #define CONFIG_CONS_SCIF1 1 diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h index 01e395a49d..dd516acff5 100644 --- a/include/configs/mt_ventoux.h +++ b/include/configs/mt_ventoux.h @@ -48,7 +48,6 @@ /* * FPGA */ -#define CONFIG_CMD_FPGA #define CONFIG_CMD_FPGA_LOADMK #define CONFIG_FPGA #define CONFIG_FPGA_XILINX diff --git a/include/configs/munices.h b/include/configs/munices.h index 535bf2a2f6..42ac0290d8 100644 --- a/include/configs/munices.h +++ b/include/configs/munices.h @@ -26,8 +26,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_ELF #define CONFIG_CMD_IMMAP diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 51436da64e..b654fffb26 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -59,6 +59,8 @@ #define CONFIG_BOOTDELAY 3 /* default enable autoboot */ #define CONFIG_PREBOOT +#define CONFIG_OF_LIBFDT /* Device tree support */ + /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is @@ -121,7 +123,6 @@ * Common SPI Flash configuration */ #ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH 1 #define CONFIG_SPI_FLASH_MACRONIX 1 #endif diff --git a/include/configs/mv88f6281gtw_ge.h b/include/configs/mv88f6281gtw_ge.h index 311fc0c3c5..45a4a7541c 100644 --- a/include/configs/mv88f6281gtw_ge.h +++ b/include/configs/mv88f6281gtw_ge.h @@ -26,7 +26,6 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING #define CONFIG_CMD_ENV diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index 65203a0a21..529f73b852 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -12,7 +12,6 @@ /* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH -#include <config_cmd_default.h> #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DOS_PARTITION diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index 273b7d3a33..b649c7d152 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -15,9 +15,6 @@ /* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH -#include <config_cmd_default.h> -#undef CONFIG_CMD_NFS - #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DOS_PARTITION diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index 5f61eb157b..bd7216e47b 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -82,7 +82,6 @@ #define CONFIG_SYS_LONGHELP /* U-Boot commands */ -#include <config_cmd_default.h> #define CONFIG_OF_LIBFDT #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_CACHE diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index bc0ae28557..588490f3cd 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -17,7 +17,6 @@ /* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH -#include <config_cmd_default.h> #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DOS_PARTITION @@ -28,9 +27,7 @@ #define CONFIG_CMD_GPIO #define CONFIG_CMD_MII #define CONFIG_CMD_MMC -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_SF #define CONFIG_CMD_SPI #define CONFIG_CMD_USB @@ -130,7 +127,6 @@ /* SPI Flash */ #ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SF_DEFAULT_BUS 2 #define CONFIG_SF_DEFAULT_CS 0 /* this may vary and depends on the installed chip */ diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index bed071fa66..c4513d2df7 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -74,9 +74,6 @@ /*********************************************************** * Command definition ***********************************************************/ - -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_SPI diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 1282a6e77e..7e709cd936 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -80,9 +80,6 @@ /*********************************************************** * Command definition ***********************************************************/ - -#include <config_cmd_default.h> - #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP @@ -91,12 +88,6 @@ #define CONFIG_CMD_NAND #define CONFIG_CMD_BOOTZ -/* - * Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require - * that CFG_NO_FLASH is undefined). - */ -#undef CONFIG_CMD_IMLS - #define CONFIG_BOARD_LATE_INIT #define CONFIG_BOOTDELAY 1 diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 4c71360e8a..c9983f3f58 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -77,9 +77,6 @@ /* * Command definition */ - -#include <config_cmd_default.h> - #define CONFIG_OF_LIBFDT #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_PING diff --git a/include/configs/mx51_efikamx.h b/include/configs/mx51_efikamx.h index e3386ac52b..22aec4f176 100644 --- a/include/configs/mx51_efikamx.h +++ b/include/configs/mx51_efikamx.h @@ -11,8 +11,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include <config_cmd_default.h> - /* * High Level Board Configuration Options */ @@ -42,7 +40,6 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_DATE -#undef CONFIG_CMD_IMLS /* * Environmental settings @@ -93,7 +90,6 @@ /* SPI FLASH */ #ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SST #define CONFIG_SF_DEFAULT_CS 1 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) @@ -198,9 +194,6 @@ */ #ifdef CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION -#ifdef CONFIG_CMD_NET -#define CONFIG_CMD_NFS -#endif #endif /* diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 61e8a9800f..2203c15417 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -128,10 +128,7 @@ /*********************************************************** * Command definition ***********************************************************/ - -#include <config_cmd_default.h> #define CONFIG_CMD_BOOTZ -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_DATE diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index 220d4b807d..0479195d6d 100644 --- a/include/configs/mx53ard.h +++ b/include/configs/mx53ard.h @@ -75,10 +75,6 @@ #define CONFIG_BAUDRATE 115200 /* Command definition */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_IMLS - #define CONFIG_BOOTDELAY 3 #define CONFIG_ETHPRIME "smc911x" diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index 4af9f7ed58..82c8af802f 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -83,10 +83,6 @@ #define CONFIG_BAUDRATE 115200 /* Command definition */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_IMLS - #define CONFIG_BOOTDELAY 3 #define CONFIG_ETHPRIME "FEC0" diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index db551a948c..53f725d14e 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -92,12 +92,9 @@ #define CONFIG_BAUDRATE 115200 /* Command definition */ -#include <config_cmd_default.h> #define CONFIG_CMD_BOOTZ #define CONFIG_SUPPORT_RAW_INITRD -#undef CONFIG_CMD_IMLS - #define CONFIG_BOOTDELAY 1 #define CONFIG_ETHPRIME "FEC0" diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h index dcc86b4c37..bcdb054360 100644 --- a/include/configs/mx53smd.h +++ b/include/configs/mx53smd.h @@ -69,10 +69,6 @@ #define CONFIG_BAUDRATE 115200 /* Command definition */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_IMLS - #define CONFIG_BOOTDELAY 3 #define CONFIG_ETHPRIME "FEC0" diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 233c6d2e88..2ef3201de1 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -36,7 +36,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> #include <asm/imx-common/gpio.h> -#include <config_cmd_default.h> #ifndef CONFIG_MX6 #define CONFIG_MX6 @@ -53,11 +52,19 @@ #define CONFIG_REVISION_TAG /* Boot options */ +#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL)) +#define CONFIG_LOADADDR 0x82000000 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0x87800000 +#endif +#else #define CONFIG_LOADADDR 0x12000000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0x17800000 #endif +#endif +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + #ifndef CONFIG_BOOTDELAY #define CONFIG_BOOTDELAY 3 #endif @@ -80,7 +87,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_NO_FLASH -#undef CONFIG_CMD_IMLS #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_HUSH_PARSER #define CONFIG_CMDLINE_EDITING diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index c8c9f812f8..6c3c52e3e0 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -44,7 +44,6 @@ #define CONFIG_CMD_SF #ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 4b5c637136..a7da111ee9 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -163,7 +163,6 @@ #define CONFIG_CMD_SF #ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 63ec7c6e92..19f9e4438c 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -189,7 +189,6 @@ #ifdef CONFIG_FSL_QSPI #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_BAR #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_SPI_FLASH_STMICRO diff --git a/include/configs/nas220.h b/include/configs/nas220.h index cfb85bfe84..61af61f190 100644 --- a/include/configs/nas220.h +++ b/include/configs/nas220.h @@ -45,11 +45,9 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII #define CONFIG_CMD_NAND -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_PING #define CONFIG_CMD_USB #define CONFIG_CMD_DATE diff --git a/include/configs/neo.h b/include/configs/neo.h index 09300ca8ed..33cee43097 100644 --- a/include/configs/neo.h +++ b/include/configs/neo.h @@ -70,7 +70,6 @@ #undef CONFIG_CMD_ELF #undef CONFIG_CMD_I2C #undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_NFS /* * SDRAM configuration (please see cpu/ppc/sdram.[ch]) diff --git a/include/configs/nhk8815.h b/include/configs/nhk8815.h index 8a6d2562be..8755be73b6 100644 --- a/include/configs/nhk8815.h +++ b/include/configs/nhk8815.h @@ -17,14 +17,8 @@ #define CONFIG_SKIP_LOWLEVEL_INIT /* we have already been loaded to RAM */ /* commands */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#define CONFIG_CMD_NFS -/* There is no NOR flash, so undefine these commands */ -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS #define CONFIG_SYS_NO_FLASH /* There is NAND storage */ #define CONFIG_NAND_NOMADIK diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h index 6247bf1569..945cbd4ee7 100644 --- a/include/configs/nios2-generic.h +++ b/include/configs/nios2-generic.h @@ -75,15 +75,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BOOTD -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_ITEST -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_XIMG - #ifdef CONFIG_CMD_NET # define CONFIG_CMD_DHCP # define CONFIG_CMD_PING diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index beaa11932c..67a3c97f8b 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -36,7 +36,6 @@ #define CONFIG_CMD_SF #ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index d1bb1a182a..efc583f91e 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -124,8 +124,6 @@ #define CONFIG_SYS_NO_FLASH /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_EXT4 /* EXT4 Support */ #define CONFIG_CMD_FAT /* FAT support */ @@ -152,13 +150,6 @@ #endif -/* commands not needed from config_cmd_default.h */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_NFS /* NFS support */ -#undef CONFIG_CMD_SAVEENV /* saveenv */ -#undef CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ - #define CONFIG_OMAP3_SPI #define CONFIG_SYS_I2C #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 @@ -396,7 +387,6 @@ int rx51_kp_getc(struct stdio_dev *sdev); "echo" #define CONFIG_BOOTDELAY 30 -#define CONFIG_AUTOBOOT_KEYED #define CONFIG_MENU #define CONFIG_MENU_SHOW diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index a92112f870..dd549aa11a 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -47,6 +47,7 @@ #define CONFIG_AS3722_POWER #define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CMD_BMP /* Align LCD to 1MB boundary */ #define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE @@ -54,7 +55,6 @@ /* SPI */ #define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ #define CONFIG_TEGRA114_SPI_CTRLS 6 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 24000000 @@ -77,8 +77,14 @@ #define CONFIG_CMD_DHCP #define CONFIG_FIT +#define CONFIG_FIT_BEST_MATCH #define CONFIG_OF_LIBFDT +#define CONFIG_KEYBOARD + +#undef CONFIG_LOADADDR +#define CONFIG_LOADADDR 0x82408000 + #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/o2d.h b/include/configs/o2d.h index b2905b2697..4b36af699a 100644 --- a/include/configs/o2d.h +++ b/include/configs/o2d.h @@ -25,9 +25,6 @@ */ #include "o2dnt-common.h" -/* additional commands */ -#define CONFIG_CMD_ITEST - /* * GPIO configuration: * CS1 SDRAM activate + no CAN + no PCI diff --git a/include/configs/o2dnt-common.h b/include/configs/o2dnt-common.h index 18388d150b..435f1a27a1 100644 --- a/include/configs/o2dnt-common.h +++ b/include/configs/o2dnt-common.h @@ -76,8 +76,6 @@ /* * Supported commands */ -#include <config_cmd_default.h> - #define CONFIG_CMD_EEPROM #define CONFIG_CMD_FAT #define CONFIG_CMD_I2C @@ -98,18 +96,6 @@ #error "CONFIG_SYS_TEXT_BASE value is invalid" #endif -/* - * Autobooting - * Be selective on what keys can delay or stop the autoboot process - * To stop use: "++++++++++" - */ -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \ - "press password to stop\n", bootdelay -#define CONFIG_AUTOBOOT_STOP_STR "++++++++++" -#undef CONFIG_AUTOBOOT_DELAY_STR -#define DEBUG_BOOTKEYS 0 - #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #define CONFIG_PREBOOT "run master" diff --git a/include/configs/o2dnt2.h b/include/configs/o2dnt2.h index 1b765a7e4e..00a8d9618d 100644 --- a/include/configs/o2dnt2.h +++ b/include/configs/o2dnt2.h @@ -25,9 +25,6 @@ */ #include "o2dnt-common.h" -/* additional commands */ -#define CONFIG_CMD_ITEST - /* * GPIO configuration: * CS1 SDRAM activate + no CAN + no PCI diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index c395020919..cf17f3d06e 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -35,8 +35,8 @@ #undef CONFIG_ENV_SIZE #undef CONFIG_ENV_OFFSET -#define CONFIG_ENV_SIZE 4096 -#define CONFIG_ENV_OFFSET (SZ_1K * 1280) /* 1.25 MiB offset */ +#define CONFIG_ENV_SIZE (SZ_1K * 16) +#define CONFIG_ENV_OFFSET (SZ_1K * 3136) /* ~3 MiB offset */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) @@ -46,8 +46,92 @@ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_EXYNOS +/* DWC3 */ +#define CONFIG_USB_DWC3 +#define CONFIG_USB_DWC3_GADGET +#define CONFIG_USB_DWC3_PHY_SAMSUNG + +/* USB gadget */ +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Downloader */ +#define CONFIG_G_DNL_VENDOR_NUM 0x04E8 +#define CONFIG_G_DNL_PRODUCT_NUM 0x6601 +#define CONFIG_G_DNL_MANUFACTURER "Samsung" +#define CONFIG_USBDOWNLOAD_GADGET + +/* DFU */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_MMC +#define CONFIG_CMD_DFU +#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M +#define DFU_DEFAULT_POLL_TIMEOUT 300 + +/* THOR */ +#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM +#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D +#define CONFIG_THOR_FUNCTION +#define CONFIG_CMD_THOR_DOWNLOAD + +/* UMS */ +#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_CMD_USB_MASS_STORAGE + /* FIXME: MUST BE REMOVED AFTER TMU IS TURNED ON */ #undef CONFIG_EXYNOS_TMU #undef CONFIG_TMU_CMD_DTT +#define CONFIG_DFU_ALT_SYSTEM \ + "uImage fat 0 1;" \ + "zImage fat 0 1;" \ + "Image.itb fat 0 1;" \ + "uInitrd fat 0 1;" \ + "boot.scr fat 0 1;" \ + "boot.cmd fat 0 1;" \ + "exynos5422-odroidxu3.dtb fat 0 1;" \ + "boot part 0 1;" \ + "root part 0 2\0" + +#define CONFIG_DFU_ALT_BOOT_EMMC \ + "u-boot raw 0x3e 0x800 mmcpart 1;" \ + "bl1 raw 0x0 0x1e mmcpart 1;" \ + "bl2 raw 0x1e 0x1d mmcpart 1;" \ + "tzsw raw 0x83e 0x200 mmcpart 1;" \ + "params.bin raw 0x1880 0x20\0" + +#define CONFIG_DFU_ALT_BOOT_SD \ + "u-boot raw 0x3f 0x800;" \ + "bl1 raw 0x1 0x1e;" \ + "bl2 raw 0x1f 0x1d;" \ + "tzsw raw 0x83f 0x200;" \ + "params.bin raw 0x1880 0x20\0" + +/* Enable: board/samsung/common/misc.c to use set_dfu_alt_info() */ +#define CONFIG_MISC_COMMON +#define CONFIG_SET_DFU_ALT_INFO +#define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) + +/* Define new extra env settings, including DFU settings */ +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + EXYNOS_DEVICE_SETTINGS \ + EXYNOS_FDTFILE_SETTING \ + MEM_LAYOUT_ENV_SETTINGS \ + BOOTENV \ + "bootdelay=0\0" \ + "rootfstype=ext4\0" \ + "console=" CONFIG_DEFAULT_CONSOLE \ + "fdtfile=exynos5422-odroidxu3.dtb\0" \ + "boardname=odroidxu3\0" \ + "mmcbootdev=0\0" \ + "mmcrootdev=0\0" \ + "mmcbootpart=1\0" \ + "mmcrootpart=2\0" \ + "dfu_alt_system="CONFIG_DFU_ALT_SYSTEM \ + "dfu_alt_info=Autoset by THOR/DFU command run.\0" + #endif /* __CONFIG_H */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 709528be4b..e574742a46 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -95,8 +95,6 @@ #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_CACHE diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h index ed7956694b..81d4b34876 100644 --- a/include/configs/omap3_cairo.h +++ b/include/configs/omap3_cairo.h @@ -60,14 +60,8 @@ #define CONFIG_NAND /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_NAND_LOCK_UNLOCK -/* Disable some commands */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ - /* * TWL4030 */ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 4e587e10ff..70fab4b0f4 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -24,8 +24,6 @@ * Supported U-boot commands * ---------------------------------------------------------------------------- */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_EXT2 @@ -38,11 +36,6 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ - /* ---------------------------------------------------------------------------- * Supported U-boot features * ---------------------------------------------------------------------------- diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 8aecb571b8..89ec73cc36 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -78,7 +78,6 @@ #endif #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING -#define CONFIG_CMD_NFS /* NFS support */ /*#undef CONFIG_ENV_IS_NOWHERE*/ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 6783f68cee..af6ae73ef6 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -89,8 +89,6 @@ #define CONFIG_DOS_PARTITION /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ @@ -109,11 +107,6 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ - #define CONFIG_SYS_NO_FLASH /* diff --git a/include/configs/omap3_mvblx.h b/include/configs/omap3_mvblx.h index 10d1f77c9d..4339b0558c 100644 --- a/include/configs/omap3_mvblx.h +++ b/include/configs/omap3_mvblx.h @@ -114,20 +114,14 @@ #define CONFIG_SYS_NO_FLASH /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_I2C /* I2C serial bus support */ #define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_CMD_EEPROM -#define CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ -#define CONFIG_CMD_NFS /* NFS support */ #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING -#define CONFIG_CMD_FPGA #define CONFIG_CMD_FPGA_LOADMK #define CONFIG_SYS_I2C @@ -144,8 +138,6 @@ #undef CONFIG_ENV_OVERWRITE /* disallow overwriting serial# and ethaddr */ #define CONFIG_BOOTDELAY 0 #define CONFIG_ZERO_BOOTDELAY_CHECK -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_STOP_STR "S" #define CONFIG_EXTRA_ENV_SETTINGS \ "silent=true\0" \ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index e1db29ad28..76bf3b6216 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -58,9 +58,6 @@ /* commands to include */ #define CONFIG_CMD_CACHE #define CONFIG_CMD_USB -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_NFS /* NFS support */ #ifdef CONFIG_NAND #define CONFIG_CMD_UBI /* UBI-formated MTD partition support */ diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index a8af1c5309..49467c9c92 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -57,14 +57,7 @@ #define CONFIG_SERIAL3 3 /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE /* Cache control */ -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ -#undef CONFIG_CMD_NFS /* NFS support */ /* * Board NAND Info. diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h index d97e4d4536..16ceb91887 100644 --- a/include/configs/omap3_sdp3430.h +++ b/include/configs/omap3_sdp3430.h @@ -148,9 +148,6 @@ #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_ENV_SECT_SIZE) /*--------------------------------------------------------------------------*/ -/* commands to include */ -#include <config_cmd_default.h> - /* Enabled commands */ #define CONFIG_CMD_DHCP /* DHCP Support */ #define CONFIG_CMD_EXT2 /* EXT2 Support */ @@ -159,10 +156,6 @@ #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ #define CONFIG_CMD_MMC /* MMC support */ -/* Disabled commands */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMLS /* List all found images */ - /*--------------------------------------------------------------------------*/ /* * MMC boot support diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 36a52a93b5..d90cc42d93 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -78,11 +78,6 @@ #define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */ #endif -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ -#define CONFIG_CMD_NFS /* NFS support */ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 3313f96fef..95614b94cc 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -48,7 +48,6 @@ #define FAT_ENV_INTERFACE "mmc" #define FAT_ENV_DEVICE_AND_PART "0:1" #define FAT_ENV_FILE "uboot.env" -#define CONFIG_CMD_SAVEENV #define CONFIG_ENV_OVERWRITE #endif /* __CONFIG_PANDA_H */ diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index a83797454c..072b97ec99 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -30,6 +30,5 @@ #define CONFIG_ENV_IS_IN_MMC 1 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ #define CONFIG_ENV_OFFSET 0xE0000 -#define CONFIG_CMD_SAVEENV #endif /* __CONFIG_SDP4430_H */ diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 4215156063..86479213fc 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -12,10 +12,12 @@ #ifndef __CONFIG_OMAP5_EVM_H #define __CONFIG_OMAP5_EVM_H +#ifndef CONFIG_SPL_BUILD /* Define the default GPT table for eMMC */ #define PARTS_DEFAULT \ "uuid_disk=${uuid_gpt_disk};" \ "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}" +#endif #include <configs/ti_omap5_common.h> @@ -31,7 +33,6 @@ #define CONFIG_ENV_OFFSET 0xE0000 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) #define CONFIG_SYS_REDUNDAND_ENVIRONMENT -#define CONFIG_CMD_SAVEENV /* Enhance our eMMC support / experience. */ #define CONFIG_CMD_GPT @@ -59,7 +60,6 @@ /* Enabled commands */ #define CONFIG_CMD_DHCP /* DHCP Support */ -#define CONFIG_CMD_NFS /* NFS support */ /* USB Networking options */ #define CONFIG_USB_HOST_ETHER diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 91a74138c5..6d0d020690 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -103,7 +103,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #define CONFIG_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_DAVINCI_SPI @@ -230,7 +229,6 @@ /* * U-Boot commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_ENV #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP @@ -238,7 +236,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#define CONFIG_CMD_MEMORY #ifdef CONFIG_CMD_BDI #define CONFIG_CLOCKS #endif @@ -250,8 +247,6 @@ #endif #ifdef CONFIG_USE_NAND -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_NAND #define CONFIG_CMD_MTDPARTS @@ -264,11 +259,8 @@ #endif #ifdef CONFIG_USE_SPIFLASH -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_FLASH #define CONFIG_CMD_SPI #define CONFIG_CMD_SF -#define CONFIG_CMD_SAVEENV #endif #if !defined(CONFIG_USE_NAND) && \ @@ -277,7 +269,6 @@ #define CONFIG_ENV_IS_NOWHERE #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_SIZE (16 << 10) -#undef CONFIG_CMD_IMLS #undef CONFIG_CMD_ENV #endif diff --git a/include/configs/openrd.h b/include/configs/openrd.h index b6f80af801..72113144b3 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -44,7 +44,6 @@ */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ #define CONFIG_SYS_MVFS -#include <config_cmd_default.h> #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_MII diff --git a/include/configs/openrisc-generic.h b/include/configs/openrisc-generic.h index d4de3c3550..23929c2746 100644 --- a/include/configs/openrisc-generic.h +++ b/include/configs/openrisc-generic.h @@ -114,9 +114,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - - #define CONFIG_CMD_IRQ #define CONFIG_CMD_ELF #define CONFIG_CMD_BSP diff --git a/include/configs/origen.h b/include/configs/origen.h index 5d43229de7..dae8fd5aa4 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -60,7 +60,6 @@ #define CONFIG_CMD_FS_GENERIC #define CONFIG_CMD_BOOTZ #define CONFIG_SUPPORT_RAW_INITRD -#undef CONFIG_CMD_NFS /* MMC SPL */ #define COPY_BL2_FNPTR_ADDR 0x02020030 diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h index 2bbf2b9a5f..fb58acf508 100644 --- a/include/configs/ot1200.h +++ b/include/configs/ot1200.h @@ -27,7 +27,6 @@ /* SF Configs */ #define CONFIG_CMD_SF #define CONFIG_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SPI_FLASH_MACRONIX diff --git a/include/configs/otc570.h b/include/configs/otc570.h index 2390bebf91..0cada63ef7 100644 --- a/include/configs/otc570.h +++ b/include/configs/otc570.h @@ -135,11 +135,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_IMLS - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_NAND diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index b51379e779..af3086dcff 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -41,7 +41,6 @@ #define CONFIG_BOARDNAME "P1020RDB-PC" #define CONFIG_NAND_FSL_ELBC #define CONFIG_P1020 -#define CONFIG_SPI_FLASH #define CONFIG_VSC7385_ENET #define CONFIG_SLIC #define __SW_BOOT_MASK 0x03 @@ -70,7 +69,6 @@ #define CONFIG_BOARDNAME "P1020RDB-PD" #define CONFIG_NAND_FSL_ELBC #define CONFIG_P1020 -#define CONFIG_SPI_FLASH #define CONFIG_VSC7385_ENET #define CONFIG_SLIC #define __SW_BOOT_MASK 0x03 @@ -97,7 +95,6 @@ #define CONFIG_NAND_FSL_ELBC #define CONFIG_P1021 #define CONFIG_QE -#define CONFIG_SPI_FLASH #define CONFIG_VSC7385_ENET #define CONFIG_SYS_LBC_LBCR 0x00080000 /* Implement conversion of addresses in the LBC */ @@ -133,7 +130,6 @@ #define CONFIG_NAND_FSL_ELBC #define CONFIG_P1024 #define CONFIG_SLIC -#define CONFIG_SPI_FLASH #define __SW_BOOT_MASK 0xf3 #define __SW_BOOT_NOR 0x00 #define __SW_BOOT_SPI 0x08 @@ -148,7 +144,6 @@ #define CONFIG_P1025 #define CONFIG_QE #define CONFIG_SLIC -#define CONFIG_SPI_FLASH #define CONFIG_SYS_LBC_LBCR 0x00080000 /* Implement conversion of addresses in the LBC */ @@ -164,7 +159,6 @@ #define CONFIG_BOARDNAME "P2020RDB-PCA" #define CONFIG_NAND_FSL_ELBC #define CONFIG_P2020 -#define CONFIG_SPI_FLASH #define CONFIG_VSC7385_ENET #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0xc8 @@ -897,8 +891,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_IRQ #define CONFIG_CMD_PING #define CONFIG_CMD_I2C diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index 58dc98abc1..8231eb4650 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -422,8 +422,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_IRQ #define CONFIG_CMD_PING #define CONFIG_CMD_I2C diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index 4433c7c122..eb1400337d 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -171,8 +171,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -181,7 +179,6 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO diff --git a/include/configs/palmld.h b/include/configs/palmld.h index b54c016637..a9f92fa29f 100644 --- a/include/configs/palmld.h +++ b/include/configs/palmld.h @@ -50,11 +50,7 @@ /* * Bootloader Components Configuration */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_NFS #define CONFIG_CMD_ENV -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_MMC #define CONFIG_CMD_IDE #define CONFIG_LCD diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h index 965200a158..b68ad3b7dd 100644 --- a/include/configs/palmtc.h +++ b/include/configs/palmtc.h @@ -54,9 +54,6 @@ /* * Bootloader Components Configuration */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_NFS #define CONFIG_CMD_ENV #define CONFIG_CMD_MMC #define CONFIG_LCD diff --git a/include/configs/palmtreo680.h b/include/configs/palmtreo680.h index 38178151fe..3946607512 100644 --- a/include/configs/palmtreo680.h +++ b/include/configs/palmtreo680.h @@ -40,16 +40,6 @@ /* * Bootloader Components Configuration */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_SOURCE -#undef CONFIG_CMD_XIMG - #define CONFIG_CMD_ENV #define CONFIG_CMD_MMC #define CONFIG_CMD_NAND diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h index 2508702a4a..af2654e0f4 100644 --- a/include/configs/pb1x00.h +++ b/include/configs/pb1x00.h @@ -168,23 +168,14 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_MII #define CONFIG_CMD_PING -#undef CONFIG_CMD_SAVEENV #undef CONFIG_CMD_FAT -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_FPGA #undef CONFIG_CMD_IDE -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_RUN -#undef CONFIG_CMD_LOADB #undef CONFIG_CMD_ELF -#undef CONFIG_CMD_BDI #undef CONFIG_CMD_BEDBUG #endif /* __CONFIG_H */ diff --git a/include/configs/pcm030.h b/include/configs/pcm030.h index 31a93c87de..83c96a8c7b 100644 --- a/include/configs/pcm030.h +++ b/include/configs/pcm030.h @@ -50,15 +50,12 @@ Serial console configuration /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PCI #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index 45c2df6da0..d80cf32cbe 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -97,7 +97,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ + (8 * 1024 * 1024)) -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 24000000 diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index 3cadf34135..77e20cf8da 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -248,7 +248,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG @@ -260,7 +259,6 @@ #define CONFIG_CMD_IDE #define CONFIG_CMD_IRQ #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h index 17d7bcab00..e7413c9fa2 100644 --- a/include/configs/pdm360ng.h +++ b/include/configs/pdm360ng.h @@ -381,8 +381,6 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h index e3cb09e3d5..46699ff635 100644 --- a/include/configs/peach-pi.h +++ b/include/configs/peach-pi.h @@ -10,7 +10,6 @@ #define __CONFIG_PEACH_PI_H #define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_SPI_FLASH #define CONFIG_ENV_SPI_BASE 0x12D30000 #define FLASH_SIZE (0x4 << 20) #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h index 3ee42ef2c8..c5c9e3aa38 100644 --- a/include/configs/peach-pit.h +++ b/include/configs/peach-pit.h @@ -10,7 +10,6 @@ #define __CONFIG_PEACH_PIT_H #define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_SPI_FLASH #define CONFIG_ENV_SPI_BASE 0x12D30000 #define FLASH_SIZE (0x4 << 20) #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) diff --git a/include/configs/pepper.h b/include/configs/pepper.h index cc153abaa9..16149f69d5 100644 --- a/include/configs/pepper.h +++ b/include/configs/pepper.h @@ -20,6 +20,8 @@ #undef CONFIG_SYS_PROMPT #define CONFIG_SYS_PROMPT "pepper# " +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 + /* Mach type */ #define MACH_TYPE_PEPPER 4207 /* Until the next sync */ #define CONFIG_MACH_TYPE MACH_TYPE_PEPPER diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 10415d31a5..f9a1d51747 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -183,13 +183,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_IMLS - #define CONFIG_CMD_CACHE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index f6aebf4e4a..6c434f0699 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -197,13 +197,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_IMLS - #define CONFIG_CMD_CACHE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 @@ -339,7 +332,6 @@ #define CONFIG_BOOTCOMMAND "run flashboot" #define CONFIG_ROOTPATH "/ronetix/rootfs" -#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay #define CONFIG_CON_ROT "fbcon=rotate:3 " #define CONFIG_BOOTARGS "root=/dev/mtdblock4 rootfstype=jffs2 "\ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index a8dc0f0b03..c7938656b3 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -72,10 +72,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMLS - #define CONFIG_CMD_CACHE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 @@ -96,7 +92,6 @@ /* NOR flash, not available */ #define CONFIG_SYS_NO_FLASH 1 -#undef CONFIG_CMD_FLASH /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h index 89560ad1c5..3a0992a5cf 100644 --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h @@ -34,7 +34,6 @@ */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ #define CONFIG_SYS_MVFS -#include <config_cmd_default.h> #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_MII diff --git a/include/configs/porter.h b/include/configs/porter.h index f85d39cfed..93673490fb 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -44,7 +44,6 @@ #define CONFIG_SPI #define CONFIG_SPI_FLASH_BAR #define CONFIG_SH_QSPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_SPI_FLASH_QUAD #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/pr1.h b/include/configs/pr1.h index b9253b9684..3e4aab45f7 100644 --- a/include/configs/pr1.h +++ b/include/configs/pr1.h @@ -83,7 +83,6 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index af7c076df0..3edeb0812f 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -104,8 +104,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_FAT #define CONFIG_CMD_DHCP diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index 946b2c85e9..d896bca68b 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -25,11 +25,14 @@ #define DDR_PLL_FREQ 266 #define BOARD_DFU_BUTTON_GPIO 59 -#define BOARD_DFU_BUTTON_LED 117 #define BOARD_LCD_POWER 111 #define BOARD_BACK_LIGHT 112 #define BOARD_TOUCH_POWER 57 +#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + "button_dfu0=59\0" \ + "led0=117,0,1\0" \ + /* Physical Memory Map */ #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 1GB */ @@ -48,29 +51,25 @@ #define CONFIG_FACTORYSET -/* UBI Support */ -#ifndef CONFIG_SPL_BUILD -#define CONFIG_CMD_MTDPARTS -#define CONFIG_MTD_PARTITIONS -#define CONFIG_MTD_DEVICE -#define CONFIG_RBTREE -#define CONFIG_LZO -#define CONFIG_CMD_UBI -#define CONFIG_CMD_UBIFS -#endif /* Watchdog */ #define CONFIG_OMAP_WATCHDOG #ifndef CONFIG_SPL_BUILD +/* Use common default */ +#define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_V1 + /* Default env settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hostname=pxm2\0" \ "nand_img_size=0x500000\0" \ "optargs=\0" \ + "preboot=draco_led 0\0" \ + CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ "splashpos=m,m\0" \ - CONFIG_COMMON_ENV_SETTINGS \ + CONFIG_ENV_SETTINGS_V1 \ + CONFIG_ENV_SETTINGS_NAND_V1 \ "mmc_dev=0\0" \ "mmc_root=/dev/mmcblk0p2 rw\0" \ "mmc_root_fs_type=ext4 rootwait\0" \ diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index 75da8a1ebe..b22637b367 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -45,13 +45,9 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS #define CONFIG_CMD_DHCP #define CONFIG_DRIVER_NE2000 diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h index b07ca4e02a..fae5b0590b 100644 --- a/include/configs/qemu-mips64.h +++ b/include/configs/qemu-mips64.h @@ -45,13 +45,9 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS #define CONFIG_CMD_DHCP #define CONFIG_DRIVER_NE2000 diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index cf9e2ff0e0..be430ff07f 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -158,8 +158,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_BOOTZ diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h new file mode 100644 index 0000000000..78c296f5ad --- /dev/null +++ b/include/configs/qemu-x86.h @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/x86-common.h> + +#define CONFIG_SYS_MONITOR_LEN (1 << 20) +#define CONFIG_ARCH_MISC_INIT + +#define CONFIG_X86_SERIAL + +#define CONFIG_PCI_MEM_BUS 0xc0000000 +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x10000000 + +#define CONFIG_PCI_PREF_BUS 0xd0000000 +#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS +#define CONFIG_PCI_PREF_SIZE 0x10000000 + +#define CONFIG_PCI_IO_BUS 0x2000 +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0xe000 + +#define CONFIG_PCI_CONFIG_HOST_BRIDGE +#define CONFIG_PCI_PNP +#define CONFIG_E1000 + +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,vga\0" \ + "stdout=serial,vga\0" \ + "stderr=serial,vga\0" + +/* + * ATA/SATA support for QEMU x86 targets + * - Only legacy IDE controller is supported for QEMU '-M pc' target + * - AHCI controller is supported for QEMU '-M q35' target + * + * Default configuraion is to support the QEMU default x86 target + * Undefine CONFIG_CMD_IDE to support q35 target + */ +#define CONFIG_CMD_IDE +#ifdef CONFIG_CMD_IDE +#define CONFIG_SYS_IDE_MAXBUS 2 +#define CONFIG_SYS_IDE_MAXDEVICE 4 +#define CONFIG_SYS_ATA_BASE_ADDR 0 +#define CONFIG_SYS_ATA_DATA_OFFSET 0 +#define CONFIG_SYS_ATA_REG_OFFSET 0 +#define CONFIG_SYS_ATA_ALT_OFFSET 0 +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0 +#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 +#define CONFIG_ATAPI + +#undef CONFIG_SCSI_AHCI +#undef CONFIG_CMD_SCSI +#else +#define CONFIG_SCSI_DEV_LIST \ + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_AHCI} +#endif + +/* GPIO is not supported */ +#undef CONFIG_INTEL_ICH6_GPIO +#undef CONFIG_CMD_GPIO + +/* SPI is not supported */ +#undef CONFIG_ICH_SPI +#undef CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_IS_NOWHERE + +#endif /* __CONFIG_H */ diff --git a/include/configs/qong.h b/include/configs/qong.h index 8a9847e58d..f34a54f754 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -111,9 +111,6 @@ /*********************************************************** * Command definition ***********************************************************/ - -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index 708647ece8..b1d79fdf53 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -18,14 +18,10 @@ #define CONFIG_BOARD_LATE_INIT #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_PING #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_SDRAM #define CONFIG_CMD_ENV -#define CONFIG_CMD_SAVEENV #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 3 diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 5371a65938..2d1e56aeb8 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -11,10 +11,7 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE -#define CONFIG_CMD_FLASH #define CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_IDE diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 9c62a04dbf..82a056c690 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -20,12 +20,8 @@ * Command line configuration. */ #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_PCI #define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_NFS #define CONFIG_CMD_IDE #define CONFIG_CMD_EXT2 #define CONFIG_DOS_PARTITION diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h new file mode 100644 index 0000000000..d9dde9cc5e --- /dev/null +++ b/include/configs/rastaban.h @@ -0,0 +1,114 @@ +/* + * (C) Copyright 2013 Siemens Schweiz AG + * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * U-Boot file:/include/configs/am335x_evm.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_RASTABAN_H +#define __CONFIG_RASTABAN_H + +#include "siemens-am33x-common.h" + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_SYS_MPUCLK 300 +#define DDR_PLL_FREQ 303 +#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC + +/* FWD Button = 27 + * SRV Button = 87 */ +#define BOARD_DFU_BUTTON_GPIO 27 +#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ +/* In dfu mode keep led1 on */ +#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + "button_dfu0=27\0" \ + "button_dfu1=87\0" \ + "led0=3,0,1\0" \ + "led1=4,0,0\0" \ + "led2=5,0,1\0" \ + "led3=62,0,1\0" \ + "led4=60,0,1\0" \ + "led5=63,0,1\0" + +#undef CONFIG_DOS_PARTITION +#undef CONFIG_CMD_FAT + +#define CONFIG_BOARD_LATE_INIT + + /* Physical Memory Map */ +#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ + +/* I2C Configuration */ +#define CONFIG_SYS_I2C_SPEED 100000 + +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define EEPROM_ADDR_DDR3 0x90 +#define EEPROM_ADDR_CHIP 0x120 + +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300 + +#undef CONFIG_SPL_NET_SUPPORT +#undef CONFIG_SPL_NET_VCI_STRING +#undef CONFIG_SPL_ETH_SUPPORT + +#undef CONFIG_MII +#undef CONFIG_PHY_GIGE +#define CONFIG_PHY_SMSC + +#define CONFIG_FACTORYSET + +/* Watchdog */ +#define CONFIG_OMAP_WATCHDOG + +/* Define own nand partitions */ +#define CONFIG_ENV_OFFSET_REDUND 0x2E0000 +#define CONFIG_ENV_SIZE_REDUND 0x2000 +#define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) + + + +#define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_V3 + +#ifndef CONFIG_SPL_BUILD + +/* Default env settings */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hostname=rastaban\0" \ + "nand_img_size=0x400000\0" \ + "optargs=\0" \ + "preboot=draco_led 0\0" \ + CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + CONFIG_ENV_SETTINGS_V2 \ + CONFIG_ENV_SETTINGS_NAND_V2 + +#ifndef CONFIG_RESTORE_FLASH +/* set to negative value for no autoboot */ +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_BOOTCOMMAND \ +"if dfubutton; then " \ + "run dfu_start; " \ + "reset; " \ +"fi;" \ +"run nand_boot;" \ +"run nand_boot_backup;" \ +"reset;" + + +#else +#define CONFIG_BOOTDELAY 0 + +#define CONFIG_BOOTCOMMAND \ + "setenv autoload no; " \ + "dhcp; " \ + "if tftp 80000000 debrick.scr; then " \ + "source 80000000; " \ + "fi" +#endif +#endif /* CONFIG_SPL_BUILD */ +#endif /* ! __CONFIG_RASTABAN_H */ diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 3845e60b35..7dd9260535 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -11,17 +11,11 @@ #include <asm/arch/rmobile.h> -#define CONFIG_CMD_EDITENV -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_RUN -#define CONFIG_CMD_LOADS #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#define CONFIG_CMD_NFS #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_USB #define CONFIG_CMD_FAT diff --git a/include/configs/rd6281a.h b/include/configs/rd6281a.h index e80949e3d6..a0120b06fd 100644 --- a/include/configs/rd6281a.h +++ b/include/configs/rd6281a.h @@ -26,7 +26,6 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_FAT diff --git a/include/configs/rpi-common.h b/include/configs/rpi-common.h index b54cf8bca4..1012cdd292 100644 --- a/include/configs/rpi-common.h +++ b/include/configs/rpi-common.h @@ -120,7 +120,6 @@ #define CONFIG_COMMAND_HISTORY /* Commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_GPIO #define CONFIG_CMD_MMC #define CONFIG_PARTITION_UUIDS @@ -135,9 +134,6 @@ #include <config_distro_defaults.h> -/* Some things don't make sense on this HW or yet */ -#undef CONFIG_CMD_FPGA - /* Environment */ #define ENV_DEVICE_SETTINGS \ "stdin=serial,lcd\0" \ diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h index fc8e96735b..039880b133 100644 --- a/include/configs/rsk7203.h +++ b/include/configs/rsk7203.h @@ -14,12 +14,8 @@ #define CONFIG_CPU_SH7203 1 #define CONFIG_RSK7203 1 -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_CACHE #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h index 2ecf785082..c60e233e9f 100644 --- a/include/configs/rsk7264.h +++ b/include/configs/rsk7264.h @@ -15,10 +15,6 @@ #define CONFIG_CPU_SH7264 1 #define CONFIG_RSK7264 1 -#ifndef _CONFIG_CMD_DEFAULT_H -# include <config_cmd_default.h> -#endif - #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTARGS "console=ttySC3,115200" #define CONFIG_BOOTDELAY 3 diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h index 14c1da774d..b4fbc9c17d 100644 --- a/include/configs/rsk7269.h +++ b/include/configs/rsk7269.h @@ -14,10 +14,6 @@ #define CONFIG_CPU_SH7269 1 #define CONFIG_RSK7269 1 -#ifndef _CONFIG_CMD_DEFAULT_H -# include <config_cmd_default.h> -#endif - #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTARGS "console=ttySC7,115200" #define CONFIG_BOOTDELAY 3 diff --git a/include/configs/rut.h b/include/configs/rut.h index 0067ea46e0..78264bab55 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -45,29 +45,23 @@ #define CONFIG_FACTORYSET -/* UBI Support */ -#ifndef CONFIG_SPL_BUILD -#define CONFIG_CMD_MTDPARTS -#define CONFIG_MTD_PARTITIONS -#define CONFIG_MTD_DEVICE -#define CONFIG_RBTREE -#define CONFIG_LZO -#define CONFIG_CMD_UBI -#define CONFIG_CMD_UBIFS -#endif /* Watchdog */ #define WATCHDOG_TRIGGER_GPIO 14 #ifndef CONFIG_SPL_BUILD +/* Use common default */ +#define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_V1 + /* Default env settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hostname=rut\0" \ "nand_img_size=0x500000\0" \ "splashpos=m,m\0" \ "optargs=fixrtc --no-log consoleblank=0 \0" \ - CONFIG_COMMON_ENV_SETTINGS \ + CONFIG_ENV_SETTINGS_V1 \ + CONFIG_ENV_SETTINGS_NAND_V1 \ "mmc_dev=0\0" \ "mmc_root=/dev/mmcblk0p2 rw\0" \ "mmc_root_fs_type=ext4 rootwait\0" \ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 16770f0594..7994ecf401 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -58,16 +58,8 @@ /* PWM */ #define CONFIG_PWM 1 -/* It should define before config_cmd_default.h */ #define CONFIG_SYS_NO_FLASH 1 -/* Command definition */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_MISC -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_XIMG #define CONFIG_CMD_CACHE #define CONFIG_CMD_REGINFO #define CONFIG_CMD_ONENAND diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index d933a9e7c6..9497bea946 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -52,7 +52,6 @@ /* NOR flash */ #ifndef CONFIG_SYS_NO_FLASH -#define CONFIG_CMD_FLASH #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_PROTECTION @@ -78,7 +77,6 @@ #ifdef CONFIG_CMD_SF #define CONFIG_ATMEL_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SF_DEFAULT_SPEED 30000000 #endif diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 5fb621ec85..e06dfc9a90 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -40,7 +40,6 @@ #ifdef CONFIG_CMD_SF #define CONFIG_ATMEL_SPI #define CONFIG_ATMEL_SPI0 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0 diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index 546d7a3a9f..eadccc182a 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -40,7 +40,6 @@ #ifdef CONFIG_CMD_SF #define CONFIG_ATMEL_SPI #define CONFIG_ATMEL_SPI0 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0 diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 3a857e2a3d..6965d921d9 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -81,7 +81,6 @@ #define CONFIG_CMD_SF #define CONFIG_CMD_SF_TEST #define CONFIG_CMD_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SPI_FLASH_EON #define CONFIG_SPI_FLASH_GIGADEVICE @@ -113,12 +112,10 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} -#define CONFIG_SANDBOX_SERIAL #define CONFIG_SYS_NO_FLASH /* include default commands */ -#include <config_cmd_default.h> #include <config_distro_defaults.h> #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/sansa_fuze_plus.h b/include/configs/sansa_fuze_plus.h index 8cce34af76..1715678672 100644 --- a/include/configs/sansa_fuze_plus.h +++ b/include/configs/sansa_fuze_plus.h @@ -11,7 +11,6 @@ /* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH -#include <config_cmd_default.h> #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DOS_PARTITION diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h index 11bf504832..b2adea976a 100644 --- a/include/configs/sbc405.h +++ b/include/configs/sbc405.h @@ -86,8 +86,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_BSP #define CONFIG_CMD_ELF #define CONFIG_CMD_I2C diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 2d264d2ef7..9d89b2a342 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -417,8 +417,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_I2C #define CONFIG_CMD_MII #define CONFIG_CMD_PING @@ -427,12 +425,6 @@ #define CONFIG_CMD_PCI #endif -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif - - #undef CONFIG_WATCHDOG /* watchdog disabled */ /* diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 5b373cb0f1..0717156c6b 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -536,8 +536,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 021da50aa8..00aab6b3d5 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -479,10 +479,9 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING - #define CONFIG_CMD_I2C - #define CONFIG_CMD_REGINFO +#define CONFIG_CMD_PING +#define CONFIG_CMD_I2C +#define CONFIG_CMD_REGINFO #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h index 0c4ca21a2d..6d35cd3df5 100644 --- a/include/configs/sc_sps_1.h +++ b/include/configs/sc_sps_1.h @@ -16,7 +16,6 @@ /* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH -#include <config_cmd_default.h> #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DOS_PARTITION @@ -27,7 +26,6 @@ #define CONFIG_CMD_GPIO #define CONFIG_CMD_MII #define CONFIG_CMD_MMC -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_USB diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h index ecb372f941..f367d62593 100644 --- a/include/configs/scb9328.h +++ b/include/configs/scb9328.h @@ -30,15 +30,9 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_SOURCE - /* * Boot options. Setting delay to -1 stops autostart count down. * NOTE: Sending parameters to kernel depends on kernel version and diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 623be7d39b..1f1beeaf2e 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -124,6 +124,7 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ +#endif /* CONFIG_CMD_FLASH */ #ifdef CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */ @@ -134,7 +135,6 @@ #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) #endif -#endif /* CONFIG_CMD_FLASH */ /* * DDR SDRAM diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index d7bc751eab..f1f9ca8632 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -16,18 +16,13 @@ #define CONFIG_SYS_TEXT_BASE 0x5ff80000 #define CONFIG_SYS_LDSCRIPT "board/renesas/sh7752evb/u-boot.lds" -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_MII #define CONFIG_CMD_PING -#define CONFIG_CMD_NFS #define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SF -#define CONFIG_CMD_RUN -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_MD5SUM #define CONFIG_MD5 -#define CONFIG_CMD_LOADS #define CONFIG_CMD_MMC #define CONFIG_CMD_EXT2 #define CONFIG_DOS_PARTITION @@ -102,7 +97,6 @@ /* SPI */ #define CONFIG_SH_SPI 1 #define CONFIG_SH_SPI_BASE 0xfe002000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO 1 #define CONFIG_SPI_FLASH_MACRONIX 1 diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h index 2124e0f3dd..d7ed65b188 100644 --- a/include/configs/sh7753evb.h +++ b/include/configs/sh7753evb.h @@ -16,18 +16,13 @@ #define CONFIG_SYS_TEXT_BASE 0x5ff80000 #define CONFIG_SYS_LDSCRIPT "board/renesas/sh7753evb/u-boot.lds" -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_MII #define CONFIG_CMD_PING -#define CONFIG_CMD_NFS #define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SF -#define CONFIG_CMD_RUN -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_MD5SUM #define CONFIG_MD5 -#define CONFIG_CMD_LOADS #define CONFIG_CMD_MMC #define CONFIG_CMD_EXT2 #define CONFIG_DOS_PARTITION @@ -102,7 +97,6 @@ /* SPI */ #define CONFIG_SH_SPI 1 #define CONFIG_SH_SPI_BASE 0xfe002000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO 1 #define CONFIG_SPI_FLASH_MACRONIX 1 diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index fd6a1df48a..cf514b6f94 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -17,17 +17,12 @@ #define CONFIG_SYS_TEXT_BASE 0x8ef80000 #define CONFIG_SYS_LDSCRIPT "board/renesas/sh7757lcr/u-boot.lds" -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_MII #define CONFIG_CMD_PING -#define CONFIG_CMD_NFS #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SF -#define CONFIG_CMD_RUN -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_MD5SUM #define CONFIG_MD5 -#define CONFIG_CMD_LOADS #define CONFIG_CMD_MMC #define CONFIG_CMD_EXT2 #define CONFIG_DOS_PARTITION @@ -103,7 +98,6 @@ /* SPI */ #define CONFIG_SH_SPI 1 #define CONFIG_SH_SPI_BASE 0xfe002000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO 1 /* MMCIF */ diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 27ad96e484..7148f1da95 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -18,12 +18,8 @@ * Command line configuration. */ #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_MII #define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_NFS #define CONFIG_CMD_JFFS2 #define CONFIG_BOOTDELAY -1 diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 9f42ae1513..2ba0c58586 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -13,14 +13,9 @@ #define CONFIG_CPU_SH7785 1 #define CONFIG_SH7785LCR 1 -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_PCI #define CONFIG_CMD_PING -#define CONFIG_CMD_NFS #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_RUN -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_SH_ZIMAGEBOOT #define CONFIG_CMD_USB diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 84029cb399..272e3ca9b3 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -46,7 +46,6 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include <config_cmd_default.h> #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV diff --git a/include/configs/shmin.h b/include/configs/shmin.h index 8c02afedd2..11ae15ced5 100644 --- a/include/configs/shmin.h +++ b/include/configs/shmin.h @@ -15,13 +15,9 @@ /* T-SH7706LSR*/ /* #define CONFIG_T_SH7706LSR 1 */ -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_SDRAM #define CONFIG_CMD_PING -#define CONFIG_CMD_NFS #define CONFIG_CMD_ENV -#define CONFIG_CMD_SAVEENV #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTARGS "console=ttySC0,115200" diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index f086e730cd..0f325944b5 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -31,7 +31,9 @@ #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_BOARD_LATE_INIT #define CONFIG_SYS_NO_FLASH +#ifdef CONFIG_SIEMENS_MACH_TYPE #define CONFIG_MACH_TYPE CONFIG_SIEMENS_MACH_TYPE +#endif #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS @@ -40,11 +42,9 @@ #define CONFIG_SYS_CACHELINE_SIZE 64 /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_ECHO #define CONFIG_CMD_CACHE +#define CONFIG_CMD_TIME #define CONFIG_SYS_GENERIC_BOARD @@ -69,7 +69,7 @@ #define CONFIG_SYS_MAXARGS 32 /* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 512 +#define CONFIG_SYS_CBSIZE 1024 /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ @@ -99,7 +99,6 @@ #define CONFIG_SPI #define CONFIG_OMAP3_SPI #define CONFIG_MTD_DEVICE -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED (75000000) @@ -309,22 +308,87 @@ /* NAND support */ #ifdef CONFIG_NAND #define CONFIG_CMD_NAND + +/* UBI Support */ +#ifndef CONFIG_SPL_BUILD #define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#endif + +/* Commen environment */ +#define CONFIG_PREBOOT +#define COMMON_ENV_DFU_ARGS "dfu_args=run bootargs_defaults;" \ + "setenv bootargs ${bootargs};" \ + "mtdparts default;" \ + "draco_led 1;" \ + "dfu 0 nand 0;" \ + "draco_led 0;\0" \ + +#define COMMON_ENV_NAND_BOOT \ + "nand_boot=echo Booting from nand; " \ + "if test ${upgrade_available} -eq 1; then " \ + "if test ${bootcount} -gt ${bootlimit}; " \ + "then " \ + "setenv upgrade_available 0;" \ + "setenv ${partitionset_active} true;" \ + "if test -n ${A}; then " \ + "setenv partitionset_active B; " \ + "env delete A; " \ + "fi;" \ + "if test -n ${B}; then " \ + "setenv partitionset_active A; " \ + "env delete B; " \ + "fi;" \ + "saveenv; " \ + "fi;" \ + "fi;" \ + "echo set ${partitionset_active}...;" \ + "run nand_args; " + +#define COMMON_ENV_NAND_CMDS "flash_self=run nand_boot\0" \ + "flash_self_test=setenv testargs test; " \ + "run nand_boot\0" \ + "dfu_start=echo Preparing for dfu mode ...; " \ + "run dfu_args; \0" + +#define COMMON_ENV_SETTINGS \ + "verify=no \0" \ + "project_dir=targetdir\0" \ + "upgrade_available=0\0" \ + "altbootcmd=run bootcmd\0" \ + "bootlimit=3\0" \ + "partitionset_active=A\0" \ + "loadaddr=0x82000000\0" \ + "kloadaddr=0x81000000\0" \ + "script_addr=0x81900000\0" \ + "console=console=ttyMTD,mtdoops console=ttyO0,115200n8 panic=5\0" \ + "nfsopts=nolock rw\0" \ + "ip_method=none\0" \ + "bootenv=uEnv.txt\0" \ + "bootargs_defaults=setenv bootargs " \ + "console=${console} " \ + "${testargs} " \ + "${optargs}\0" \ + "siemens_help=echo; "\ + "echo Type 'run flash_self' to use kernel and root " \ + "filesystem on memory; echo Type 'run flash_self_test' to " \ + "use kernel and root filesystem on memory, boot in test " \ + "mode; echo Not ready yet: 'run flash_nfs' to use kernel " \ + "from memory and root filesystem over NFS; echo Type " \ + "'run net_nfs' to get Kernel over TFTP and mount root " \ + "filesystem over NFS; " \ + "echo Set partitionset_active variable to 'A' " \ + "or 'B' to select kernel and rootfs partition; " \ + "echo" \ + "\0" -#define MTDIDS_NAME_STR "omap2-nand.0" -#define MTDIDS_DEFAULT "nand0=" MTDIDS_NAME_STR -#define MTDPARTS_DEFAULT "mtdparts=" MTDIDS_NAME_STR ":" \ - "128k(spl)," \ - "128k(spl.backup1)," \ - "128k(spl.backup2)," \ - "128k(spl.backup3)," \ - "1920k(u-boot)," \ - "128k(uboot.env)," \ - "5120k(kernel_a)," \ - "5120k(kernel_b)," \ - "8192k(mtdoops)," \ - "-(rootfs)" /* + * Variant 1 partition layout * chip-size = 256MiB *| name | size | address area | *------------------------------------------------------- @@ -340,8 +404,21 @@ *| rootfs | 235.500 MiB | 0x 1480000..0x fffffff | *------------------------------------------------------- */ +#define MTDIDS_NAME_STR "omap2-nand.0" +#define MTDIDS_DEFAULT "nand0=" MTDIDS_NAME_STR +#define MTDPARTS_DEFAULT_V1 "mtdparts=" MTDIDS_NAME_STR ":" \ + "128k(spl)," \ + "128k(spl.backup1)," \ + "128k(spl.backup2)," \ + "128k(spl.backup3)," \ + "1920k(u-boot)," \ + "128k(uboot.env)," \ + "5120k(kernel_a)," \ + "5120k(kernel_b)," \ + "8192k(mtdoops)," \ + "-(rootfs)" -#define DFU_ALT_INFO_NAND \ +#define DFU_ALT_INFO_NAND_V1 \ "spl part 0 1;" \ "spl.backup1 part 0 2;" \ "spl.backup2 part 0 3;" \ @@ -352,17 +429,7 @@ "kernel_b part 0 8;" \ "rootfs partubi 0 10" -#define CONFIG_COMMON_ENV_SETTINGS \ - "verify=no \0" \ - "project_dir=targetdir\0" \ - "upgrade_available=0\0" \ - "altbootcmd=run bootcmd\0" \ - "bootlimit=3\0" \ - "partitionset_active=A\0" \ - "loadaddr=0x82000000\0" \ - "kloadaddr=0x81000000\0" \ - "script_addr=0x81900000\0" \ - "console=console=ttyMTD,mtdoops console=ttyO0,115200n8 panic=5\0" \ +#define CONFIG_ENV_SETTINGS_NAND_V1 \ "nand_active_ubi_vol=rootfs_a\0" \ "nand_active_ubi_vol_A=rootfs_a\0" \ "nand_active_ubi_vol_B=rootfs_b\0" \ @@ -370,13 +437,6 @@ "nand_src_addr=0x280000\0" \ "nand_src_addr_A=0x280000\0" \ "nand_src_addr_B=0x780000\0" \ - "nfsopts=nolock rw mem=128M\0" \ - "ip_method=none\0" \ - "bootenv=uEnv.txt\0" \ - "bootargs_defaults=setenv bootargs " \ - "console=${console} " \ - "${testargs} " \ - "${optargs}\0" \ "nand_args=run bootargs_defaults;" \ "mtdparts default;" \ "setenv ${partitionset_active} true;" \ @@ -395,15 +455,15 @@ "rootfstype=${nand_root_fs_type} ip=${ip_method} " \ "console=ttyMTD,mtdoops console=ttyO0,115200n8 mtdoops.mtddev" \ "=mtdoops\0" \ - "dfu_args=run bootargs_defaults;" \ - "setenv bootargs ${bootargs} ;" \ - "mtdparts default; " \ - "led dfu 1;" \ - "led stat 0;" \ - "dfu 0 nand 0;" \ - "led dfu 0;" \ - "led stat 1;\0" \ - "dfu_alt_info=" DFU_ALT_INFO_NAND "\0" \ + COMMON_ENV_DFU_ARGS \ + "dfu_alt_info=" DFU_ALT_INFO_NAND_V1 "\0" \ + COMMON_ENV_NAND_BOOT \ + "nand read.i ${kloadaddr} ${nand_src_addr} " \ + "${nand_img_size}; bootm ${kloadaddr}\0" \ + COMMON_ENV_NAND_CMDS + +#define CONFIG_ENV_SETTINGS_V1 \ + COMMON_ENV_SETTINGS \ "net_args=run bootargs_defaults;" \ "mtdparts default;" \ "setenv bootfile ${project_dir}/kernel/uImage;" \ @@ -413,48 +473,133 @@ "nfsroot=${serverip}:${rootpath},${nfsopts} " \ "ip=${ipaddr}:${serverip}:" \ "${gatewayip}:${netmask}:${hostname}:eth0:off\0" \ - "nand_boot=echo Booting from nand; " \ - "if test ${upgrade_available} -eq 1; then " \ - "if test ${bootcount} -gt ${bootlimit}; " \ - "then " \ - "setenv upgrade_available 0;" \ - "setenv ${partitionset_active} true;" \ - "if test -n ${A}; then " \ - "setenv partitionset_active B; " \ - "env delete A; " \ - "fi;" \ - "if test -n ${B}; then " \ - "setenv partitionset_active A; " \ - "env delete B; " \ - "fi;" \ - "saveenv; " \ - "fi;" \ + "net_nfs=echo Booting from network ...; " \ + "run net_args; " \ + "tftpboot ${kloadaddr} ${serverip}:${bootfile}; " \ + "bootm ${kloadaddr}\0" + +/* + * Variant 2 partition layout + * chip-size = 256MiB + *| name | size | address area | + *------------------------------------------------------- + *| spl | 128.000 KiB | 0x 0..0x 1ffff | + *| spl.backup1 | 128.000 KiB | 0x 20000..0x 3ffff | + *| spl.backup2 | 128.000 KiB | 0x 40000..0x 5ffff | + *| spl.backup3 | 128.000 KiB | 0x 60000..0x 7ffff | + *| u-boot | 1.875 MiB | 0x 80000..0x 25ffff | + *| uboot.env0 | 512.000 KiB | 0x 260000..0x 2Dffff | + *| uboot.env1 | 512.000 KiB | 0x 2E0000..0x 35ffff | + *| rootfs | 148.000 MiB | 0x 360000..0x 975ffff | + *| mtdoops | 512.000 KiB | 0x 9760000..0x 98Dffff | + *|configuration | 104.125 MiB | 0x 97E0000..0x fffffff | + *------------------------------------------------------- + */ + +#define MTDPARTS_DEFAULT_V2 "mtdparts=" MTDIDS_NAME_STR ":" \ + "128k(spl)," \ + "128k(spl.backup1)," \ + "128k(spl.backup2)," \ + "128k(spl.backup3)," \ + "1920k(u-boot)," \ + "512k(u-boot.env0)," \ + "512k(u-boot.env1)," \ + "148m(rootfs)," \ + "512k(mtdoops)," \ + "-(configuration)" + +#define DFU_ALT_INFO_NAND_V2 \ + "spl part 0 1;" \ + "spl.backup1 part 0 2;" \ + "spl.backup2 part 0 3;" \ + "spl.backup3 part 0 4;" \ + "u-boot part 0 5;" \ + "u-boot.env0 part 0 6;" \ + "u-boot.env1 part 0 7;" \ + "rootfs partubi 0 8;" \ + "configuration partubi 0 10" + +#define CONFIG_ENV_SETTINGS_NAND_V2 \ + "nand_active_ubi_vol=rootfs_a\0" \ + "rootfs_name=rootfs\0" \ + "kernel_name=uImage\0"\ + "nand_root_fs_type=ubifs rootwait=1\0" \ + "nand_args=run bootargs_defaults;" \ + "mtdparts default;" \ + "setenv ${partitionset_active} true;" \ + "if test -n ${A}; then " \ + "setenv nand_active_ubi_vol ${rootfs_name}_a;" \ "fi;" \ - "echo set ${partitionset_active}...;" \ - "run nand_args; " \ - "nand read.i ${kloadaddr} ${nand_src_addr} " \ - "${nand_img_size}; bootm ${kloadaddr}\0" \ + "if test -n ${B}; then " \ + "setenv nand_active_ubi_vol ${rootfs_name}_b;" \ + "fi;" \ + "setenv nand_root ubi0:${nand_active_ubi_vol} rw " \ + "ubi.mtd=7,2048 ubi.mtd=9,2048;" \ + "setenv bootargs ${bootargs} " \ + "root=${nand_root} noinitrd ${mtdparts} " \ + "rootfstype=${nand_root_fs_type} ip=${ip_method} " \ + "console=ttyMTD,mtdoops console=ttyO0,115200n8 mtdoops.mtddev" \ + "=mtdoops\0" \ + COMMON_ENV_DFU_ARGS \ + "dfu_alt_info=" DFU_ALT_INFO_NAND_V2 "\0" \ + COMMON_ENV_NAND_BOOT \ + "ubi part rootfs 2048;" \ + "ubifsmount ubi0:${nand_active_ubi_vol};" \ + "ubifsload ${kloadaddr} boot/${kernel_name};" \ + "ubifsload ${loadaddr} boot/${dtb_name}.dtb;" \ + "bootm ${kloadaddr} - ${loadaddr}\0" \ + "nand_boot_backup=ubifsload ${loadaddr} boot/am335x-draco.dtb;" \ + "bootm ${kloadaddr} - ${loadaddr}\0" \ + COMMON_ENV_NAND_CMDS + +#define CONFIG_ENV_SETTINGS_V2 \ + COMMON_ENV_SETTINGS \ + "net_args=run bootargs_defaults;" \ + "mtdparts default;" \ + "setenv bootfile ${project_dir}/kernel/uImage;" \ + "setenv bootdtb ${project_dir}/kernel/dtb;" \ + "setenv rootpath /home/projects/${project_dir}/rootfs;" \ + "setenv bootargs ${bootargs} " \ + "root=/dev/nfs ${mtdparts} " \ + "nfsroot=${serverip}:${rootpath},${nfsopts} " \ + "ip=${ipaddr}:${serverip}:" \ + "${gatewayip}:${netmask}:${hostname}:eth0:off\0" \ "net_nfs=echo Booting from network ...; " \ "run net_args; " \ "tftpboot ${kloadaddr} ${serverip}:${bootfile}; " \ - "bootm ${kloadaddr}\0" \ - "flash_self=run nand_boot\0" \ - "flash_self_test=setenv testargs test; " \ - "run nand_boot\0" \ - "dfu_start=echo Preparing for dfu mode ...; " \ - "run dfu_args; \0" \ - "preboot=echo; "\ - "echo Type 'run flash_self' to use kernel and root " \ - "filesystem on memory; echo Type 'run flash_self_test' to " \ - "use kernel and root filesystem on memory, boot in test " \ - "mode; echo Not ready yet: 'run flash_nfs' to use kernel " \ - "from memory and root filesystem over NFS; echo Type " \ - "'run net_nfs' to get Kernel over TFTP and mount root " \ - "filesystem over NFS; " \ - "echo Set partitionset_active variable to 'A' " \ - "or 'B' to select kernel and rootfs partition; " \ - "echo" \ - "\0" + "tftpboot ${loadaddr} ${serverip}:${bootdtb}; " \ + "bootm ${kloadaddr} - ${loadaddr}\0" + +/* + * Variant 3 partition layout + * chip-size = 512MiB + *| name | size | address area | + *------------------------------------------------------- + *| spl | 128.000 KiB | 0x 0..0x 1ffff | + *| spl.backup1 | 128.000 KiB | 0x 20000..0x 3ffff | + *| spl.backup2 | 128.000 KiB | 0x 40000..0x 5ffff | + *| spl.backup3 | 128.000 KiB | 0x 60000..0x 7ffff | + *| u-boot | 1.875 MiB | 0x 80000..0x 25ffff | + *| uboot.env0 | 512.000 KiB | 0x 260000..0x 2Dffff | + *| uboot.env1 | 512.000 KiB | 0x 2E0000..0x 35ffff | + *| rootfs | 300.000 MiB | 0x 360000..0x12f5ffff | + *| mtdoops | 512.000 KiB | 0x12f60000..0x12fdffff | + *|configuration | 104.125 MiB | 0x12fe0000..0x1fffffff | + *------------------------------------------------------- + */ + +#define MTDPARTS_DEFAULT_V3 "mtdparts=" MTDIDS_NAME_STR ":" \ + "128k(spl)," \ + "128k(spl.backup1)," \ + "128k(spl.backup2)," \ + "128k(spl.backup3)," \ + "1920k(u-boot)," \ + "512k(u-boot.env0)," \ + "512k(u-boot.env1)," \ + "300m(rootfs)," \ + "512k(mtdoops)," \ + "-(configuration)" + #define CONFIG_NAND_OMAP_GPMC #define CONFIG_NAND_OMAP_ELM @@ -473,15 +618,12 @@ #define CONFIG_OMAP_GPIO +/* Gpio cmd support */ +#define CONFIG_CMD_GPIO + /* Watchdog */ #define CONFIG_HW_WATCHDOG -/* Stop autoboot with ESC ESC key detected */ -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_STOP_STR "\x1b\x1b" -#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \ - "press \"<Esc><Esc>\" to stop\n", bootdelay - /* Reboot after 60 sec if bootcmd fails */ #define CONFIG_RESET_TO_RETRY #define CONFIG_BOOT_RETRY_TIME 60 diff --git a/include/configs/silk.h b/include/configs/silk.h index ccfcede1ea..b105f5af31 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -44,7 +44,6 @@ #define CONFIG_SPI #define CONFIG_SPI_FLASH_BAR #define CONFIG_SH_QSPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_SPI_FLASH_QUAD #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h index 71eb81c2f7..7b4b3b0af9 100644 --- a/include/configs/smdk2410.h +++ b/include/configs/smdk2410.h @@ -75,8 +75,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_BSP #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 08381e3418..e5655fce19 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -10,7 +10,6 @@ #define __CONFIG_SMDK_H #define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_SPI_FLASH #define CONFIG_ENV_SPI_BASE 0x12D30000 #define FLASH_SIZE (0x4 << 20) #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 61f582f375..607877c95d 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -10,7 +10,6 @@ #define __CONFIG_SMDK5420_H #define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_SPI_FLASH #define CONFIG_ENV_SPI_BASE 0x12D30000 #define FLASH_SIZE (0x4 << 20) #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 080fc3a845..08a2e9f85e 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -63,10 +63,6 @@ /*********************************************************** * Command definition ***********************************************************/ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS #undef CONFIG_CMD_NAND #define CONFIG_CMD_CACHE diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 6c685965a2..70ef9395d7 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -149,14 +149,6 @@ #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* Command line configuration */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_SOURCE - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_FAT diff --git a/include/configs/snow.h b/include/configs/snow.h index a2fb3f9808..557f86c07c 100644 --- a/include/configs/snow.h +++ b/include/configs/snow.h @@ -10,7 +10,6 @@ #define __CONFIG_SNOW_H #define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_SPI_FLASH #define CONFIG_ENV_SPI_BASE 0x12D30000 #define FLASH_SIZE (0x4 << 20) #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) diff --git a/include/configs/snowball.h b/include/configs/snowball.h index 126201cf96..91aaffab6a 100644 --- a/include/configs/snowball.h +++ b/include/configs/snowball.h @@ -43,7 +43,6 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_CMD_ENV -#define CONFIG_CMD_SAVEENV #define CONFIG_ENV_OFFSET 0x0118000 #define CONFIG_SYS_MMC_ENV_DEV 0 /* SLOT2: eMMC */ @@ -79,20 +78,9 @@ /* * Commands */ -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_BDI -#define CONFIG_CMD_IMI -#define CONFIG_CMD_MISC -#define CONFIG_CMD_RUN -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_CONSOLE -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_LOADB #define CONFIG_CMD_MMC #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 -#define CONFIG_CMD_SOURCE #ifndef CONFIG_BOOTDELAY #define CONFIG_BOOTDELAY 1 diff --git a/include/configs/socfpga_arria5.h b/include/configs/socfpga_arria5.h index 70ee4c91fa..7aee1ce315 100644 --- a/include/configs/socfpga_arria5.h +++ b/include/configs/socfpga_arria5.h @@ -13,7 +13,6 @@ /* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH -#include <config_cmd_default.h> #define CONFIG_DOS_PARTITION #define CONFIG_FAT_WRITE #define CONFIG_HW_WATCHDOG @@ -26,7 +25,6 @@ #define CONFIG_CMD_EXT4 #define CONFIG_CMD_EXT4_WRITE #define CONFIG_CMD_FAT -#define CONFIG_CMD_FPGA #define CONFIG_CMD_FS_GENERIC #define CONFIG_CMD_GREPENV #define CONFIG_CMD_MII diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 5ba2f6a831..4c3366a7f1 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -81,7 +81,6 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_BAR /* @@ -187,7 +186,6 @@ unsigned int cm_get_l4_sp_clk_hz(void); #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ #define CONFIG_CADENCE_QSPI /* Enable multiple SPI NOR flash manufacturers */ -#define CONFIG_SPI_FLASH /* SPI flash subsystem */ #define CONFIG_SPI_FLASH_STMICRO /* Micron/Numonyx flash */ #define CONFIG_SPI_FLASH_SPANSION /* Spansion flash */ #define CONFIG_SPI_FLASH_MTD diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index e321381622..33d04fdc4a 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -13,7 +13,6 @@ /* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH -#include <config_cmd_default.h> #define CONFIG_DOS_PARTITION #define CONFIG_FAT_WRITE #define CONFIG_HW_WATCHDOG @@ -26,7 +25,6 @@ #define CONFIG_CMD_EXT4 #define CONFIG_CMD_EXT4_WRITE #define CONFIG_CMD_FAT -#define CONFIG_CMD_FPGA #define CONFIG_CMD_FS_GENERIC #define CONFIG_CMD_GREPENV #define CONFIG_CMD_MII diff --git a/include/configs/socrates.h b/include/configs/socrates.h index c654a0e4eb..292b5145b9 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -314,8 +314,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_BMP #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -325,7 +323,6 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_SDRAM #define CONFIG_CMD_MII -#undef CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index 30a3f509ae..f75c306b57 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -105,16 +105,11 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_NAND #define CONFIG_CMD_ENV -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_RUN #define CONFIG_CMD_SAVES #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include <config_cmd_default.h> - /* * Default Environment Varible definitions */ @@ -200,10 +195,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_MISC_INIT_R #define CONFIG_ZERO_BOOTDELAY_CHECK -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_STOP_STR " " -#define CONFIG_AUTOBOOT_PROMPT \ - "Hit SPACE in %d seconds to stop autoboot.\n", bootdelay #define CONFIG_SYS_MEMTEST_START 0x00800000 #define CONFIG_SYS_MEMTEST_END 0x04000000 diff --git a/include/configs/stamp9g20.h b/include/configs/stamp9g20.h index 5d51abfc01..086ebcfc17 100644 --- a/include/configs/stamp9g20.h +++ b/include/configs/stamp9g20.h @@ -232,12 +232,6 @@ "bootm 22000000" /* Command line & features configuration */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS - #define CONFIG_CMD_NAND #define CONFIG_CMD_USB #define CONFIG_CMD_FAT @@ -246,9 +240,6 @@ #ifdef CONFIG_MACB # define CONFIG_CMD_PING # define CONFIG_CMD_DHCP -#else -# undef CONFIG_CMD_BOOTD -# undef CONFIG_CMD_NFS #endif /* CONFIG_MACB */ #endif /* __CONFIG_H */ diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 84cc19df4f..46869dd47f 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -95,18 +95,13 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT "U-Boot > " #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_MEM -#define CONFIG_CMD_MISC #define CONFIG_CMD_TIMER #endif /* __CONFIG_H */ diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index 888d29cd0f..6379fd3ab7 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -61,9 +61,6 @@ #define CONFIG_CMD_PING #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ -#include "config_cmd_default.h" -#undef CONFIG_CMD_SAVEENV - #define CONFIG_SYS_MEMTEST_START 0x0000 #define CONFIG_SYS_MEMTEST_END 1024*1024 #define CONFIG_CMD_MEMTEST @@ -74,10 +71,7 @@ #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTCOMMAND "go 0x40040000" -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_STOP_STR " " -#define CONFIG_AUTOBOOT_PROMPT \ - "Hit SPACE in %d seconds to stop autoboot.\n", bootdelay + #define CONFIG_OF_SEPARATE #define CONFIG_OF_CONTROL #define CONFIG_OF_LIBFDT diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index a0817a0f80..6676f373f2 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -292,16 +292,11 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_REGINFO -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#else +#if !defined(CONFIG_SYS_RAMBOOT) #define CONFIG_CMD_ELF #endif diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index 78ac0801d5..5b1f3ab403 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -322,13 +322,10 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_SNTP #define CONFIG_CMD_REGINFO @@ -341,10 +338,7 @@ #define CONFIG_CMD_MII #endif -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#else +#if !defined(CONFIG_SYS_RAMBOOT) #define CONFIG_CMD_ELF #endif diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h index a3c9408518..ea079eb5f7 100644 --- a/include/configs/sun4i.h +++ b/include/configs/sun4i.h @@ -18,7 +18,6 @@ #endif #define CONFIG_SUNXI_USB_PHYS 3 -#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18, 19, 20, 21, 22, 24} /* * Include common sunxi configuration where most the settings are diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h index 8e13df58bd..d257659903 100644 --- a/include/configs/sun5i.h +++ b/include/configs/sun5i.h @@ -19,9 +19,6 @@ #define CONFIG_SUNXI_USB_PHYS 2 -/* \todo A13 only defines port 19, whereas A10s requires each of these */ -#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18, 19} - /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index a0ebc7e977..93863b59bc 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -27,8 +27,6 @@ #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_TIMER_CLK_FREQ 24000000 -#define CONFIG_NAND_SUNXI_GPC_PORTS {24, 25, 26} - /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index 3d26ce8d4a..56101a9ffc 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -24,8 +24,6 @@ #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_TIMER_CLK_FREQ 24000000 -#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18, 19, 20, 21, 22, 24} - /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h index fe8c511448..4fc6365008 100644 --- a/include/configs/sun8i.h +++ b/include/configs/sun8i.h @@ -23,10 +23,8 @@ #define CONFIG_ARMV7_PSCI 1 #if defined(CONFIG_MACH_SUN8I_A23) #define CONFIG_ARMV7_PSCI_NR_CPUS 2 -#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18} #elif defined(CONFIG_MACH_SUN8I_A33) #define CONFIG_ARMV7_PSCI_NR_CPUS 4 -#define CONFIG_NAND_SUNXI_GPC_PORTS {16} #else #error Unsupported sun8i variant #endif diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 07db736d31..9576bc1a20 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -126,6 +126,7 @@ #define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SUNXI_AHCI +#define CONFIG_SYS_64BIT_LBA #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ @@ -133,8 +134,6 @@ #define CONFIG_CMD_SCSI #endif -#define CONFIG_CMD_MEMORY - #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG #define CONFIG_INITRD_TAG @@ -147,10 +146,8 @@ #define CONFIG_CMD_MMC #define CONFIG_MMC_SUNXI #define CONFIG_MMC_SUNXI_SLOT 0 -#if !defined(CONFIG_SPL_NAND_SUPPORT) #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ -#endif /* CONFIG_SPL_NAND_SUPPORT */ #endif /* 4MB of malloc() pool */ @@ -159,7 +156,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_CMD_ECHO #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ @@ -187,9 +183,6 @@ #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_FPGA - #define CONFIG_FAT_WRITE /* enable write access */ #define CONFIG_SPL_FRAMEWORK @@ -356,24 +349,6 @@ extern int soft_i2c_gpio_scl; #define CONFIG_ENV_IS_NOWHERE #endif -#ifdef CONFIG_SPL_NAND_SUPPORT -#define CONFIG_NAND -#define CONFIG_SYS_NAND_SELF_INIT -#define CONFIG_NAND_SUNXI -#define CONFIG_CMD_SPL_WRITE_SIZE 0x000400 -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x008000 - -/* \todo Make these parameterisable in kernel config ? */ -#define CONFIG_NAND_SUNXI_PAGE_SIZE 8192 -#define CONFIG_NAND_SUNXI_ECC_STEP 1024 -#define CONFIG_NAND_SUNXI_ECC_STRENGTH 40 -#define CONFIG_NAND_SUNXI_ADDR_CYCLES 5 - -#ifndef CONFIG_NAND_SUNXI_GPC_PORTS -#error "No NAND GPC ports defined, NAND unsupported" -#endif -#endif /* CONFIG_SPL_NAND_SUPPORT */ - #define CONFIG_MISC_INIT_R #define CONFIG_SYS_CONSOLE_IS_IN_ENV diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index efd76da119..658f8b2440 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -273,8 +273,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_ERRATA diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 30bc2be74d..34f1228140 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -100,8 +100,6 @@ #define CONFIG_USB_STORAGE /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_DHCP #define CONFIG_CMD_EXT2 /* EXT2 Support */ @@ -110,15 +108,11 @@ #define CONFIG_CMD_I2C /* I2C serial bus support */ #define CONFIG_CMD_MII #define CONFIG_CMD_MMC /* MMC support */ -#define CONFIG_CMD_NFS #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_PING #define CONFIG_CMD_USB #define CONFIG_CMD_EEPROM -#undef CONFIG_CMD_FLASH /* only NAND on the SOM */ -#undef CONFIG_CMD_IMLS - #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 @@ -260,6 +254,7 @@ #define CONFIG_SYS_NAND_ECCSIZE 256 #define CONFIG_SYS_NAND_ECCBYTES 3 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW +#define CONFIG_NAND_OMAP_GPMC_PREFETCH #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 49ed79ffbc..c8ec79b196 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -94,8 +94,6 @@ #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_CACHE #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ @@ -112,11 +110,6 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ - #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_OMAP34XX diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 2cf4558daa..d5b93eb6e7 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -70,14 +70,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_SOURCE - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_NAND @@ -139,7 +131,6 @@ #define CONFIG_SPI #define CONFIG_CMD_SPI #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_ATMEL_SPI #define CONFIG_SPI_FLASH_STMICRO #define TAURUS_SPI_MASK (1 << 4) diff --git a/include/configs/tb100.h b/include/configs/tb100.h index b2b4b1037f..42817aee76 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -68,8 +68,6 @@ /* * Command line configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_PING diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index cfee2c3b84..fa651c1c98 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -38,7 +38,6 @@ /* SPI */ #define CONFIG_TEGRA20_SLINK #define CONFIG_TEGRA_SLINK_CTRLS 6 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 24000000 diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 0cea795de1..483222fbcf 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -40,8 +40,14 @@ #define STDOUT_LCD "" #endif +#ifdef CONFIG_CROS_EC_KEYB +#define STDOUT_CROS_EC ",cros-ec-keyb" +#else +#define STDOUT_CROS_EC "" +#endif + #define TEGRA_DEVICE_SETTINGS \ - "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB "\0" \ + "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC "\0" \ "stdout=serial" STDOUT_LCD "\0" \ "stderr=serial" STDOUT_LCD "\0" \ "" @@ -52,13 +58,18 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#ifndef CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS +#define CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ TEGRA_DEVICE_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ "fdt_high=ffffffff\0" \ "initrd_high=ffffffff\0" \ BOOTENV \ - BOARD_EXTRA_ENV_SETTINGS + BOARD_EXTRA_ENV_SETTINGS \ + CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS #if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) || defined(CONFIG_TEGRA114_SPI) #define CONFIG_TEGRA_SPI diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 0bac9ad5c4..7b4c0d7063 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -67,16 +67,6 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_BAUDRATE 115200 -/* include default commands */ -#include <config_cmd_default.h> - -/* remove unused commands */ -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration support */ -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_NFS /* NFS support */ - /* turn on command-line edit/hist/auto */ #define CONFIG_COMMAND_HISTORY @@ -104,7 +94,7 @@ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) diff --git a/include/configs/dxr2.h b/include/configs/thuban.h index 76e6cac77c..40244689d9 100644 --- a/include/configs/dxr2.h +++ b/include/configs/thuban.h @@ -10,27 +10,28 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __CONFIG_DXR2_H -#define __CONFIG_DXR2_H - -#define CONFIG_SIEMENS_DXR2 -#define MACH_TYPE_DXR2 4315 -#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_DXR2 +#ifndef __CONFIG_THUBAN_H +#define __CONFIG_THUBAN_H #include "siemens-am33x-common.h" -#define CONFIG_SYS_MPUCLK 275 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_SYS_MPUCLK 300 #define DDR_PLL_FREQ 303 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC -#define BOARD_DFU_BUTTON_GPIO 27 -#define BOARD_DFU_BUTTON_LED 64 /* red LED */ -#define BOARD_STATUS_LED 103 /* green LED */ +#define BOARD_DFU_BUTTON_GPIO 27 /* Use as default */ #define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ +#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + "button_dfu0=27\0" \ + "led0=103,1,0\0" \ + "led1=64,0,1\0" + #undef CONFIG_DOS_PARTITION #undef CONFIG_CMD_FAT +#define CONFIG_BOARD_LATE_INIT /* Physical Memory Map */ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ @@ -57,14 +58,25 @@ /* Watchdog */ #define CONFIG_OMAP_WATCHDOG +/* Define own nand partitions */ +#define CONFIG_ENV_OFFSET_REDUND 0x2E0000 +#define CONFIG_ENV_SIZE_REDUND 0x2000 +#define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) + + +#define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_V2 + #ifndef CONFIG_SPL_BUILD /* Default env settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "hostname=dxr2\0" \ + "hostname=thuban\0" \ "nand_img_size=0x400000\0" \ "optargs=\0" \ - CONFIG_COMMON_ENV_SETTINGS + "preboot=draco_led 0\0" \ + CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + CONFIG_ENV_SETTINGS_V2 \ + CONFIG_ENV_SETTINGS_NAND_V2 #ifndef CONFIG_RESTORE_FLASH /* set to negative value for no autoboot */ @@ -76,6 +88,7 @@ "reset; " \ "fi;" \ "run nand_boot;" \ +"run nand_boot_backup;" \ "reset;" @@ -90,4 +103,4 @@ "fi" #endif #endif /* CONFIG_SPL_BUILD */ -#endif /* ! __CONFIG_DXR2_H */ +#endif /* ! __CONFIG_THUBAN_H */ diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 372a02be0e..fcfb70e309 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -38,8 +38,6 @@ #define CONFIG_INITRD_TAG /* for ramdisk support */ /* commands to include */ -# include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_VERSION_VARIABLE @@ -102,8 +100,6 @@ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_CMD_ECHO - /* max number of command args */ #define CONFIG_SYS_MAXARGS 16 diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 27a3dd1366..8d52057419 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -32,8 +32,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG /* required for ramdisk support */ -#include <config_cmd_default.h> /* u-boot default commands */ - #define CONFIG_VERSION_VARIABLE #define CONFIG_DISPLAY_CPUINFO @@ -61,7 +59,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ #define CONFIG_CMD_ASKEN -#define CONFIG_CMD_ECHO #define CONFIG_OMAP_GPIO #define CONFIG_MMC #define CONFIG_GENERIC_MMC diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index f8829425a5..0aea7d12ec 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -166,17 +166,7 @@ #define CONFIG_CMD_MTDPARTS #endif -/* - * For commands to use, we take the default list and add a few other - * useful commands. Note that we must have set CONFIG_SYS_NO_FLASH - * prior to this include, in order to skip a few commands. When we do - * have flash, if we expect these commands they must be enabled in that - * config. If desired, a specific list of desired commands can be used - * instead. - */ -#include <config_cmd_default.h> #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_ECHO #define CONFIG_CMD_BOOTZ #define CONFIG_SUPPORT_RAW_INITRD @@ -259,6 +249,11 @@ #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_FAT_SUPPORT +#define CONFIG_SPL_EXT_SUPPORT +#endif + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ #endif /* General parts of the framework, required. */ @@ -301,7 +296,8 @@ "run netloadfdt; " \ "run netargs; " \ "bootz ${loadaddr} - ${fdtaddr}\0" - +#else +#define NETARGS "" #endif #endif /* __CONFIG_TI_ARMV7_COMMON_H__ */ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 6c3380441d..e96613406b 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -78,9 +78,6 @@ #define CONFIG_USB_TTY 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 -/* Per-Soc commands */ -#undef CONFIG_CMD_NFS - /* * Environment setup */ @@ -166,9 +163,6 @@ #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (128 << 20)) -/* SPL: Allow to use an EXT partition */ -#define CONFIG_SPL_EXT_SUPPORT - #ifdef CONFIG_NAND #define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ #endif diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 4faffef047..f3e5a7587d 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -57,9 +57,6 @@ #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK 48000000 -/* Per-SoC commands */ -#undef CONFIG_CMD_NFS - /* * Environment setup */ @@ -71,6 +68,7 @@ #define DFUARGS #endif +#ifndef CONFIG_SPL_BUILD #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ @@ -146,6 +144,7 @@ "setenv mmcroot /dev/mmcblk0p2 rw; " \ "run mmcboot;" \ "" +#endif /* diff --git a/include/configs/tk71.h b/include/configs/tk71.h index a9c6d2e601..46e8c90b45 100644 --- a/include/configs/tk71.h +++ b/include/configs/tk71.h @@ -33,7 +33,6 @@ #define CONFIG_DOS_PARTITION #define CONFIG_SUPPORT_VFAT -#include <config_cmd_default.h> #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_EXT2 diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 4859e03890..78a8e399c6 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -22,6 +22,13 @@ /* #endif */ +/* place code in last 4 MiB of RAM */ +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#define CONFIG_SYS_TEXT_BASE 0x2fc00000 +#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) +#define CONFIG_SYS_TEXT_BASE 0x4fc00000 +#endif + #include "mx6_common.h" #if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) @@ -40,7 +47,6 @@ #define CONFIG_MXC_SPI /* SPI Flash */ -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define TQMA6_SPI_FLASH_SECTOR_SIZE SZ_64K @@ -114,14 +120,6 @@ /* Command definition */ #define CONFIG_CMD_BMODE -#define CONFIG_CMD_ITEST - -/* place code in last 4 MiB of RAM */ -#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) -#define CONFIG_SYS_TEXT_BASE 0x2fc00000 -#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) -#define CONFIG_SYS_TEXT_BASE 0x4fc00000 -#endif #define CONFIG_ENV_SIZE (SZ_8K) /* Size of malloc() pool */ @@ -367,10 +365,6 @@ "panicboot=echo No boot device !!! reset\0" \ TQMA6_EXTRA_BOOTDEV_ENV_SETTINGS \ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - #define CONFIG_STACKSIZE (128u * SZ_1K) /* Physical Memory Map */ diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h index 88c00679b6..2f52598f2e 100644 --- a/include/configs/tqma6_mba6.h +++ b/include/configs/tqma6_mba6.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2013, 2014 Markus Niebel <Markus.Niebel@tq-group.com> + * Copyright (C) 2013 - 2015 Markus Niebel <Markus.Niebel@tq-group.com> * * Configuration settings for the TQ Systems TQMa6<Q,S> module. * @@ -11,7 +11,7 @@ #if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) #define CONFIG_DEFAULT_FDT_FILE "imx6dl-mba6x.dtb" -#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q) +#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) #define CONFIG_DEFAULT_FDT_FILE "imx6q-mba6x.dtb" #endif diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index b004d099e1..23bf599ec5 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -149,8 +149,6 @@ #define CONFIG_SYS_NAND_MAX_ECCPOS 56 /* commands to include */ -#include <config_cmd_default.h> - #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_I2C /* I2C serial bus support */ @@ -162,9 +160,6 @@ #define CONFIG_CMD_UBIFS /* UBIFS commands */ #define CONFIG_LZO /* LZO is needed for UBIFS */ -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */ /* needed for ubi */ diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index 848ef33f20..2db38e5b93 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -24,7 +24,6 @@ /* SPI */ #define CONFIG_TEGRA20_SFLASH -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_CMD_SPI diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h index b7804d2872..8368931e7b 100644 --- a/include/configs/trizepsiv.h +++ b/include/configs/trizepsiv.h @@ -63,10 +63,7 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_FAT -#define CONFIG_CMD_IMLS #define CONFIG_CMD_PING #define CONFIG_CMD_USB diff --git a/include/configs/tseries.h b/include/configs/tseries.h index f3f71f11a6..6a1835efe6 100644 --- a/include/configs/tseries.h +++ b/include/configs/tseries.h @@ -162,7 +162,7 @@ BUR_COMMON_ENV \ "kernel=zImage\0" \ "ramdisk=rootfs.cpio.uboot\0" \ "console=ttyO0,115200n8\0" \ -"optargs=consoleblank=0 quiet lpj=1191936 panic=2\0" \ +"optargs=consoleblank=0 quiet panic=2\0" \ "nfsroot=/tftpboot/tseries/rootfs-small\0" \ "nfsopts=nolock\0" \ "ramargs=setenv bootargs ${optargs} console=${console} root=/dev/ram0\0" \ @@ -266,7 +266,6 @@ MMCARGS #define CONFIG_OMAP3_SPI #define CONFIG_CMD_SPI #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SF_DEFAULT_SPEED 24000000 diff --git a/include/configs/tt01.h b/include/configs/tt01.h index cf169a4c89..9501a830d5 100644 --- a/include/configs/tt01.h +++ b/include/configs/tt01.h @@ -187,13 +187,9 @@ /* * Command definition */ - -#include <config_cmd_default.h> - #define CONFIG_CMD_DATE #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_NAND /* * #define CONFIG_CMD_NAND_LOCK_UNLOCK the NAND01... chip does not support diff --git a/include/configs/tx25.h b/include/configs/tx25.h index 622bd53440..e7b006c2d4 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -122,7 +122,6 @@ #define CONFIG_SYS_LONGHELP /* U-Boot commands */ -#include <config_cmd_default.h> #define CONFIG_CMD_NAND #define CONFIG_CMD_CACHE diff --git a/include/configs/u8500_href.h b/include/configs/u8500_href.h index 5302b1fb81..6a225710c2 100644 --- a/include/configs/u8500_href.h +++ b/include/configs/u8500_href.h @@ -62,20 +62,9 @@ /* * Commands */ -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_BDI -#define CONFIG_CMD_IMI -#define CONFIG_CMD_MISC -#define CONFIG_CMD_RUN -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_CONSOLE -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_LOADB #define CONFIG_CMD_MMC #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 -#define CONFIG_CMD_SOURCE #define CONFIG_CMD_I2C #ifndef CONFIG_BOOTDELAY @@ -191,7 +180,6 @@ #define CONFIG_MMC_DEV_NUM 1 #define CONFIG_CMD_ENV -#define CONFIG_CMD_SAVEENV /* CMD_ENV is obsolete but used in env_emmc.c */ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_OFFSET 0x13F80000 #define CONFIG_SYS_MMC_ENV_DEV 0 /* SLOT2: eMMC */ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 8510472d95..5c7a342d73 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -198,11 +198,6 @@ #define CONFIG_BOOTDELAY 3 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ -#define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "d" -#define CONFIG_AUTOBOOT_STOP_STR " " /* * Network Configuration diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index 84571f6e93..4774de5c9a 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -61,15 +61,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_ITEST -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_NAND diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index f29ab2d2d7..4a7702cd09 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -20,13 +20,11 @@ #define CONFIG_MXC_GPIO #include <asm/arch/imx-regs.h> -#include <config_cmd_default.h> #include <config_distro_defaults.h> /* U-Boot commands */ #define CONFIG_CMD_MEMTEST -#undef CONFIG_CMD_IMLS /* U-Boot environment */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/v38b.h b/include/configs/v38b.h index 688d60e8fb..63049aba4d 100644 --- a/include/configs/v38b.h +++ b/include/configs/v38b.h @@ -85,8 +85,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_FAT #define CONFIG_CMD_I2C #define CONFIG_CMD_IDE diff --git a/include/configs/vct.h b/include/configs/vct.h index ed9378eae8..b54519d3d1 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -83,8 +83,6 @@ /* * Commands */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_EEPROM @@ -97,8 +95,6 @@ !defined(CONFIG_VCT_SMALL_IMAGE) #define CONFIG_CMD_PING #define CONFIG_CMD_SNTP -#else -#undef CONFIG_CMD_NFS #endif /* @@ -128,11 +124,6 @@ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */ #endif /* CONFIG_CMD_USB */ -#if !defined(CONFIG_VCT_NOR) -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS -#endif - #if defined(CONFIG_VCT_NAND) #define CONFIG_CMD_NAND #endif @@ -293,10 +284,8 @@ int vct_gpio_get(int pin); */ #if defined(CONFIG_VCT_SMALL_IMAGE) #undef CONFIG_CMD_ASKENV -#undef CONFIG_CMD_BDI #undef CONFIG_CMD_BEDBUG #undef CONFIG_CMD_CACHE -#undef CONFIG_CMD_CONSOLE #undef CONFIG_CMD_DHCP #undef CONFIG_CMD_EEPROM #undef CONFIG_CMD_EEPROM @@ -305,16 +294,11 @@ int vct_gpio_get(int pin); #undef CONFIG_CMD_I2C #undef CONFIG_CMD_I2C #undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_ITEST -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_LOADY #undef CONFIG_CMD_MII -#undef CONFIG_CMD_MISC #undef CONFIG_CMD_PING #undef CONFIG_CMD_REGINFO #undef CONFIG_CMD_SNTP -#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_STRINGS #undef CONFIG_CMD_TERMINAL #undef CONFIG_CMD_USB diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 107f01a07e..a88216c6ec 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -331,8 +331,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII #define CONFIG_CMD_PING diff --git a/include/configs/venice2.h b/include/configs/venice2.h index bfe5298bf5..1d9d053b35 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -40,7 +40,6 @@ /* SPI */ #define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ #define CONFIG_TEGRA114_SPI_CTRLS 6 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 24000000 diff --git a/include/configs/versatile.h b/include/configs/versatile.h index 8c3774a735..de23375cd5 100644 --- a/include/configs/versatile.h +++ b/include/configs/versatile.h @@ -81,13 +81,8 @@ /* * Command line configuration. */ -#define CONFIG_CMD_BDI #define CONFIG_CMD_DHCP -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_IMI -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV /* * BOOTP options diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index b81dfce7aa..c36237f3eb 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -10,7 +10,6 @@ /* We use generic board and device manager for v8 Versatile Express */ #define CONFIG_SYS_GENERIC_BOARD -#define CONFIG_DM #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP #ifndef CONFIG_SEMIHOSTING @@ -114,7 +113,6 @@ #endif /* !CONFIG_GICV3 */ /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_F_LEN 0x2000 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) /* Ethernet Configuration */ @@ -130,7 +128,6 @@ #endif /* PL011 Serial Configuration */ -#define CONFIG_DM_SERIAL #define CONFIG_BAUDRATE 115200 #define CONFIG_CONS_INDEX 0 #define CONFIG_PL01X_SERIAL @@ -145,22 +142,13 @@ #define CONFIG_MENU /*#define CONFIG_MENU_SHOW*/ #define CONFIG_CMD_CACHE -#define CONFIG_CMD_BDI #define CONFIG_CMD_BOOTI #define CONFIG_CMD_UNZIP #define CONFIG_CMD_DHCP #define CONFIG_CMD_PXE #define CONFIG_CMD_ENV -#define CONFIG_CMD_IMI -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_MII #define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_RUN -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_SOURCE #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION @@ -264,7 +252,6 @@ #ifndef CONFIG_TARGET_VEXPRESS64_JUNO #define CONFIG_SYS_NO_FLASH #else -#define CONFIG_CMD_FLASH #define CONFIG_CMD_ARMFLASH #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index db78c85663..0c1da01edf 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -153,18 +153,12 @@ #define CONFIG_SYS_SERIAL1 V2M_UART1 /* Command line configuration */ -#define CONFIG_CMD_BDI #define CONFIG_CMD_DHCP #define CONFIG_CMD_PXE #define CONFIG_MENU #define CONFIG_CMD_ELF #define CONFIG_CMD_ENV -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_IMI -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_RUN #define CONFIG_CMD_BOOTZ #define CONFIG_SUPPORT_RAW_INITRD @@ -292,7 +286,6 @@ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ -#define CONFIG_CMD_SOURCE #define CONFIG_SYS_LONGHELP #define CONFIG_CMDLINE_EDITING 1 #define CONFIG_SYS_MAXARGS 16 /* max command args */ diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index dde65ed988..c5131af340 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -10,7 +10,6 @@ #define __CONFIG_H #include <asm/arch/imx-regs.h> -#include <config_cmd_default.h> #define CONFIG_VF610 @@ -43,8 +42,6 @@ #define CONFIG_SYS_UART_PORT (1) #define CONFIG_BAUDRATE 115200 -#undef CONFIG_CMD_IMLS - /* NAND support */ #define CONFIG_CMD_NAND #define CONFIG_CMD_NAND_TRIMFFS @@ -103,7 +100,6 @@ #ifdef CONFIG_FSL_QSPI #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SPANSION #define FSL_QSPI_FLASH_SIZE (1 << 24) #define FSL_QSPI_FLASH_NUM 2 diff --git a/include/configs/vision2.h b/include/configs/vision2.h index 41680c4caf..93c7348981 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -50,7 +50,6 @@ #define CONFIG_FSL_SF #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO /* @@ -124,10 +123,7 @@ * Command definition ***********************************************************/ -#include <config_cmd_default.h> - #define CONFIG_CMD_SPI -#undef CONFIG_CMD_IMLS #define CONFIG_BOOTDELAY 3 diff --git a/include/configs/vl_ma2sc.h b/include/configs/vl_ma2sc.h index 7dfb6da357..e4958ce565 100644 --- a/include/configs/vl_ma2sc.h +++ b/include/configs/vl_ma2sc.h @@ -83,12 +83,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_LOADS - #define CONFIG_CMD_BMP #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index c7730fc862..39982741ec 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -357,8 +357,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_I2C #define CONFIG_CMD_MII #define CONFIG_CMD_PING @@ -374,7 +372,6 @@ #if defined(CONFIG_SYS_RAMBOOT) #undef CONFIG_CMD_ENV - #undef CONFIG_CMD_LOADS #endif #define CONFIG_CMD_ELF diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index 0886ba3a9c..95a69b3978 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -67,20 +67,15 @@ /* * Bootloader Components Configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ENV -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_MMC #define CONFIG_CMD_USB #undef CONFIG_LCD #define CONFIG_CMD_IDE #ifdef CONFIG_ONENAND -#undef CONFIG_CMD_FLASH #define CONFIG_CMD_ONENAND #else -#define CONFIG_CMD_FLASH #undef CONFIG_CMD_ONENAND #endif diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 0144e16131..f05b55a0e2 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -192,10 +192,14 @@ "bootz; " \ "fi;\0" \ "findfdt="\ - "if test $board_rev = MX6Q ; then " \ + "if test $board_name = C1 && test $board_rev = MX6Q ; then " \ "setenv fdtfile imx6q-wandboard.dtb; fi; " \ - "if test $board_rev = MX6DL ; then " \ + "if test $board_name = C1 && test $board_rev = MX6DL ; then " \ "setenv fdtfile imx6dl-wandboard.dtb; fi; " \ + "if test $board_name = B1 && test $board_rev = MX6Q ; then " \ + "setenv fdtfile imx6q-wandboard-revb1.dtb; fi; " \ + "if test $board_name = B1 && test $board_rev = MX6DL ; then " \ + "setenv fdtfile imx6dl-wandboard-revb1.dtb; fi; " \ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine dtb to use; fi; \0" \ diff --git a/include/configs/warp.h b/include/configs/warp.h index e38b425215..48e2058f5f 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -25,12 +25,10 @@ #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR #define CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE - -/* Command definition */ -#undef CONFIG_CMD_NFS +#define CONFIG_SUPPORT_EMMC_BOOT /* Watchdog */ #define CONFIG_HW_WATCHDOG @@ -93,9 +91,13 @@ #define CONFIG_CMD_DFU #define CONFIG_DFU_FUNCTION #define CONFIG_DFU_MMC -#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M +#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M #define DFU_DEFAULT_POLL_TIMEOUT 300 +/* Fuses */ +#define CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP + #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ diff --git a/include/configs/wireless_space.h b/include/configs/wireless_space.h index 036c1e427e..72190340f3 100644 --- a/include/configs/wireless_space.h +++ b/include/configs/wireless_space.h @@ -29,7 +29,6 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* no NOR or SPI flash */ -#include <config_cmd_default.h> #define CONFIG_CMD_ENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h index e8eabdb115..52d392cb16 100644 --- a/include/configs/woodburn_common.h +++ b/include/configs/woodburn_common.h @@ -82,9 +82,6 @@ /* * Command definition */ - -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 4725fc3d89..15ee28414d 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -177,11 +177,6 @@ #define CONFIG_ENV_ADDR 0x80000100 /* - * U-Boot Commands - */ -#include <config_cmd_default.h> - -/* * Boot Linux */ #define CONFIG_CMDLINE_TAG diff --git a/include/configs/x600.h b/include/configs/x600.h index d235da4ad6..1d4c1a9826 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -105,24 +105,18 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV -#define CONFIG_CMD_FPGA #define CONFIG_CMD_FPGA_LOADMK #define CONFIG_CMD_GPIO #define CONFIG_CMD_I2C -#define CONFIG_CMD_MEMORY #define CONFIG_CMD_MII #define CONFIG_CMD_MTDPARTS #define CONFIG_CMD_NAND #define CONFIG_CMD_PING -#define CONFIG_CMD_RUN #define CONFIG_CMD_SAVES #define CONFIG_CMD_UBI #define CONFIG_CMD_UBIFS #define CONFIG_LZO -/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include <config_cmd_default.h> - #define CONFIG_BOOTDELAY 3 #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ @@ -151,10 +145,6 @@ #define CONFIG_LOOPW /* enable loopw command */ #define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ #define CONFIG_ZERO_BOOTDELAY_CHECK -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_STOP_STR " " -#define CONFIG_AUTOBOOT_PROMPT \ - "Hit SPACE in %d seconds to stop autoboot.\n", bootdelay #define CONFIG_SYS_MEMTEST_START 0x00800000 #define CONFIG_SYS_MEMTEST_END 0x04000000 diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index b6a76fe075..e0e7fca9f8 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -14,7 +14,6 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MISC_INIT_R -#define CONFIG_NR_DRAM_BANKS 8 #define CONFIG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_CACHE_MRC_SIZE_KB 512 diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index bf4758e3b3..349b06cb76 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -21,6 +21,7 @@ #define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_DISPLAY_CPUINFO #define CONFIG_LAST_STAGE_INIT +#define CONFIG_NR_DRAM_BANKS 8 #define CONFIG_LMB #define CONFIG_OF_LIBFDT @@ -36,6 +37,7 @@ #define CONFIG_SCSI_AHCI #ifdef CONFIG_SCSI_AHCI #define CONFIG_LIBATA +#define CONFIG_LBA48 #define CONFIG_SYS_64BIT_LBA #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 @@ -75,10 +77,6 @@ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SUPPORT_VFAT -/************************************************************ - * ATAPI support (experimental) - ************************************************************/ -#define CONFIG_ATAPI /************************************************************ * DISK Partition support @@ -102,36 +100,15 @@ /*----------------------------------------------------------------------- * Command line configuration. */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_BDI -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_CONSOLE #define CONFIG_CMD_DATE -#define CONFIG_CMD_ECHO -#undef CONFIG_CMD_FLASH -#define CONFIG_CMD_FPGA #define CONFIG_CMD_FPGA_LOADMK #define CONFIG_CMD_GPIO -#define CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_IO #define CONFIG_CMD_IRQ -#define CONFIG_CMD_ITEST -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC -#undef CONFIG_CMD_NFS #define CONFIG_CMD_PCI #define CONFIG_CMD_PING -#define CONFIG_CMD_RUN -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_SETGETDCR -#define CONFIG_CMD_SOURCE #define CONFIG_CMD_TIME #define CONFIG_CMD_GETTIME -#define CONFIG_CMD_XIMG #define CONFIG_CMD_SCSI #define CONFIG_CMD_FAT @@ -194,7 +171,6 @@ * FLASH configuration */ #define CONFIG_ICH_SPI -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_MACRONIX #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SPI_FLASH_GIGADEVICE @@ -246,6 +222,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_STD_DEVICES_SETTINGS \ + "pciconfighost=1\0" \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \ "othbootargs=acpi=off\0" \ diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h index fcb76a27a2..a072464c10 100644 --- a/include/configs/xaeniax.h +++ b/include/configs/xaeniax.h @@ -59,11 +59,8 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG -#define CONFIG_CMD_NFS #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SNTP diff --git a/include/configs/xfi3.h b/include/configs/xfi3.h index 8e6b365364..0551580ccf 100644 --- a/include/configs/xfi3.h +++ b/include/configs/xfi3.h @@ -11,7 +11,6 @@ /* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH -#include <config_cmd_default.h> #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DOS_PARTITION diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h index 4f62607ace..309d68d281 100644 --- a/include/configs/xilinx-ppc.h +++ b/include/configs/xilinx-ppc.h @@ -26,7 +26,6 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) /*Cmd*/ -#include <config_cmd_default.h> #define CONFIG_CMD_ASKENV #define CONFIG_CMD_CACHE #define CONFIG_CMD_DIAG @@ -41,8 +40,6 @@ #undef CONFIG_CMD_PING #undef CONFIG_CMD_DHCP #undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_NFS /*Misc*/ #define CONFIG_BOOTDELAY 5/* autoboot after 5 seconds */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 880d29ca71..ad82ed6289 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -69,14 +69,12 @@ #define CONFIG_CMD_EXT4 #define CONFIG_CMD_FAT #define CONFIG_CMD_FS_GENERIC -#define CONFIG_CMD_MEMORY #define CONFIG_DOS_PARTITION #define CONFIG_CMD_ELF #define CONFIG_MP /* SPI */ #ifdef CONFIG_ZYNQ_SPI -# define CONFIG_SPI_FLASH # define CONFIG_SPI_FLASH_SST # define CONFIG_CMD_SF #endif diff --git a/include/configs/xpedite1000.h b/include/configs/xpedite1000.h index ea747c8e6d..4fafb5a77b 100644 --- a/include/configs/xpedite1000.h +++ b/include/configs/xpedite1000.h @@ -187,21 +187,17 @@ extern void out32(unsigned int, unsigned long); /* * Command configuration */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII #define CONFIG_CMD_PCI #define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_SNTP /* diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index a762ec09b3..669aa53c91 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -526,8 +526,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Command configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -536,8 +534,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CMD_DTT #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ #define CONFIG_CMD_JFFS2 diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index 9484ccb6ae..34a124c9d9 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -311,15 +311,11 @@ /* * Command configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index 0391459a6a..58ace2cf48 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -381,8 +381,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* * Command configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -391,7 +389,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_CMD_DTT #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII @@ -401,7 +398,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_CMD_PCI #define CONFIG_CMD_PCI_ENUM #define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_SNTP #define CONFIG_CMD_REGINFO diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 09c248a4c5..765aaadf10 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -367,15 +367,12 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* * Command configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_DTT #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII @@ -386,7 +383,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_CMD_PCI_ENUM #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB diff --git a/include/configs/zeus.h b/include/configs/zeus.h index cc1b96006a..2bc4e1a9fe 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -51,8 +51,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_CACHE #define CONFIG_CMD_DHCP @@ -62,7 +60,6 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 49ca978a52..cff3ba837c 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -62,11 +62,7 @@ /* * Bootloader Components Configuration */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_NFS #define CONFIG_CMD_ENV -#undef CONFIG_CMD_IMLS #define CONFIG_CMD_MMC #define CONFIG_CMD_SPI diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index d57e665822..af7cc49751 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -77,7 +77,6 @@ /* * Command line configuration. */ -#include <config_cmd_default.h> #define CONFIG_CMD_CACHE /* @@ -150,10 +149,6 @@ #define CONFIG_PREBOOT "" #define CONFIG_BOOTDELAY 5 -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "boot in %d s\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "delaygs" -#define CONFIG_AUTOBOOT_STOP_STR "stopgs" /* * Size of malloc() pool diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 1a52e7d538..5526214df2 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -68,7 +68,6 @@ /* SPI */ #ifdef CONFIG_ZYNQ_SPI -# define CONFIG_SPI_FLASH # define CONFIG_SPI_FLASH_SST # define CONFIG_CMD_SF #endif @@ -204,7 +203,6 @@ # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE # define CONFIG_ENV_OFFSET 0xE0000 -# define CONFIG_CMD_SAVEENV #endif /* Default environment */ @@ -272,7 +270,6 @@ #define CONFIG_FPGA #define CONFIG_FPGA_XILINX #define CONFIG_FPGA_ZYNQPL -#define CONFIG_CMD_FPGA #define CONFIG_CMD_FPGA_LOADMK #define CONFIG_CMD_FPGA_LOADP #define CONFIG_CMD_FPGA_LOADBP @@ -300,8 +297,6 @@ #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" /* Commands */ -#include <config_cmd_default.h> - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 4d737f46c5..c7310d7ca0 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -39,20 +39,18 @@ enum uclass_id { UCLASS_PCH, /* x86 platform controller hub */ UCLASS_PCI, /* PCI bus */ UCLASS_PCI_GENERIC, /* Generic PCI bus device */ + UCLASS_PMIC, /* PMIC I/O device */ + UCLASS_REGULATOR, /* Regulator device */ UCLASS_RTC, /* Real time clock device */ UCLASS_SERIAL, /* Serial UART */ UCLASS_SPI, /* SPI bus */ - UCLASS_SPI_GENERIC, /* Generic SPI flash target */ UCLASS_SPI_FLASH, /* SPI flash */ + UCLASS_SPI_GENERIC, /* Generic SPI flash target */ UCLASS_THERMAL, /* Thermal sensor */ UCLASS_USB, /* USB bus */ UCLASS_USB_DEV_GENERIC, /* USB generic device */ UCLASS_USB_HUB, /* USB hub */ - /* Power Management */ - UCLASS_PMIC, /* PMIC I/O device */ - UCLASS_REGULATOR, /* REGULATOR device */ - UCLASS_COUNT, UCLASS_INVALID = -1, }; diff --git a/include/dt-bindings/gpio/x86-gpio.h b/include/dt-bindings/gpio/x86-gpio.h new file mode 100644 index 0000000000..7f1de30c0b --- /dev/null +++ b/include/dt-bindings/gpio/x86-gpio.h @@ -0,0 +1,31 @@ +/* + * This header provides constants for binding intel,x86-pinctrl. + */ + +#ifndef _DT_BINDINGS_GPIO_X86_GPIO_H +#define _DT_BINDINGS_GPIO_X86_GPIO_H + +#include <dt-bindings/gpio/gpio.h> + +#define GPIO_MODE_NATIVE 0 +#define GPIO_MODE_GPIO 1 + +#define GPIO_MODE_FUNC0 0 +#define GPIO_MODE_FUNC1 1 +#define GPIO_MODE_FUNC2 2 +#define GPIO_MODE_FUNC3 3 +#define GPIO_MODE_FUNC4 4 +#define GPIO_MODE_FUNC5 5 +#define GPIO_MODE_FUNC6 6 + +#define PIN_INPUT 0 +#define PIN_OUTPUT 1 + +#define PIN_INPUT_NOPULL 0 +#define PIN_INPUT_PULLUP 1 +#define PIN_INPUT_PULLDOWN 2 + +#define PULL_STR_2K 0 +#define PULL_STR_20K 2 + +#endif diff --git a/include/dt-bindings/interrupt-router/intel-irq.h b/include/dt-bindings/interrupt-router/intel-irq.h new file mode 100644 index 0000000000..5092f33dfa --- /dev/null +++ b/include/dt-bindings/interrupt-router/intel-irq.h @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _DT_BINDINGS_INTEL_IRQ_H_ +#define _DT_BINDINGS_INTEL_IRQ_H_ + +/* PCI interrupt pin */ +#define INTA 1 +#define INTB 2 +#define INTC 3 +#define INTD 4 + +/* PIRQs */ +#define PIRQA 0 +#define PIRQB 1 +#define PIRQC 2 +#define PIRQD 3 +#define PIRQE 4 +#define PIRQF 5 +#define PIRQG 6 +#define PIRQH 7 + +/* PCI bdf encoding */ +#ifndef PCI_BDF +#define PCI_BDF(b, d, f) ((b) << 16 | (d) << 11 | (f) << 8) +#endif + +#endif /* _DT_BINDINGS_INTEL_IRQ_H_ */ diff --git a/include/fdt_support.h b/include/fdt_support.h index 5d4f28dc78..0edc4fa5b1 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -16,8 +16,35 @@ u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell, const char *prop, const u32 dflt); u32 fdt_getprop_u32_default(const void *fdt, const char *path, const char *prop, const u32 dflt); + +/** + * Add data to the root of the FDT before booting the OS. + * + * See doc/device-tree-bindings/root.txt + * + * @param fdt FDT address in memory + * @return 0 if ok, or -FDT_ERR_... on error + */ +int fdt_root(void *fdt); + +/** + * Add chosen data the FDT before booting the OS. + * + * In particular, this adds the kernel command line (bootargs) to the FDT. + * + * @param fdt FDT address in memory + * @return 0 if ok, or -FDT_ERR_... on error + */ int fdt_chosen(void *fdt); + +/** + * Add initrd information to the FDT before booting the OS. + * + * @param fdt FDT address in memory + * @return 0 if ok, or -FDT_ERR_... on error + */ int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end); + void do_fixup_by_path(void *fdt, const char *path, const char *prop, const void *val, int len, int create); void do_fixup_by_path_u32(void *fdt, const char *path, const char *prop, diff --git a/include/fdtdec.h b/include/fdtdec.h index 6bf5f614e8..232360341a 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -41,6 +41,12 @@ struct fdt_memory { fdt_addr_t end; }; +#ifdef CONFIG_SPL_BUILD +#define SPL_BUILD 1 +#else +#define SPL_BUILD 0 +#endif + #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && defined(SPL_DISABLE_OF_CONTROL) # define OF_CONTROL 0 @@ -122,9 +128,6 @@ static inline fdt_size_t fdt_resource_size(const struct fdt_resource *res) */ enum fdt_compat_id { COMPAT_UNKNOWN, - COMPAT_NVIDIA_TEGRA20_USB, /* Tegra20 USB port */ - COMPAT_NVIDIA_TEGRA30_USB, /* Tegra30 USB port */ - COMPAT_NVIDIA_TEGRA114_USB, /* Tegra114 USB port */ COMPAT_NVIDIA_TEGRA20_EMC, /* Tegra20 memory controller */ COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra20 memory timing table */ COMPAT_NVIDIA_TEGRA20_KBC, /* Tegra20 Keyboard */ @@ -176,8 +179,10 @@ enum fdt_compat_id { COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */ COMPAT_INTEL_ICH_SPI, /* Intel ICH7/9 SPI controller */ COMPAT_INTEL_QRK_MRC, /* Intel Quark MRC */ + COMPAT_INTEL_X86_PINCTRL, /* Intel ICH7/9 pin control */ COMPAT_SOCIONEXT_XHCI, /* Socionext UniPhier xHCI */ COMPAT_INTEL_PCH, /* Intel PCH */ + COMPAT_INTEL_IRQ_ROUTER, /* Intel Interrupt Router */ COMPAT_COUNT, }; diff --git a/include/hash.h b/include/hash.h index f4eb100de0..e6d0f1db92 100644 --- a/include/hash.h +++ b/include/hash.h @@ -158,4 +158,18 @@ int hash_lookup_algo(const char *algo_name, struct hash_algo **algop); int hash_progressive_lookup_algo(const char *algo_name, struct hash_algo **algop); +/** + * hash_parse_string() - Parse hash string into a binary array + * + * The function parses a hash string into a binary array that + * can for example easily be used to compare to hash values. + * + * @algo_name: Hash algorithm to look up + * @str: Hash string to get parsed + * @result: Binary array of the parsed hash string + * + * @return 0 if ok, -EPROTONOSUPPORT for an unknown algorithm. + */ +int hash_parse_string(const char *algo_name, const char *str, uint8_t *result); + #endif diff --git a/include/i2c.h b/include/i2c.h index ddfebc4107..9300d97e14 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -284,6 +284,12 @@ void i2c_init(int speed, int slaveaddr); */ void board_i2c_init(const void *blob); +/* + * Compatibility functions for driver model. + */ +uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); +void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); + #endif /* diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 8666413275..33669da4ed 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -482,5 +482,10 @@ int add_mtd_device(struct mtd_info *mtd); int del_mtd_device(struct mtd_info *mtd); int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int); int del_mtd_partitions(struct mtd_info *); + +int mtd_arg_off(const char *arg, int *idx, loff_t *off, loff_t *size, + loff_t *maxsize, int devtype, int chipsize); +int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off, + loff_t *size, loff_t *maxsize, int devtype, int chipsize); #endif #endif /* __MTD_MTD_H__ */ diff --git a/include/ns16550.h b/include/ns16550.h index 0607379537..4e620676c4 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -33,7 +33,7 @@ #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) #error "Please define NS16550 registers size." -#elif defined(CONFIG_SYS_NS16550_MEM32) +#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_DM_SERIAL) #define UART_REG(x) u32 x #elif (CONFIG_SYS_NS16550_REG_SIZE > 0) #define UART_REG(x) \ diff --git a/include/os.h b/include/os.h index ffbdce8464..954a48c991 100644 --- a/include/os.h +++ b/include/os.h @@ -112,6 +112,14 @@ void os_exit(int exit_code) __attribute__((noreturn)); void os_tty_raw(int fd, bool allow_sigs); /** + * Restore the tty to its original mode + * + * Call this to restore the original terminal mode, after it has been changed + * by os_tty_raw(). This is an internal function. + */ +void os_fd_restore(void); + +/** * Acquires some memory from the underlying os. * * \param length Number of bytes to be allocated diff --git a/include/pci_ids.h b/include/pci_ids.h index 2e6685112b..5771e12e72 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -2838,6 +2838,7 @@ #define PCI_DEVICE_ID_INTEL_ICH9_6 0x2930 #define PCI_DEVICE_ID_INTEL_ICH9_7 0x2916 #define PCI_DEVICE_ID_INTEL_ICH9_8 0x2918 +#define PCI_DEVICE_ID_INTEL_ICH9_AHCI 0x2922 #define PCI_DEVICE_ID_INTEL_I7_MCR 0x2c18 #define PCI_DEVICE_ID_INTEL_I7_MC_TAD 0x2c19 #define PCI_DEVICE_ID_INTEL_I7_MC_RAS 0x2c1a diff --git a/include/samsung-usb-phy-uboot.h b/include/samsung-usb-phy-uboot.h new file mode 100644 index 0000000000..9f37560f11 --- /dev/null +++ b/include/samsung-usb-phy-uboot.h @@ -0,0 +1,16 @@ +/* include/samsung-usb-phy-uboot.h + * + * Copyright (c) 2015 Samsung Electronics + * + * USB3 (DWC3) PHY uboot init + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __SAMSUNG_USB_PHY_UBOOT_H_ +#define __SAMSUNG_USB_PHY_UBOOT_H_ + +#include <asm/arch/xhci-exynos.h> + +void exynos5_usb3_phy_init(struct exynos_usb3_phy *phy); +#endif /* __SAMSUNG_USB_PHY_UBOOT_H_ */ diff --git a/include/scsi.h b/include/scsi.h index 73de7b7460..7e3759140b 100644 --- a/include/scsi.h +++ b/include/scsi.h @@ -132,6 +132,7 @@ typedef struct SCSI_cmd_block{ #define SCSI_MED_REMOVL 0x1E /* Prevent/Allow medium Removal (O) */ #define SCSI_READ6 0x08 /* Read 6-byte (MANDATORY) */ #define SCSI_READ10 0x28 /* Read 10-byte (MANDATORY) */ +#define SCSI_READ16 0x48 #define SCSI_RD_CAPAC 0x25 /* Read Capacity (MANDATORY) */ #define SCSI_RD_CAPAC10 SCSI_RD_CAPAC /* Read Capacity (10) */ #define SCSI_RD_CAPAC16 0x9e /* Read Capacity (16) */ diff --git a/include/spl.h b/include/spl.h index b2e5bf726f..d19940f2a3 100644 --- a/include/spl.h +++ b/include/spl.h @@ -11,6 +11,8 @@ #include <linux/compiler.h> #include <asm/spl.h> +/* Value in r0 indicates we booted from U-Boot */ +#define UBOOT_NOT_LOADED_FROM_SPL 0x13578642 /* Boot type */ #define MMCSD_MODE_UNDEFINED 0 @@ -82,4 +84,15 @@ int spl_load_image_ext_os(block_dev_desc_t *block_dev, int partition); #ifdef CONFIG_SPL_BOARD_INIT void spl_board_init(void); #endif + +/** + * spl_was_boot_source() - check if U-Boot booted from SPL + * + * This will normally be true, but if U-Boot jumps to second U-Boot, it will + * be false. This should be implemented by board-specific code. + * + * @return true if U-Boot booted from SPL, else false + */ +bool spl_was_boot_source(void); + #endif diff --git a/include/usb.h b/include/usb.h index c709ce2cf6..dca512d394 100644 --- a/include/usb.h +++ b/include/usb.h @@ -171,17 +171,6 @@ enum usb_init_type { * this is how the lowlevel part communicate with the outer world */ -#if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || \ - defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_OHCI_NEW) || \ - defined(CONFIG_USB_SL811HS) || defined(CONFIG_USB_ISP116X_HCD) || \ - defined(CONFIG_USB_R8A66597_HCD) || defined(CONFIG_USB_DAVINCI) || \ - defined(CONFIG_USB_OMAP3) || defined(CONFIG_USB_DA8XX) || \ - defined(CONFIG_USB_BLACKFIN) || defined(CONFIG_USB_AM35X) || \ - defined(CONFIG_USB_MUSB_DSPS) || defined(CONFIG_USB_MUSB_AM35X) || \ - defined(CONFIG_USB_MUSB_OMAP2PLUS) || defined(CONFIG_USB_MUSB_SUNXI) || \ - defined(CONFIG_USB_XHCI) || defined(CONFIG_USB_DWC2) || \ - defined(CONFIG_USB_EMUL) - int usb_lowlevel_init(int index, enum usb_init_type init, void **controller); int usb_lowlevel_stop(int index); @@ -216,12 +205,8 @@ void *poll_int_queue(struct usb_device *dev, struct int_queue *queue); * in boards init functions e.g. udc_disconnect() used for * forced device disconnection from host. */ -#elif defined(CONFIG_USB_GADGET_PXA2XX) - extern void udc_disconnect(void); -#endif - /* * board-specific hardware initialization, called by * usb drivers and u-boot commands diff --git a/include/vsprintf.h b/include/vsprintf.h index 09c8abd951..d2fcca3f5a 100644 --- a/include/vsprintf.h +++ b/include/vsprintf.h @@ -196,4 +196,6 @@ int vscnprintf(char *buf, size_t size, const char *fmt, va_list args); */ void print_grouped_ull(unsigned long long int_val, int digits); +bool str2off(const char *p, loff_t *num); +bool str2long(const char *p, ulong *num); #endif diff --git a/lib/Kconfig b/lib/Kconfig index 3c8de869b1..7ec8c98da2 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -45,7 +45,9 @@ config REGEX "setexpr". config LIB_RAND - bool + bool "Pseudo-random library support " + help + This library provides pseudo-random number generator functions. source lib/rsa/Kconfig diff --git a/lib/fdtdec.c b/lib/fdtdec.c index b586da2a56..9877849f99 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -22,9 +22,6 @@ DECLARE_GLOBAL_DATA_PTR; #define COMPAT(id, name) name static const char * const compat_names[COMPAT_COUNT] = { COMPAT(UNKNOWN, "<none>"), - COMPAT(NVIDIA_TEGRA20_USB, "nvidia,tegra20-ehci"), - COMPAT(NVIDIA_TEGRA30_USB, "nvidia,tegra30-ehci"), - COMPAT(NVIDIA_TEGRA114_USB, "nvidia,tegra114-ehci"), COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"), COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"), COMPAT(NVIDIA_TEGRA20_KBC, "nvidia,tegra20-kbc"), @@ -75,8 +72,10 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(AMS_AS3722, "ams,as3722"), COMPAT(INTEL_ICH_SPI, "intel,ich-spi"), COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"), + COMPAT(INTEL_X86_PINCTRL, "intel,x86-pinctrl"), COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"), COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"), + COMPAT(COMPAT_INTEL_IRQ_ROUTER, "intel,irq-router"), }; const char *fdtdec_get_compatible(enum fdt_compat_id id) diff --git a/lib/vsprintf.c b/lib/vsprintf.c index bedc865240..a9b8a3ae67 100644 --- a/lib/vsprintf.c +++ b/lib/vsprintf.c @@ -909,3 +909,19 @@ void print_grouped_ull(unsigned long long int_val, int digits) grab = 3; } } + +bool str2off(const char *p, loff_t *num) +{ + char *endptr; + + *num = simple_strtoull(p, &endptr, 16); + return *p != '\0' && *endptr == '\0'; +} + +bool str2long(const char *p, ulong *num) +{ + char *endptr; + + *num = simple_strtoul(p, &endptr, 16); + return *p != '\0' && *endptr == '\0'; +} diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl index 343c3fc199..4f056525bb 100644 --- a/scripts/Makefile.uncmd_spl +++ b/scripts/Makefile.uncmd_spl @@ -3,7 +3,9 @@ # TODO: Invent a better way ifdef CONFIG_SPL_BUILD +ifdef CONFIG_SPL_DISABLE_OF_CONTROL CONFIG_OF_CONTROL= +endif ifndef CONFIG_SPL_DM CONFIG_DM_SERIAL= diff --git a/scripts/kconfig/confdata.c b/scripts/kconfig/confdata.c index f88d90f202..2f778df206 100644 --- a/scripts/kconfig/confdata.c +++ b/scripts/kconfig/confdata.c @@ -155,18 +155,14 @@ static int conf_set_sym_val(struct symbol *sym, int def, int def_flags, char *p) case S_STRING: if (*p++ != '"') break; - for (p2 = p; (p2 = strpbrk(p2, "\"\\")); p2++) { - if (*p2 == '"') { - *p2 = 0; - break; - } - memmove(p2, p2 + 1, strlen(p2)); - } - if (!p2) { + /* Last char has to be a '"' */ + if (p[strlen(p) - 1] != '"') { if (def != S_DEF_AUTO) conf_warning("invalid string found"); return 1; } + /* Overwrite '"' with \0 for string termination */ + p[strlen(p) - 1] = 0; /* fall through */ case S_INT: case S_HEX: @@ -624,6 +620,7 @@ static void conf_write_symbol(FILE *fp, struct symbol *sym, struct conf_printer *printer, void *printer_arg) { const char *str; + char *str2; switch (sym->type) { case S_OTHER: @@ -631,9 +628,10 @@ static void conf_write_symbol(FILE *fp, struct symbol *sym, break; case S_STRING: str = sym_get_string_value(sym); - str = sym_escape_string_value(str); - printer->print_symbol(fp, sym, str, printer_arg); - free((void *)str); + str2 = xmalloc(strlen(str) + 3); + sprintf(str2, "\"%s\"", str); + printer->print_symbol(fp, sym, str2, printer_arg); + free((void *)str2); break; default: str = sym_get_string_value(sym); diff --git a/scripts/kconfig/symbol.c b/scripts/kconfig/symbol.c index 7caabdb51c..ab339ebbe3 100644 --- a/scripts/kconfig/symbol.c +++ b/scripts/kconfig/symbol.c @@ -912,49 +912,6 @@ const char *sym_expand_string_value(const char *in) return res; } -const char *sym_escape_string_value(const char *in) -{ - const char *p; - size_t reslen; - char *res; - size_t l; - - reslen = strlen(in) + strlen("\"\"") + 1; - - p = in; - for (;;) { - l = strcspn(p, "\"\\"); - p += l; - - if (p[0] == '\0') - break; - - reslen++; - p++; - } - - res = xmalloc(reslen); - res[0] = '\0'; - - strcat(res, "\""); - - p = in; - for (;;) { - l = strcspn(p, "\"\\"); - strncat(res, p, l); - p += l; - - if (p[0] == '\0') - break; - - strcat(res, "\\"); - strncat(res, p++, 1); - } - - strcat(res, "\""); - return res; -} - struct sym_match { struct symbol *sym; off_t so, eo; diff --git a/test/dm/pci.c b/test/dm/pci.c index 2f3ae7941b..3ab4ba811c 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -21,6 +21,17 @@ static int dm_test_pci_base(struct unit_test_state *uts) } DM_TEST(dm_test_pci_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); +/* Test that sandbox PCI bus numbering works correctly */ +static int dm_test_pci_busnum(struct unit_test_state *uts) +{ + struct udevice *bus; + + ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus)); + + return 0; +} +DM_TEST(dm_test_pci_busnum, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + /* Test that we can use the swapcase device correctly */ static int dm_test_pci_swapcase(struct unit_test_state *uts) { diff --git a/tools/buildman/kconfiglib.py b/tools/buildman/kconfiglib.py index 655cf4470f..c662b64dad 100644 --- a/tools/buildman/kconfiglib.py +++ b/tools/buildman/kconfiglib.py @@ -429,7 +429,15 @@ class Config(): If the environment variable 'srctree' was set when the Config was created, get_defconfig_filename() will first look relative to that directory before looking in the current directory; see - Config.__init__().""" + Config.__init__(). + + WARNING: A wart here is that scripts/kconfig/Makefile sometimes uses the + --defconfig=<defconfig> option when calling the C implementation of e.g. + 'make defconfig'. This option overrides the 'option defconfig_list' + symbol, meaning the result from get_defconfig_filename() might not + match what 'make defconfig' would use. That probably ought to be worked + around somehow, so that this function always gives the "expected" + result.""" if self.defconfig_sym is None: return None @@ -506,7 +514,7 @@ class Config(): For example, if FOO and BAR are tristate symbols at least one of which has the value "y", then config.eval("y && (FOO || BAR)") => "y" - This functions always yields a tristate value. To get the value of + This function always yields a tristate value. To get the value of non-bool, non-tristate symbols, use Symbol.get_value(). The result of this function is consistent with how evaluation works for @@ -1066,7 +1074,7 @@ class Config(): choice.block = self._parse_block(line_feeder, T_ENDCHOICE, choice, - None, + deps, visible_if_deps) choice._determine_actual_symbols() @@ -1326,10 +1334,21 @@ error, and you should e-mail kconfiglib@gmail.com. elif tokens.check(T_MODULES): self._warn("the 'modules' option is not supported. " "Let me know if this is a problem for you; " - "it shouldn't be that hard to implement.", + "it shouldn't be that hard to implement. " + "(Note that modules are still supported -- " + "Kconfiglib just assumes the symbol name " + "MODULES.)", filename, linenr) + elif tokens.check(T_ALLNOCONFIG_Y): + if not isinstance(stmt, Symbol): + _parse_error(line, + "the 'allnoconfig_y' option is only valid for symbols.", + filename, + linenr) + stmt.allnoconfig_y = True + else: _parse_error(line, "unrecognized option.", filename, linenr) @@ -2023,8 +2042,8 @@ def _make_and(e1, e2): T_OPTIONAL, T_PROMPT, T_DEFAULT, T_BOOL, T_TRISTATE, T_HEX, T_INT, T_STRING, T_DEF_BOOL, T_DEF_TRISTATE, - T_SELECT, T_RANGE, T_OPTION, T_ENV, - T_DEFCONFIG_LIST, T_MODULES, T_VISIBLE) = range(0, 38) + T_SELECT, T_RANGE, T_OPTION, T_ALLNOCONFIG_Y, T_ENV, + T_DEFCONFIG_LIST, T_MODULES, T_VISIBLE) = range(0, 39) # Keyword to token map keywords = { @@ -2056,6 +2075,7 @@ keywords = { "select" : T_SELECT, "range" : T_RANGE, "option" : T_OPTION, + "allnoconfig_y" : T_ALLNOCONFIG_Y, "env" : T_ENV, "defconfig_list" : T_DEFCONFIG_LIST, "modules" : T_MODULES, @@ -2080,7 +2100,7 @@ set_re = re.compile(r"CONFIG_(\w+)=(.*)") unset_re = re.compile(r"# CONFIG_(\w+) is not set") # Regular expression for finding $-references to symbols in strings -sym_ref_re = re.compile(r"\$[A-Za-z_]+") +sym_ref_re = re.compile(r"\$[A-Za-z0-9_]+") # Integers representing symbol types UNKNOWN, BOOL, TRISTATE, STRING, HEX, INT = range(0, 6) @@ -2765,6 +2785,11 @@ class Symbol(Item, _HasVisibility): and sym.get_parent().get_selection() is sym'.""" return self.is_choice_symbol_ and self.parent.get_selection() is self + def is_allnoconfig_y(self): + """Returns True if the symbol has the 'allnoconfig_y' option set; + otherwise, returns False.""" + return self.allnoconfig_y + def __str__(self): """Returns a string containing various information about the symbol.""" return self.config._get_sym_or_choice_str(self) @@ -2862,6 +2887,9 @@ class Symbol(Item, _HasVisibility): # Does the symbol get its value from the environment? self.is_from_env = False + # Does the symbol have the 'allnoconfig_y' option set? + self.allnoconfig_y = False + def _invalidate(self): if self.is_special_: return diff --git a/tools/env/fw_env.h b/tools/env/fw_env.h index d6faf34912..60c05177ff 100644 --- a/tools/env/fw_env.h +++ b/tools/env/fw_env.h @@ -6,6 +6,8 @@ */ /* Pull in the current config to define the default environment */ +#include <linux/kconfig.h> + #ifndef __ASSEMBLY__ #define __ASSEMBLY__ /* get only #defines from config.h */ #include <config.h> @@ -13,7 +15,6 @@ #else #include <config.h> #endif -#include <generated/autoconf.h> /* * To build the utility with the static configuration diff --git a/tools/ifdtool.c b/tools/ifdtool.c index 590ccc914b..1d61df19f2 100644 --- a/tools/ifdtool.c +++ b/tools/ifdtool.c @@ -462,7 +462,7 @@ static int write_regions(char *image, int size) if (ret) return ret; dump_region(i, frba); - if (region.size == 0) + if (region.size <= 0) continue; region_fd = open(region_filename(i), O_WRONLY | O_CREAT | O_TRUNC, S_IRUSR | diff --git a/tools/kwbimage.c b/tools/kwbimage.c index 9540e7eb84..1ff17cab26 100644 --- a/tools/kwbimage.c +++ b/tools/kwbimage.c @@ -420,6 +420,18 @@ static size_t image_headersz_v1(struct image_tool_params *params, *hasext = 1; } +#if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) + if (headersz > CONFIG_SYS_SPI_U_BOOT_OFFS) { + fprintf(stderr, "Error: Image header (incl. SPL image) too big!\n"); + fprintf(stderr, "header=0x%x CONFIG_SYS_SPI_U_BOOT_OFFS=0x%x!\n", + (int)headersz, CONFIG_SYS_SPI_U_BOOT_OFFS); + fprintf(stderr, "Increase CONFIG_SYS_SPI_U_BOOT_OFFS!\n"); + return 0; + } else { + headersz = CONFIG_SYS_SPI_U_BOOT_OFFS; + } +#endif + /* * The payload should be aligned on some reasonable * boundary @@ -869,16 +881,6 @@ static int kwbimage_generate(struct image_tool_params *params, sizeof(struct ext_hdr_v0); } else { alloc_len = image_headersz_v1(params, NULL); -#if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) - if (alloc_len > CONFIG_SYS_SPI_U_BOOT_OFFS) { - fprintf(stderr, "Error: Image header (incl. SPL image) too big!\n"); - fprintf(stderr, "header=0x%x CONFIG_SYS_SPI_U_BOOT_OFFS=0x%x!\n", - alloc_len, CONFIG_SYS_SPI_U_BOOT_OFFS); - fprintf(stderr, "Increase CONFIG_SYS_SPI_U_BOOT_OFFS!\n"); - } else { - alloc_len = CONFIG_SYS_SPI_U_BOOT_OFFS; - } -#endif } hdr = malloc(alloc_len); diff --git a/tools/kwboot.c b/tools/kwboot.c index 1368b4c948..af7a6ee3f6 100644 --- a/tools/kwboot.c +++ b/tools/kwboot.c @@ -657,7 +657,7 @@ static void kwboot_usage(FILE *stream, char *progname) { fprintf(stream, - "Usage: %s [-d | -a | -b <image> | -D <image> ] [ -t ] [-B <baud> ] <TTY>\n", + "Usage: %s [-d | -a | -q <req-delay> | -s <resp-timeo> | -b <image> | -D <image> ] [ -t ] [-B <baud> ] <TTY>\n", progname); fprintf(stream, "\n"); fprintf(stream, @@ -667,6 +667,8 @@ kwboot_usage(FILE *stream, char *progname) " -D <image>: boot <image> without preamble (Dove)\n"); fprintf(stream, " -d: enter debug mode\n"); fprintf(stream, " -a: use timings for Armada XP\n"); + fprintf(stream, " -q <req-delay>: use specific request-delay\n"); + fprintf(stream, " -s <resp-timeo>: use specific response-timeout\n"); fprintf(stream, "\n"); fprintf(stream, " -t: mini terminal\n"); fprintf(stream, "\n"); @@ -699,7 +701,7 @@ main(int argc, char **argv) kwboot_verbose = isatty(STDOUT_FILENO); do { - int c = getopt(argc, argv, "hb:ptaB:dD:"); + int c = getopt(argc, argv, "hb:ptaB:dD:q:s:"); if (c < 0) break; @@ -731,6 +733,14 @@ main(int argc, char **argv) msg_rsp_timeo = KWBOOT_MSG_RSP_TIMEO_AXP; break; + case 'q': + msg_req_delay = atoi(optarg); + break; + + case 's': + msg_rsp_timeo = atoi(optarg); + break; + case 'B': speed = kwboot_tty_speed(atoi(optarg)); if (speed == -1) |