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This patch splits the M53EVK device tree file into a common SoM
part and an EVK part. This is needed to make it easier for users
of the SoM to put it into different, non-reference baseboard.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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The DAI mode is and should be configured by the sound card driver as
codec and ssi have to be in the right modes to communicate with each
other. It is possible to operate the ssi unit or the codec in master mode,
sometimes even on the same board in different configurations.
With the latest changes in the fsl-ssi driver, the 'fsl,mode' property
is only handled as a fallback property. If the sound card sets the DAI
mode correctly, this fallback configuration is dropped.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Move the display {} node out of the soc {} node . This just aligns
the DT with other boards, there is no functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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The "port" node was misplaced in the original patch, therefore making
the LCD dysfunctional on this board. Fix this by moving the "port" DT
node into the "display {}" node.
Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fix bindings for STMPE touchscreen controller to match the documented
bindings and the actual bindings used by the driver.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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On m53evk there are two DRAM chip selects:
CS0 at 0x70000000
CS1 at 0xb0000000
Each bank has a 512MB DRAM, giving a total of 1GB of system DRAM.
Fix the memory layout to describe the hardware appropriately.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Pull ARM SoC device tree changes from Arnd Bergmann:
"A large part of the arm-soc patches are nowadays DT changes, adding
support for new SoCs, boards and devices without changing kernel
source. The plan is still to move the devicetree files out of the
kernel tree and reduce the amount of churn going on here, but we keep
finding reasons to delay doing that.
Changes are really all over the place, with little sticking out
particularly. We have contributions from a total of 116 people in
this branch.
Unfortunately, the size of this branch also causes a significant
number of conflicts at the moment, typically when subsystem
maintainers merge patches that change the driver at the same time as
the dts files. In most cases this could be avoided because the dts
changes are supposed to be compatible in both ways, and we are asking
everyone to send ARM dts changes through our tree only"
* tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (541 commits)
dts: stmmac: Document the clocks property in the stmmac base document
dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
ARM: STi: stih41x: Add support for the FSM Serial Flash Controller
ARM: STi: stih416: Add support for the FSM Serial Flash Controller
ARM: tegra: fix Dalmore pinctrl configuration
ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm
ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND
ARM: dts: Build all keystone dt blobs
ARM: dts: keystone: Fix control register range for clktsip
ARM: dts: keystone: Fix domain register range for clkfftc1
ARM: dts: bcm28155-ap: leave camldo1 on to fix reboot
ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap
ARM: dts: bcm21664: Add device tree files.
ARM: DT: bcm21664: Device tree bindings
ARM: efm32: properly namespace i2c location property
ARM: efm32: fix unit address part in USART2 device nodes' names
ARM: mvebu: Enable NAND controller in Armada 385-DB
ARM: mvebu: Add support for NAND controller in Armada 38x SoC
ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs
ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs
...
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This patch connects IPU and display encoder (VGA, LVDS)
device tree nodes, as well as parallel displays on the DISP0
and DISP1 outputs, using the OF graph bindings described in
Documentation/devicetree/bindings/media/video-interfaces.txt
The IPU ports correspond to the two display interfaces. The
order of endpoints in the ports is arbitrary.
Since the imx-drm node now only needs to contain links to the
display interfaces, it can be moved to the SoC dtsi level. At
the board level, only connections between the display interface
ports and encoders or panels have to be added.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Use the componentised device support for imx-drm. This requires all
the sub-components and the master device to register with the component
device support.
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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'enable-active-low' is not a valid property for a GPIO controlled regulator.
According to Documentation/devicetree/bindings/regulator/gpio-regulator.txt:
"Optional properties:
...
- enable-active-high : Polarity of GPIO is active high (default is low)."
,so the correct way to define an active-low GPIO controlled regulator is to
simply not pass 'enable-active-high'.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Linux-IDE <linux-ide@vger.kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add USB support for M53EVK. The configuration is such that USB Host1
port is used as Host and the USB OTG port is used as Peripheral thus
far. Once OTG is properly fixed, the OTG will be further adjusted.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Remove the PWM backlight pin from the hog pins list, so it doesn't
collide with the PWM pin group. Moreover, add dummy regulator for
the backlight so that the backlight driver probes correctly.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Use the DISP1 pinmux on M53EVK for the LCD, not the LVDS.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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For better readability and no need to look up numbers
in the documentation anymore.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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The device tree specification recommends that generic name should be
used for nodes. So instead of naming those fixed regulator nodes
arbitrarily, let's use the generic name 'regulator@num' for those nodes.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that
boards that share the same pinctrl setting do not have to define it time
and time again in <board>.dts. However, along with the devices and use
cases being added continuously, the pinctrl setting nodes under iomuxc
becomes more than expected. This bloats device tree blob for particular
board unnecessarily since only a small subset of those pinctrl setting
nodes will be used by the board. It impacts not only the DTB file size
but also the run-time device tree lookup efficiency.
The patch moves all the pinctrl data into individual boards as needed.
With the changes, the pinctrl setting nodes becomes local to particular
board, and it makes no sense to continue numbering the setting for
given peripheral. Thus, all the pinctrl phandler name gets updated to
have only peripheral name in there.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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This patch adds support for the DENX M53EVK board. The board currently supports
NAND, Ethernet, UART, CAN, I2C.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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