Age | Commit message (Collapse) | Author |
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Enable support for USB GSM modems.
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use make savedefconfig to create a proper defconfig file.
* added CAN, and SPIDEV to defconfig
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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added pinmux settings for ohci2.
enable pull downs on pins so that disconnects from USB devices are
detected properly.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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added devicetree entry for spi1
also added a spidev entries to create spi devices for the spidev userland
interface
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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Driver for UCAN based USB CAN devices.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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mmc0 and mmc1 have swapped places, mmc0 is the emmc now.
Also, let's have better labels.
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disable the 1.2Ghz frequency point so users have to enable it explicity.
this should ensure that only boards with installed thermal solutions are
used with 1.2Ghz.
Note that running on 1.2Ghz will not damage the board as we turn CPU off
when overheating. We only want to avoid unexpected shutdowns for users
when using the default setup and not mounting the heat sink.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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we don't need the highest drive strength for rgmii like the other sunxi
boards. set it to second lowest as lowest didn't work anymore.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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This makes sure the eMMC always is found as mmcblk0
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adds missing pin configuration to the a31 dtsi
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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reset timing was a bit off which resulted in not detecting the phy.
changed the settings so that the phy will be found again.
TODO: verify timing while measuring the reset line
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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change the default bootargs in the dts to something more sane since the
console will always be at ttyS2 for the dev kit.
set rootfs to sd card as the devkit will ship with a sd card
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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AMC6821 - thermal sensor and fan controller
ISL1208 - rtc
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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Tests on several Allwinner A31 SoCs showed that PLL1
has problems when using low values for M in combination
with high target frequencies.
This patch addresses this issue by limiting M, such that
it does not divide values higher than 2.6 GHz.
Reported-by: Philip Tomsich <philip.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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* defines the trip points for active and passive cooling
* defines the fan device in i2c3
Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
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Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
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Frequency capping forces the cooling state to a minimum, defined by
the device tree. This forces the frequency to stay below a maximum
determined by the operating points as long as we are above a
thermal trip point.
Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
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Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
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The pll stability tweaks are no longer necessary, since the cpu
clock uses the transition parent while the pll changes the frequency
Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
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A call to the clk_use_transition_mode is issued on transition begin.
Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
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The transition-clock property defines a parent clock to be used by
a clock consumer during frequency transitions in variable frequency
clocks. It is specified by referencing a clock (must be a parent clock).
The clock functions clk_set_transition_parent and clk_get_transition_parent
are defined to work with the transition parent in clocks.
The clock function clk_use_transition_mode sets the clock parent to
the specified transition parent.
Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
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* improved stability by reducing number of operating points
* sampling-rate set to a higher value for improved performance
* regulator max-voltage set to a valid value (1.36)
Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
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The fix takes two aspects into account:
* proper factor calculation using prime number factorization
* tweaking the factors for best stability
Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
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This allows the setting of a sampling-rate property for a cpu in the
device-tree; if set, this will override the defaut sampling rate
calculation
Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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enable the rtc (isl1208 compatible)
disable the soc rtc since there will be no battery backup for it anyways
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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* added i2c driver to defconfig
* added i2c3 pins to A31 dtsi
* enabled all i2c blocks in dts
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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* operating points for different frequencies with voltages set to optimize
power consumption
* clock latency and ramp-rate: these values seem to provide enough time for
the voltage to adjust before frequency changes
Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
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The cpufreq operating points from the cpufreq-dt driver
allows to define the property 'clock-latency' which is
intended to be a delay used between changing the voltage
and changing the frequency.
This patch sets the set_voltage_time_sel function pointer
to the default implementation from regulator/core.c.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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switching from gzip to lzma reduces the uImage size about 1MB
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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* LED on the module (heartbeat)
* LED on the baseboard (MMC0)
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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->determine_rate() and ->round_rate() can return the closest rate to the
requested one or an error code.
clk_calc_new_rates is assuming these functions can't return a negative
value, which leads to a undefined behavior when the clk implementation
returns such an error code.
Fix this by returning NULL in case ->determine_rate() or ->round_rate()
returned an error code.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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This patch adds support for reparenting sunxi factor clocks.
The idea is simple: if the DTS provides all possible
parents in the correct order, they can be tagged by
"clocks-complete" = "ok";
If such a property is found in a sunxi factor clock, then
the reparenting uses the indices of the parent list provided
in the DTB and the new clock properties parentwidth and parentshift
to set the new parent in the clock configuration register.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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This patch registers the fixed-factor and fixed-rate clocks
as clkdev (after registering the clock itself).
This makes it possible to access them later via clk_get().
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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The previous implementation was errornous and hard to
debug. This patch provides a much simpler algorithm,
which has been successfully tested on an Allwinner A31 based board.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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This patch adds support for the GPU clocks on sun6i a31.
This is a typical clock path, which can be realized with this patch:
* PLL8 -> GPU_HYD
-> GPU_MEM
* PLL9 -> GPU_CORE
* AHB1 -> AHB1_GPU
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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This patch defers the device probing in case of a missing reset
controller. This is needed for cases where the pinctrl device is
probed before the reset controller.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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This patch fixes the bitmasks of the AXP22X regulator driver
according to the information listed in the datasheet.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
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