diff options
| author | Chen-Yu Tsai <wens@csie.org> | 2015-03-26 05:04:48 +0800 |
|---|---|---|
| committer | Klaus Goger <klaus.goger@theobroma-systems.com> | 2015-07-30 18:52:53 +0200 |
| commit | 807b7b184de84744e241e3fe50f0873bee8c70a2 (patch) | |
| tree | 681397d6e4abd2107c3513a134e64d779867254d /arch/arm/boot | |
| parent | 30919f3ac3d21e2c3a90fe807613b88906d45ecc (diff) | |
ARM: dts: sun6i: Add cpu clock reference and operating points to dtsi
The cpu core is clocked from the "cpu" clock. Add a reference to it
in the first cpu node. Also add "cpu0" label to the node.
The operating points were taken from the a list compiled by Maxime Ripard,
which is based on A31 FEX files from the sunxi-boards repository. Not all
boards have the same settings. The settings in this patch are the ones
shared by A/B/C revisions, plus the default clock setting from u-boot.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/sun6i-a31.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 92abea20b946..1eab55f803ad 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -100,6 +100,18 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; + clocks = <&cpu>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 1008000 1200000 + 864000 1200000 + 720000 1100000 + 480000 1000000 + >; + #cooling-cells = <2>; + cooling-min-level = <0>; + cooling-max-level = <3>; }; cpu@1 { |