From 137490649b09f0208e796e103e480bb43175f5a2 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Fri, 3 May 2019 19:20:27 +0200 Subject: stm32mp1: fix missing I2C2/I2C6 non-secure mapping I2C4 and I2C6 may be assigned to either secure or non-secure worlds during core initialization. Even when assigned to the non-secure world core may access the bus during sequences where non-secure world cannot execute as during atomic low power transition sequences. This change corrects the missing mapping of I2C4 and I2C6 IO memory with non-secure access attributes. Signed-off-by: Etienne Carriere Reviewed-by: Joakim Bech --- core/arch/arm/plat-stm32mp1/main.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/core/arch/arm/plat-stm32mp1/main.c b/core/arch/arm/plat-stm32mp1/main.c index 8e9ec70d..288fc596 100644 --- a/core/arch/arm/plat-stm32mp1/main.c +++ b/core/arch/arm/plat-stm32mp1/main.c @@ -28,6 +28,8 @@ #ifdef CFG_WITH_NSEC_GPIOS register_phys_mem_pgdir(MEM_AREA_IO_NSEC, GPIOS_NSEC_BASE, GPIOS_NSEC_SIZE); #endif +register_phys_mem_pgdir(MEM_AREA_IO_NSEC, I2C4_BASE, SMALL_PAGE_SIZE); +register_phys_mem_pgdir(MEM_AREA_IO_NSEC, I2C6_BASE, SMALL_PAGE_SIZE); #ifdef CFG_WITH_NSEC_UARTS register_phys_mem_pgdir(MEM_AREA_IO_NSEC, USART1_BASE, SMALL_PAGE_SIZE); register_phys_mem_pgdir(MEM_AREA_IO_NSEC, USART2_BASE, SMALL_PAGE_SIZE); @@ -43,6 +45,8 @@ register_phys_mem_pgdir(MEM_AREA_IO_SEC, BSEC_BASE, SMALL_PAGE_SIZE); register_phys_mem_pgdir(MEM_AREA_IO_SEC, ETZPC_BASE, SMALL_PAGE_SIZE); register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE, GIC_SIZE); register_phys_mem_pgdir(MEM_AREA_IO_SEC, GPIOZ_BASE, SMALL_PAGE_SIZE); +register_phys_mem_pgdir(MEM_AREA_IO_SEC, I2C4_BASE, SMALL_PAGE_SIZE); +register_phys_mem_pgdir(MEM_AREA_IO_SEC, I2C6_BASE, SMALL_PAGE_SIZE); register_phys_mem_pgdir(MEM_AREA_IO_SEC, PWR_BASE, SMALL_PAGE_SIZE); register_phys_mem_pgdir(MEM_AREA_IO_SEC, RCC_BASE, SMALL_PAGE_SIZE); register_phys_mem_pgdir(MEM_AREA_IO_SEC, RNG1_BASE, SMALL_PAGE_SIZE); -- cgit v1.2.3