diff options
| author | Etienne Carriere <etienne.carriere@st.com> | 2019-03-14 09:06:22 +0100 |
|---|---|---|
| committer | Jérôme Forissier <jerome.forissier@linaro.org> | 2019-04-11 14:52:21 +0200 |
| commit | 84d74c3b616ac57db678cba2c9392ace243926e7 (patch) | |
| tree | d144284e7b5bac55b93dc189ecda08e9dc893851 /core | |
| parent | 90c579db542f2336dd6e0d4630d032c531785088 (diff) | |
stm32mp1: shres: check RCC secure hardening
This change add a platform consistency test between shared
resource registering and SoC RCC hardening.
When secure resources are registered, RCC secure hardening
must be enabled unless what secure world cannot guaranty
the resource reliability.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Diffstat (limited to 'core')
| -rw-r--r-- | core/arch/arm/plat-stm32mp1/shared_resources.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/core/arch/arm/plat-stm32mp1/shared_resources.c b/core/arch/arm/plat-stm32mp1/shared_resources.c index 0a0ad4c8..bf77efd2 100644 --- a/core/arch/arm/plat-stm32mp1/shared_resources.c +++ b/core/arch/arm/plat-stm32mp1/shared_resources.c @@ -550,6 +550,44 @@ bool stm32mp_clock_is_non_secure(unsigned long clock_id) return stm32mp_periph_is_non_secure(shres_id); } +static bool mckprot_resource(enum stm32mp_shres id) +{ + switch (id) { + case STM32MP1_SHRES_MCU: + case STM32MP1_SHRES_PLL3: + case STM32MP1_SHRES_PLL3_P: + case STM32MP1_SHRES_PLL3_Q: + case STM32MP1_SHRES_PLL3_R: + return true; + default: + return false; + } +} + +static void check_rcc_secure_configuration(void) +{ + bool secure = stm32_rcc_is_secure(); + bool mckprot = stm32_rcc_is_mckprot(); + enum stm32mp_shres id = STM32MP1_SHRES_COUNT; + bool have_error = false; + + for (id = 0; id < STM32MP1_SHRES_COUNT; id++) { + if (shres_state[id] != SHRES_SECURE) + continue; + + if ((mckprot_resource(id) && !mckprot) || !secure) { + EMSG("RCC %s MCKPROT %s and %s (%u) secure", + secure ? "secure" : "non-secure", + mckprot ? "set" : "not set", + shres2str_id(id), id); + have_error = true; + } + } + + if (have_error) + panic(); +} + static TEE_Result stm32mp1_lock_shared_resources(void) { enum stm32mp_shres id = STM32MP1_SHRES_COUNT; @@ -569,6 +607,8 @@ static TEE_Result stm32mp1_lock_shared_resources(void) shres2str_id(id), id, shres2str_state(*state)); } + check_rcc_secure_configuration(); + return TEE_SUCCESS; } driver_init_late(stm32mp1_lock_shared_resources); |