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authorEtienne Carriere <etienne.carriere@linaro.org>2019-04-29 11:12:13 +0200
committerJérôme Forissier <jerome.forissier@linaro.org>2019-05-06 11:30:37 +0200
commit61e7d84c595d1f4ca64075d6579d99ac0748c05c (patch)
tree508b601d409b4ab3f67a3869650dd238bf0bc37a
parent563f62491b9cad2e147df3ffdb31d67c9e06be9b (diff)
stm32_i2c: expose standard speed in driver API
Move definition of I2C standard speeds configuration means from driver source file to its header file. This change allows bus owners to use appropriate value for bus configuration. Exposes struct i2c_speed_e and enum i2c_speed_e This change fixes the driver API as enum i2c_speed_e is expected by the API. Fixes: b844655c9519 ("stm32_i2c: driver for STM32 I2C bus") Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
-rw-r--r--core/drivers/stm32_i2c.c41
-rw-r--r--core/include/drivers/stm32_i2c.h17
2 files changed, 29 insertions, 29 deletions
diff --git a/core/drivers/stm32_i2c.c b/core/drivers/stm32_i2c.c
index c15e4dd7..749aa40a 100644
--- a/core/drivers/stm32_i2c.c
+++ b/core/drivers/stm32_i2c.c
@@ -234,28 +234,11 @@ struct i2c_timing_s {
bool is_saved;
};
-/*
- * I2C specification values as per version 6.0, 4th of April 2014 [1],
- * table 10 page 48: Characteristics of the SDA and SCL bus lines for
- * Standard, Fast, and Fast-mode Plus I2C-bus devices.
- *
- * [1] https://www.nxp.com/docs/en/user-guide/UM10204.pdf
- */
-enum i2c_speed_e {
- I2C_SPEED_STANDARD, /* 100 kHz */
- I2C_SPEED_FAST, /* 400 kHz */
- I2C_SPEED_FAST_PLUS, /* 1 MHz */
-};
-
-#define STANDARD_RATE 100000
-#define FAST_RATE 400000
-#define FAST_PLUS_RATE 1000000
-
static const struct i2c_spec_s i2c_specs[] = {
[I2C_SPEED_STANDARD] = {
- .rate = STANDARD_RATE,
- .rate_min = (STANDARD_RATE * 80) / 100,
- .rate_max = (STANDARD_RATE * 120) / 100,
+ .rate = I2C_STANDARD_RATE,
+ .rate_min = (I2C_STANDARD_RATE * 80) / 100,
+ .rate_max = (I2C_STANDARD_RATE * 120) / 100,
.fall_max = 300,
.rise_max = 1000,
.hddat_min = 0,
@@ -265,9 +248,9 @@ static const struct i2c_spec_s i2c_specs[] = {
.h_min = 4000,
},
[I2C_SPEED_FAST] = {
- .rate = FAST_RATE,
- .rate_min = (FAST_RATE * 80) / 100,
- .rate_max = (FAST_RATE * 120) / 100,
+ .rate = I2C_FAST_RATE,
+ .rate_min = (I2C_FAST_RATE * 80) / 100,
+ .rate_max = (I2C_FAST_RATE * 120) / 100,
.fall_max = 300,
.rise_max = 300,
.hddat_min = 0,
@@ -277,9 +260,9 @@ static const struct i2c_spec_s i2c_specs[] = {
.h_min = 600,
},
[I2C_SPEED_FAST_PLUS] = {
- .rate = FAST_PLUS_RATE,
- .rate_min = (FAST_PLUS_RATE * 80) / 100,
- .rate_max = (FAST_PLUS_RATE * 120) / 100,
+ .rate = I2C_FAST_PLUS_RATE,
+ .rate_min = (I2C_FAST_PLUS_RATE * 80) / 100,
+ .rate_max = (I2C_FAST_PLUS_RATE * 120) / 100,
.fall_max = 100,
.rise_max = 120,
.hddat_min = 0,
@@ -680,13 +663,13 @@ int stm32_i2c_get_setup_from_fdt(void *fdt, int node,
cuint = fdt_getprop(fdt, node, "clock-frequency", NULL);
if (cuint) {
switch (fdt32_to_cpu(*cuint)) {
- case STANDARD_RATE:
+ case I2C_STANDARD_RATE:
init->speed_mode = I2C_SPEED_STANDARD;
break;
- case FAST_RATE:
+ case I2C_FAST_RATE:
init->speed_mode = I2C_SPEED_FAST;
break;
- case FAST_PLUS_RATE:
+ case I2C_FAST_PLUS_RATE:
init->speed_mode = I2C_SPEED_FAST_PLUS;
break;
default:
diff --git a/core/include/drivers/stm32_i2c.h b/core/include/drivers/stm32_i2c.h
index ac0ea225..6efcf00e 100644
--- a/core/include/drivers/stm32_i2c.h
+++ b/core/include/drivers/stm32_i2c.h
@@ -14,6 +14,23 @@
#include <types_ext.h>
/*
+ * I2C specification values as per version 6.0, 4th of April 2014 [1],
+ * table 10 page 48: Characteristics of the SDA and SCL bus lines for
+ * Standard, Fast, and Fast-mode Plus I2C-bus devices.
+ *
+ * [1] https://www.nxp.com/docs/en/user-guide/UM10204.pdf
+ */
+enum i2c_speed_e {
+ I2C_SPEED_STANDARD, /* 100 kHz */
+ I2C_SPEED_FAST, /* 400 kHz */
+ I2C_SPEED_FAST_PLUS, /* 1 MHz */
+};
+
+#define I2C_STANDARD_RATE 100000
+#define I2C_FAST_RATE 400000
+#define I2C_FAST_PLUS_RATE 1000000
+
+/*
* Initialization configuration structure for the STM32 I2C bus.
* Refer to the SoC Reference Manual for more details on configuration items.
*