From cd9b73177100598e7be0a9033a4a2ed4a7d24fbb Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 2 Aug 2015 21:57:57 +0200 Subject: arm: socfpga: Unbind CPU type from board type The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5 selected both a board and a CPU. This is not correct as these macros are supposed to select only board. All would be good, if QTS-generated header files didn't check for these macros exactly to determine if the platform is Cyclone V or Arria V. Thus, for the sake of compatibility with not well fleshed out header file generator, this patch makes these two macros into a stub config option and introduces new CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK and CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK targets, which select the previous stub config option. The result is that compatibility with QTS is preserved and the new CONFIG_TARGET_* select actual target boards. Signed-off-by: Marek Vasut --- configs/socfpga_arria5_defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'configs/socfpga_arria5_defconfig') diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index f406db7cfd..dcd5cb34ee 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_TARGET_SOCFPGA_ARRIA5=y +CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_SPL=y # CONFIG_CMD_IMLS is not set -- cgit v1.2.3 From 1bd57ff540fc6734d3a27be170109e891d6664cf Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 23 Jun 2015 16:01:28 +0200 Subject: arm: socfpga: Enable DWAPB GPIO driver Enable the DWAPB GPIO driver for SoCFPGA Cyclone V and Arria V. Signed-off-by: Marek Vasut Cc: Simon Glass Cc: Dinh Nguyen --- configs/socfpga_arria5_defconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'configs/socfpga_arria5_defconfig') diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index dcd5cb34ee..eb3bf1b5ee 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -9,6 +9,8 @@ CONFIG_SPL=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SPI_FLASH=y +CONFIG_DM_GPIO=y +CONFIG_DWAPB_GPIO=y CONFIG_SPL_DM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_DM_SEQ_ALIAS=y -- cgit v1.2.3 From 9238b52abd788cf4c2311896a5ada34ecff5499c Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 19 Aug 2015 07:44:39 +0200 Subject: arm: socfpga: Enable ethernet on ArriaV SoCDK Synchronise the config options with Cyclone V SoCDK and other boards. This enables ethernet on the ArriaV SoCDK. Signed-off-by: Marek Vasut --- configs/socfpga_arria5_defconfig | 3 +++ 1 file changed, 3 insertions(+) (limited to 'configs/socfpga_arria5_defconfig') diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index eb3bf1b5ee..74184a00ff 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -9,6 +9,9 @@ CONFIG_SPL=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SPI_FLASH=y +CONFIG_DM_ETH=y +CONFIG_NETDEVICES=y +CONFIG_ETH_DESIGNWARE=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_SPL_DM=y -- cgit v1.2.3