From d89e01770a50ddf31e7bf4faf37a6a8f3bfdfbdf Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Tue, 21 Feb 2017 19:48:46 +0100 Subject: [wip] sun50i-a64.dts: clocking for R_*, r_i2c, i2c changes --- arch/arm/dts/sun50i-a64.dtsi | 100 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 92 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi index f5d4cb562c..b71e55b045 100644 --- a/arch/arm/dts/sun50i-a64.dtsi +++ b/arch/arm/dts/sun50i-a64.dtsi @@ -138,6 +138,13 @@ clock-output-names = "osc32k"; }; + osc16M: osc16M_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <16000000>; + clock-output-names = "osc16M"; + }; + pll1: pll1_clk@1c20000 { #clock-cells = <0>; compatible = "allwinner,sun8i-a23-pll1-clk"; @@ -188,6 +195,39 @@ clock-output-names = "axi"; }; + osc16M_div512: osc16M_div512_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clock-div = <512>; + clock-mult = <1>; + clocks = <&osc16M 0>; + clock-output-names = "osc16M_div512"; + }; + + cpus_clk: cpus_clk@1f01400 { + compatible = "allwinner,sun6i-a31-ar100-clk"; + #clock-cells = <0>; + reg = <0x01f01400 0x4>; + clocks = <&osc16M_div512>, <&osc24M>, <&pll6>, <&osc16M>; + clock-output-names = "cpus"; + }; + + ahb0: ahb0_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&cpus_clk>; + clock-output-names = "ahb0"; + }; + + apb0: apb0_clk { + compatible = "allwinner,sun6i-a31-apb0-clk"; + #clock-cells = <0>; + clocks = <&ahb0>; + clock-output-names = "apb0"; + }; + ahb1: ahb1_clk@1c20054 { #clock-cells = <0>; compatible = "allwinner,sun6i-a31-ahb1-clk"; @@ -220,6 +260,25 @@ clock-output-names = "apb2"; }; + apb0_gates: apb0_gates_clk@1f01428 { + #clock-cells = <1>; + compatible = "allwinner,sun50i-a64-bus-gates-clk", + "allwinner,sunxi-multi-bus-gates-clk"; + reg = <0x01f01428 0x4>; + + apb0_parent { + clocks = <&apb0>; + clock-indices = <0>, <1>, + <2>, <3>, + <4>, <6>, + <7>; + clock-output-names = "r_pio", "r_cir", + "r_timer", "r_rsb", + "r_uart", "r_twi", + "r_twd"; + }; + }; + bus_gates: bus_gates_clk@1c20060 { #clock-cells = <1>; compatible = "allwinner,sun50i-a64-bus-gates-clk", @@ -311,7 +370,7 @@ clock-output-names = "mmc2"; }; - spi0_clk: spi0_clk@01c200a0 { + spi0_clk: spi0_clk@1c200a0 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk"; reg = <0x01c200a0 0x4>; @@ -319,7 +378,7 @@ clock-output-names = "spi0"; }; - spi1_clk: spi1_clk@01c200a4 { + spi1_clk: spi1_clk@1c200a4 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk"; reg = <0x01c200a4 0x4>; @@ -563,14 +622,28 @@ }; }; - r_pio: pinctrl@01f02c00 { + r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun50i-a64-r-pinctrl"; reg = <0x01f02c00 0x400>; interrupts = ; + clocks = <&apb0_gates 0>; gpio-controller; #gpio-cells = <3>; interrupt-controller; #interrupt-cells = <3>; + + r_i2c_pins: r_i2c_pins { + allwinner,pins = "PL8", "PL9"; + allwinner,function = "s_i2c"; + allwinner,drive = ; + allwinner,pull = ; + }; + }; + + apb0_rst: reset@1f014b0 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-clock-reset"; + reg = <0x01f014b0 0x4>; }; ahb_rst: reset@1c202c0 { @@ -686,7 +759,18 @@ #size-cells = <0>; }; - emac: ethernet@01c30000 { + r_i2c: r_i2c@1f02400 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01f02400 0x400>; + interrupts = ; + clocks = <&apb0_gates 6>; + resets = <&apb0_rst 6>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + emac: ethernet@1c30000 { compatible = "allwinner,sun50i-a64-emac"; reg = <0x01c30000 0x2000>, <0x01c00030 0x4>; reg-names = "emac", "syscon"; @@ -709,7 +793,7 @@ #phy-cells = <1>; }; - ehci1: usb@01c1b000 { + ehci1: usb@1c1b000 { compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>; @@ -719,7 +803,7 @@ status = "disabled"; }; - ohci1: usb@01c1b400 { + ohci1: usb@1c1b400 { compatible = "allwinner,sun50i-a64-ohci", "generic-ohci"; reg = <0x01c1b400 0x100>; @@ -729,7 +813,7 @@ status = "enabled"; }; - spi0: spi@01c68000 { + spi0: spi@1c68000 { compatible = "allwinner,sun8i-h3-spi"; reg = <0x01c68000 0x1000>; clocks = <&bus_gates 20>, <&spi0_clk>; @@ -739,7 +823,7 @@ status = "disabled"; }; - spi1: spi@01c69000 { + spi1: spi@1c69000 { compatible = "allwinner,sun8i-h3-spi"; reg = <0x01c69000 0x1000>; clocks = <&bus_gates 21>, <&spi1_clk>; -- cgit v1.2.3