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This changeset moves two configuration options into Kconfig:
* PHY_GIGE, indicates that a controller (with an appropriate PHY) is
Gigabit capable and enables extra support in the miiutil for
parsing the status of Gigabit PHYs
* individual configuration options for MICREL_KSZ9021 and
MICREL_KSZ9031 GbE PHYs, which previously had to enabled through
a board-specific config file
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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This ports the support for configuring a GPIO for resetting the
Ethernet PHY (incl. such details as the reset polarity and
pulse-length) from the Designware driver.
X-AffectedPlatforms: A64-uQ7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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The MDIO read/write builds up the MII_CMD register from scratch (starting
with a value of 0). No need to mask out any fields before writing the new
values.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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The IEEE 802.3 standard guarantees operation of the MDIO signals at up
to 2.5MHz (anything above this is a vendor-specific feature, although
most PHYs work at higher frequencies). With the EMAC being fed by a
(typically) 300MHz clock (e.g. on the A64 this is AHB2, which should
be kept at 300MHz according to the CCU documentation), we need to use
the divide-by-128 setting to get us below 2.5MHz.
The ~2.34MHz clock signal (i.e. assuring that the MDC clock is indeed
derived from the AHB2 clock) has been verified using a A64-uQ7.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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A number of designs will have GPIOs connected to external USB devices
to keep them in reset while the associated USB controller is inactive.
E.g. on the A64-uQ7 we have individual enable GPIOs for each USB hub
cascaded on EHCI1 and customers can use any available GPIO to control
USB devices on the baseboard.
By moving this into the DTS we can easily specify a list of GPIOs and
even model their polarity (active-low vs. active-high).
X-AffectedPlatforms: A64-uQ7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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These changes add support for MUSB (OTG) and HCI1 on sun50i (A64)
and try to improve documentation:
* adds support for the shared PHY (MUSB and OTG-EHCI/OTG-OHCI) on
sun50i (A64) in musb-new/sunxi.c to automatically change the
PHY routing when opening/closing MUSB
* sets up the usb_phy_passby only from the HCI ([eo]hci_sunxi.c)
init and does not match on the PHY id (id #0 is either used by
MUSB or by OTG-EHCI/OHCI) in the common PHY initialisation
* adds support for clearing the 'SIDDP' bit in the PHYCTL register
(and left a comment for the H3, which apparently does the same
from sunxi_usb_phy_config in a 'magic' write)
* introduced a SUNXI_MUSB_BASE define for the MUSB driver to find
the controller (it's usually USB0_BASE, but not on the A64 where
USB0_BASE is the OTG-EHCI/OHCI address space) ... this should
eventually disappear entirely, as the sunxi musb support moves
to support the device model
* added initialisation calls to clearing the 'SIDDP' bit in the
PHYCTL register and for the usb_phy_passby to ehci-sunxi.c and
ohci-sunxi.c (note that these are idempotent, so we don't need
to worry that we call this multiple times)
* updated the comments in 'sunxi_usb_phy_config' based on the
English comments in Allwinner's 3.10 kernel release
* add additional defines for the clock gating and module reset bits
for the somewhat different controller configuration in the A64,
partially motivated by the fact that the musb-new/sunxi.c glue
expects AHB_GATE_OFFSET_USB0 to be the bit number for MUSB.
Note (for testers) that turning on the complete USB hub cascade
connected to EHCI1 on the A64-uQ7 requires two GPIOs, so you will need
to either have the (separate) change for having multiple GPIOs in your
tree or issue the command 'gpio set pe4' to turn on the second
(cascaded) hub.
X-AffectedPlatforms: A64-uQ7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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The sun50i platform (e.g. the A64/sun50iw1p1) integrates 2 USB PHYs
which are connected as follows:
PHY#0 is shared between the OTG controller (MUSB) [at 01C19000]
and the USB-OTG-HCI [at 01C1A000]
PHY#1 is dedicated to USB-HCI0 [at 01C1B000] and can be bypassed
when connecting HCI0 to the HSIC interface
Note that all USB PHYs are controlled from within the OTG address
space at 01C19000.
X-AffectedPlatforms: A64-uQ7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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This adds documentation on the u-boot,efi-partition-entries-offset
property (which overrides CONFIG_EFI_PARTITION_ENTRIES_OFF, if
present).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This moves the description of the /config node from README.fdt-control
into a separate file doc/device-tree-bindings/config.txt.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Some architectures require their SPL loader at a fixed address within
the first 16KB of the disk. To avoid an overlap with the partition
entries of the EFI partition table, the first safe offset (in bytes,
from the start of the device) for the entries can be set through
CONFIG_EFI_PARTITION_ENTRIES_OFF (via Kconfig)
When formatting a device with an EFI partition table, we may need to
leave a gap between the GPT header (always in LBA 1) and the partition
entries. The GPT header already contains a field to specify the
on-disk location, which has so far always been set to LBA 2. With this
change, a configurable offset will be translated into a LBA address
indicating where to put the entries.
Now also allows an override via device-tree using a config-node (see
doc/device-tree-bindings/config.txt for documentation).
Tested (exporting an internal MMC formatted with this) against Linux,
MacOS X and Windows.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This introduces the ability to override the environment offets from the
device tree by setting the following nodes in '/config':
'u-boot,mmc-env-offset' - overrides CONFIG_ENV_OFFSET
'u-boot,mmc-env-offset-redundant'
- overrides CONFIG_ENV_OFFSET_REDUND
To keep with the previous logic, the CONFIG_* defines still need to
be available and the statically defined values become the defaults,
when the corresponding properties are not set in the device-tree.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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The spi command is rather useful for board verification, bring-up and
software testing. One use in our lab is the testing of the clock
code, which requires the ability to send data at different SPI clocks.
The changeset adds an additional (optional) positional argument to the
'spi' command that allows the selection of a SPI clock for
communication (the previous default of 1MHz is retained, if the
argument is omitted).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Previously, dtoc could only process the top-level nodes which led to
device nodes in hierarchical trees to be ignored. E.g. the mmc0 node
in the following example would be ignored, as only the soc node was
processed:
/ {
soc {
mmc0 {
/* ... */
};
};
};
This introduces a recursive helper method ScanNode, which is used by
ScanTree to recursively parse the entire tree hierarchy.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Throughput tests have shown the sunxi_mmc driver to take over 10s to
read 10MB from a fast eMMC device due to excessive delays in polling
loops.
This commit restructures the main polling loops to use get_timer(...)
to determine whether a (millisecond) timeout has expired. We choose
not to use the wait_bit function, as we don't need interruptability
with ctrl-c and have at least one case where two bits (one for an
error condition and another one for completion) need to be read and
using wait_bit would have not added to the clarity.
The observed speedup in testing is greater than 10x (e.g. a 10MB write
decreases from 9.302s to 0.884s).
X-Affected-platforms: A31-uQ7, A80-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
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The Pine64 boards require an ARM Trusted Firmware (ATF) image to be
loaded and executes prior to the actual U-Boot proper.
Add a FIT image source file to describe the binaries, also add the
supported DTs to be able to boot multiple boards with one image. Use:
$ tools/mkimage -f boards/sunxi/pine64_atf.its -E pine64_image.itb
to create the image file. Copy (or symlink) the bl31.bin file from
the ARM Trusted Firmware build into the current directory.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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The Pine64 (as all 64-bit Allwinner boards so far) need to load an
ARM Trusted Firmware image beside the actual U-Boot proper.
This can now be easily achieved by using the just extended SPL FIT
loading support, so enable it in the Pine64 defconfig.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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For a board or platform to support FIT loading in the SPL, it has to
provide a board_fit_config_name_match() routine, which helps to select
one of possibly multiple DTBs contained in a FIT image.
Provide a simple function to cover the two different Pine64 models,
which can be easily told apart by looking at the amount of installed
RAM.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Conflicts:
board/sunxi/board.c
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The SPL stack is usually located at the end of SRAM A1, where it grows
towards the end of the SPL.
For the really big AArch64 binaries the stack overwrites code pretty
soon, so move the SPL stack to the end of SRAM A2, which is unused at this
time.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Compiling the SPL in AArch64 results in bigger code, which exceeds the
pretty conservative default limits of mksunxiboot.
Use the newly introduced command line parameters to extend the file size
limit to the actual one, which is 32 KB.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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mksunxiboot limits the size of the resulting SPL binaries to pretty
conservative values to cover all SoCs and all boot media (NAND).
In preparation for supporting modern SoCs without NAND, which may
require a really large SPL, introduce comamnd line parameters to
push the possible SPL size to the limits.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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So far we were not using the FIT image format to its full potential:
The SPL FIT loader was just loading the first image from the /images
node plus one of the listed DTBs.
Now with the refactored loader code it's easy to load an arbitrary
number of images in addition to the two mentioned above.
As described in the FIT image source file format description, iterate
over all images listed at the "loadables" property in the configuration
node and load every image at its desired location.
This allows to load any kind of images:
- firmware images to execute before U-Boot proper (for instance
ARM Trusted Firmware (ATF))
- firmware images for management processors (SCP, arisc, ...)
- firmware images for devices like WiFi controllers
- bit files for FPGAs
- additional configuration data
- kernels and/or ramdisks
The actual usage of this feature would be platform and/or board specific.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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At the moment we load two images from a FIT image: the actual U-Boot
image and the DTB. Both times we have very similar code to deal with
alignment requirement the media we load from imposes upon us.
Factor out this code into a new function, which we just call twice.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Currently the SPL FIT loader always looks only for the first image in
the /images node a FIT tree, which it loads and later executes.
Generalize this by looking for a "firmware" property in the matched
configuration subnode, or, if that does not exist, for the first string
in the "loadables" property. Then using the string in that property,
load the image of that name from the /images node.
This still loads only one image at the moment, but refactors the code to
allow extending this in a following patch.
To simplify later re-usage, we also generalize the spl_fit_select_index()
function to not return the image location, but just the node offset.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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The sunxi-specific SPI load routine only knows how to load a legacy
U-Boot image.
Teach it how to handle FIT images as well, simply by providing the
existing SPL FIT loader with the right loader routine to access the SPI
NOR flash.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Currently the SPL FIT loader uses the spl_fit_select_fdt() function to
find the offset to the right DTB within the FIT image.
For this it iterates over all subnodes of the /configuration node in
the FIT tree and compares all "description" strings therein using a
board specific matching function.
If that finds a match, it uses the string in the "fdt" property of that
subnode to locate the matching subnode in the /images node, which points
to the DTB data.
Now this works very well, but is quite specific to cover this particular
use case. To open up the door for a more generic usage, let's split this
function into:
1) a function that just returns the node offset for the matching
configuration node (spl_fit_find_config_node())
2) a function that returns the image data any given property in a given
configuration node points to, additionally using a given index into
a possbile list of strings (spl_fit_select_index())
This allows us to replace the specific function above by asking for the
image the _first string of the "fdt" property_ in the matching
configuration subnode points to.
This patch introduces no functional changes, it just refactors the code
to allow reusing it later.
(diff is overly clever here and produces a hard-to-read patch, so I
recommend to throw a look at the result instead).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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MR settings).
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Signed-off-by: Octav Zlatior <octav.zlatior@theobroma-systems.com>
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we need to do board specific things that we can't select only based on
the CPU flavor. So we introduce the Kconfig option to select a specfic
sunxi board
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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missed in b25d882f
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elcom uses a different serial for console output.
instead of duplicating the dts we now include the generic
and only overwrite the console part.
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ethernet is now handled by devicetree. removing MACPWR option
from CONFIG_SYS_EXTRA_OPTION for correct ethernet phy detection.
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