diff options
| author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2015-06-18 00:40:43 +0200 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-03-09 01:39:59 +0100 |
| commit | aa339bc2767ebf40fd4eca961e43da4dd399318d (patch) | |
| tree | 504e199bd887be7ca44d5ad3c46c460287f2ab35 /arch | |
| parent | 64c1b00a10c835cc67cff473373e1321a2f0dede (diff) | |
sun6i: Improve selection of 'k' and 'm' for PLL5
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-sunxi/clock_sun6i.c | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c index b250553ca8..81c87f8aee 100644 --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c @@ -191,8 +191,7 @@ void clock_set_pll5(unsigned int clk, bool sigma_delta_enable) { struct sunxi_ccm_reg * const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - const int max_n = 32; - int k = 1, m = 2; + int k = 3, m = 4; #ifdef CONFIG_MACH_SUN8I_H3 clrsetbits_le32(&ccm->pll5_tuning_cfg, CCM_PLL5_TUN_LOCK_TIME_MASK | @@ -204,11 +203,17 @@ void clock_set_pll5(unsigned int clk, bool sigma_delta_enable) writel(CCM_PLL5_PATTERN, &ccm->pll5_pattern_cfg); /* PLL5 rate = 24000000 * n * k / m */ - if (clk > 24000000 * k * max_n / m) { - m = 1; - if (clk > 24000000 * k * max_n / m) - k = 2; + if (clk > 1152000000) { + k = 4; + m = 2; + } else if (clk > 768000000) { + k = 3; + m = 2; + } else if (clk > 576000000) { + k = 2; + m = 2; } + writel(CCM_PLL5_CTRL_EN | (sigma_delta_enable ? CCM_PLL5_CTRL_SIGMA_DELTA_EN : 0) | CCM_PLL5_CTRL_UPD | |